A Multi-Input-Port Bidirectional DC/DC Converter for DC Microgrid Energy Storage System Applications

Abstract

A multi-input-port bidirectional DC/DC converter is proposed in this paper for the energy storage systems in DC microgrid. The converter can connect various energy storage batteries to the DC bus at the same time. The proposed converter also has the advantages of low switch voltage stress and high voltage conversion gain. The working principle and performance characteristics of the converter were analyzed in detail, and a 200 W, two-input-port experimental prototype was built. The experimental results are consistent with the theoretical analysis.

1. Introduction

Due to global issues like the greenhouse effect and energy shortage, renewable energy generation has developed rapidly in recent years [1,2,3]. Renewable energy generation is greatly affected by natural environmental factors, output power of which exhibits intermittence and randomness [4,5]. DC microgrid and energy storage systems, like batteries and supercapacitors, are usually used to smooth the fluctuating and stochastic output power of the renewable energy generation system [6,7]. A DC/DC converter with the capability of bidirectional energy conversion is the key device to connect batteries and the DC bus of the DC microgrid.

In recent years, many studies have been conducted on bidirectional DC/DC converters [8,9]. Many battery cells were connected in series to achieve high voltage [10]; however, a charge equalization circuit needs to be introduced to solve the problem of unbalanced battery charging [11]. On the contrary, many batteries can also be connected in parallel to achieve high reliability [12], but the output voltage of these batteries is low, and a high voltage gain converter is required in such an application [13,14]. Coupled inductors, switch capacitors, or voltage multiple cells can be used to improve the voltage conversion ratio [15,16,17,18,19]; however, most of the above converters are single input and single output, which means a large number of converters have to be used to connect each battery energy storage unit to the DC bus respectively [20,21], as Figure 1a shows.

In [22,23,24], some multi-input-port bidirectional converters have been presented; however, these converters have some common disadvantages, such as a large number of devices, large size, and high cost. A multi-input-port bidirectional DC/DC converter is proposed in this paper, many battery energy storage units can be connected to the DC bus by this converter together, as Figure 1b shows. Both in charging and discharging mode, the power flow to every battery can be controlled easily. Apparently, the cost of the whole system can be reduced.

The paper is organized as follows. The working principle, performance analysis, and extension of the proposed converter are described in Section 2, Section 3 and Section 4, respectively. In Section 5, the efficacy of the proposed converter is verified experimentally using a 200 W prototype.

2. Operation Principle of the Proposed Multi-Input-Port Bidirectional DC/DC Converter

The operation principle of the proposed converter will be presented in this section based on a topology with two input ports shown in Figure 2. To simplify the analysis, the following assumptions are made:

• The currents i_L1 and i_L2 of the inductors L₁ and L₂ are both continuous.
• All devices are ideal, regardless of the influence of parasitic parameters.
• The switches S₁ and S₂ are regulated by an interleaved control strategy with the duty cycle greater than 0.5. While the switches Q₁ and Q₂ are controlled by an interleaved control strategy with the duty cycle less than 0.5. The operation principle of the converter can be analyzed based on the discharging or charging modes.

2.1. Discharging Mode (Boost)

In this mode, S₁ and S₂ are interleaved with 180° phase shift to turn on, and Q₁, Q₂ are turned off. During a switching period T_s, there are three Sub-modes. The main waveforms of the converter working in steady state are shown in Figure 3, and the equivalent circuit of each Sub-mode is shown in Figure 4. The control signals of S₁ and S₂ are denoted by u_gs1 and u_gs2, respectively.

Sub-mode 1 [t₀–t₁, t₂–t₃]: as Figure 4a shows, S₁ and S₂ are on. The voltages of the inductors L₁ and L₂ are equal to u_in1 and u_in2, respectively. The inductor currents increase linearly at the rates of u_in1/L₁ and u_in2/L₂, respectively. The current through the capacitor C₁ is zero, while the capacitor voltage is unchanged.

Sub-mode 2 [t₁–t₂]: as Figure 4b shows, S₁ is on, and S₂ is off. Same as Sub-mode 1, the voltage of the inductor L₁ is still u_in1, and the current through it increases linearly at the rate of u_in1/L₁. However, the current through the inductor L₂ decreases at the rate of (u_in2 + u_C1 − u_o)/L₂. The capacitor C₁ is being discharged. The voltage of C₁ decreases linearly, and the current of C₁ is equal to i_L2.

Sub-mode 3 [t₃–t₄]: as Figure 4c shows, S₁ is off, and S₂ is on. The current through the inductor L₁ decreases at the rate of (u_in1 − u_C1)/L₁. The voltage of the inductor L₂ is u_in2, and the current of L₂ increases at the rate of u_in2/L₂. The capacitor C₁ is being charged. The current of the capacitor C₁ is equal to i_L1, and the voltage of C₁ increases linearly.

2.2. Charging Mode (Buck)

In this mode, Q₁ and Q₂ are interleaved with 180° phase shift to turn on, and S₁, S₂ are off. During a switching period T_s, there are three Sub-modes. The main waveforms of the converter working in steady state are shown in Figure 5, and the equivalent circuit of each Sub-mode is shown in Figure 6. The control signals of Q₁ and Q₂ are denoted by u_gQ1 and u_gQ2, respectively.

Sub-mode 1 [t₀–t₁]: as Figure 6a shows, Q₁ is on, and Q₂ is off. The current through the inductor L₁ increases at the rate of (u_C1 − u_in1)/L₁. The voltage of the inductor L₂ is u_in2, and the current of L₂ decreases at the rate of u_in2/L₂. The capacitor C₁ is being discharged. The voltage of C₁ decreases linearly and the current of C₁ is equal to i_L1.

Sub-mode 2 [t₁–t₂, t₃–t₄]: as Figure 6b shows, Q₁ and Q₂ are off. The voltages of the inductors L₁ and L₂ are u_in1 and u_in2, respectively. The inductor currents decrease linearly at the rates of u_in1/L₁ and u_in2/L₂, respectively. The current through the capacitor C₁ is zero, while the capacitor voltage is unchanged.

Sub-mode 3 [t₂–t₃]: as Figure 6c shows, Q₁ is off, and Q₂ is on. The current of the inductor L₁ decreases at the rate of u_in1/L₁. However, the current through the inductor L₂ increases at the rate of (u_o − u_in2 − u_C1)/L₂. The capacitor C₁ is being charged. The current of the capacitor C₁ is equal to i_L2, and the voltage of C₁ increases linearly.

3. Performance Analysis

3.1. Voltage Conversion Ratio

Discharging Mode (Boost): According to the analysis of the above working principle, the operating characteristics of the proposed converter can be derived from the three Sub-modes in one switching cycle T_s, based on the voltage-second balance of the inductors L₁ and L₂.

$$D_{\mathrm{S}}{}_1{u}_{\mathrm{in}1}+(1-D_{\mathrm{S}}{}_1)(u_{\mathrm{in}1}-u_{C1})=0$$

(1)

$$D_{\mathrm{S}2}{u}_{\mathrm{in}2}+(1-D_{\mathrm{S}2})(u_{\mathrm{in}2}+u_{C1}-u_{\mathrm{o}})=0$$

(2)

From Equations (1) and (2), Equations (3) and (4) can be derived:

$$u_{C1}=\frac{u_{\mathrm{in}1}}{1-D_{\mathrm{S}1}}$$

(3)

$$u_{\mathrm{o}}=\frac{u_{\mathrm{in}1}}{1-D_{\mathrm{S}}{}_1}+\frac{u_{\mathrm{in}2}}{1-D_{\mathrm{S}2}}$$

(4)

According to Equation (4), it can be clearly seen that the voltage conversion ratio of the proposed converter is twice that of the traditional boost converter.

When the input voltages u_in1, u_in2, and the duty cycle D_S1, D_S2 are the same, respectively, the voltage conversion ratio of the proposed converter can be derived:

$$M_{\mathrm{Boost}}=\frac{u_{\mathrm{o}}}{u_{\mathrm{in}}}=\frac{2}{1-D_{\mathrm{Boost}}}$$

(5)

Charging Mode (Buck): According to the analysis of the above working principle, the operating characteristics of the proposed converter can be derived from the Sub-three modes in one switching cycle T_s, based on the voltage-second balance of the inductors L₁ and L₂.

$$D_{\mathrm{Q}1}(u_{C1}-u_{\mathrm{in}1})+(1-D_{\mathrm{Q}1})(-u_{\mathrm{in}1})=0$$

(6)

$$D_{\mathrm{Q}2}(u_{\mathrm{o}}-u_{\mathrm{in}2}-u_{C1})+(1-D_{\mathrm{Q}2})(-u_{\mathrm{in}2})=0$$

(7)

From Equations (6) and (7), Equations (8) and (9) can be derived:

$$u_{C1}=\frac{u_{\mathrm{in}1}}{D_{\mathrm{Q}1}}$$

(8)

$$u_{\mathrm{o}}=\frac{u_{\mathrm{in}1}}{D_{\mathrm{Q}1}}+\frac{u_{\mathrm{in}2}}{D_{\mathrm{Q}2}}$$

(9)

When the output voltages u_in1, u_in2, and the duty cycle D_Q1, D_Q2 are the same, respectively, the voltage conversion ratio of the proposed converter can be derived:

$$M_{\mathrm{Buck}}=\frac{u_{\mathrm{in}}}{u_{\mathrm{o}}}=\frac{D_{\mathrm{Buck}}}{2}$$

(10)

According to Equation (10), it can be seen that the voltage conversion ratio of the proposed converter is half of that of the traditional buck converter.

3.2. Relationship between the Currents of the Two Inductors

Discharging Mode (Boost): During a switching cycle T_s, in Sub-mode 3, the capacitor C₁ is charged for (1 − D_S1)T_s and the current of C₁ is equal to i_L1. In Sub-mode 2, the capacitor C₁ is discharged for (1 − D_S2)T_s, and the current of C₁ is equal to i_L2. In Sub-mode 1, the current of the capacitor C₁ is zero. Due to the ampere-second balance of the capacitor C₁, the following can be derived:

$$I_{L1}(1-D_{\mathrm{S}}{}_1)T_{\mathrm{s}}=I_{L2}(1-D_{\mathrm{S}}{}_2)T_{\mathrm{s}}$$

(11)

$$I_{L1}(1-D_{\mathrm{S}}{}_1)=I_{L2}(1-D_{\mathrm{S}}{}_2)$$

(12)

When the duty cycles D_S1 and D_S2 are equal, the two input currents are also equal. Thus, automatic current sharing is realized. The power of the two ports can be adjusted through controlling D_S1 and D_S2, respectively.

Charging Mode (Buck): During a switching cycle T_s, in Sub-mode 1, the capacitor C₁ is discharged for D_Q1T_s, and the current of C₁ is equal to i_L1. In Sub-mode 3, the capacitor C₁ is charged for D_Q2T_s, and the current of C₁ is equal to i_L2. In Sub-mode 2, the current of the capacitor C₁ is zero. Due to the ampere-second balance of the capacitor C₁, the following can be derived:

$$I_{L1}{D}_{\mathrm{Q}1}{T}_{\mathrm{s}}=I_{L2}{D}_{\mathrm{Q}2}{T}_{\mathrm{s}}$$

(13)

$$I_{L1}{D}_{\mathrm{Q}1}=I_{L2}{D}_{\mathrm{Q}2}$$

(14)

When the duty cycle D_Q1 and D_Q2 are equal, the two input currents are also equal. Thus, automatic current sharing is realized. The power of the two ports can be adjusted through controlling D_Q1 and D_Q2, respectively.

3.3. Voltage Stress of Switch

The voltage stresses of S₁, S₂, Q₁, and Q₂ can be derived as follows:

• Discharging Mode (Boost):

  $$u_{\mathrm{S}1}=u_{C1}$$

  (15)

  $$u_{\mathrm{S}2}=u_{\mathrm{Q}2}=u_{\mathrm{o}}-u_{C1}$$

  (16)

  $$u_{\mathrm{Q}1}=u_{\mathrm{o}}$$

  (17)
• Charging Mode (Buck):

  $$u_{\mathrm{S}1}=u_{C1}$$

  (18)

  $$u_{\mathrm{S}2}=u_{\mathrm{Q}2}=u_{\mathrm{o}}-u_{C1}$$

  (19)

  $$u_{\mathrm{Q}1}=u_{\mathrm{o}}$$

  (20)

3.4. Current Stress of Switch

Discharging Mode (Boost): To begin with the time of S₁ turning on, in the following cycle T_s, the inductor currents i_L1, i_L2 can be represented as

$$i_{L1}=\{\begin{array}{c}{I}_{L1}-\frac{u_{\mathrm{in}1}{D}_{\mathrm{S}1}{T}_{\mathrm{s}}}{2L_1}+\frac{u_{\mathrm{in}1}}{L_1}t,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}0<t\le D_{\mathrm{S}1}{T}_{\mathrm{s}}\\ I_{L1}+\frac{u_{\mathrm{in}1}{D}_{\mathrm{S}1}{T}_{\mathrm{s}}}{2L_1}-\frac{u_{C1}-u_{\mathrm{in}1}}{L_1}t,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{D}_{\mathrm{S}1}{T}_{\mathrm{s}}<t\le T_{\mathrm{s}}\end{array}$$

(21)

$$i_{L2}=\{\begin{array}{l}{I}_{L2}+\frac{1-D_{\mathrm{S}2}}{2L_2}{u}_{\mathrm{in}2}{T}_{\mathrm{s}}+\frac{u_{\mathrm{in}2}}{L_2}t,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}0<t\le (D_{\mathrm{S}2}-\frac{1}{2})T_{\mathrm{s}}\\ I_{L2}+\frac{u_{\mathrm{in}2}{D}_{\mathrm{S}2}{T}_{\mathrm{s}}}{2L_2}-\frac{u_{\mathrm{o}}-u_{C1}-u_{\mathrm{in}2}}{L_2}[t-(D_{\mathrm{S}2}-\frac{1}{2})T_{\mathrm{s}}],\hspace{0.17em}\hspace{0.17em}(D_{\mathrm{S}2}-\frac{1}{2})T_{\mathrm{s}}<t\le \frac{T_{\mathrm{s}}}{2}\\ I_{L2}-\frac{u_{\mathrm{in}2}{D}_{\mathrm{S}2}{T}_{\mathrm{s}}}{2L_2}+\frac{u_{\mathrm{in}2}}{L_2}(t-\frac{T_{\mathrm{s}}}{2}),\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\frac{T_{\mathrm{s}}}{2}<t\le T_{\mathrm{s}}\end{array}$$

(22)

According to the three Sub-modes of the circuit, in a switching cycle, the currents through S₁ and S₂ at every stage can be derived as follows:

$$i_{\mathrm{S}1}=\{\begin{array}{c}{i}_{L1},\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}0<t\le D_{\mathrm{S}1}{T}_{\mathrm{s}}\\ 0,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{D}_{\mathrm{S}1}{T}_{\mathrm{s}}<t\le T_{\mathrm{s}}\end{array}$$

(23)

$$i_{\mathrm{S}2}=\{\begin{array}{l}{i}_{L2},\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}0<t\le (D_{\mathrm{S}2}-\frac{1}{2})T_{\mathrm{s}}\\ 0,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}(D_{\mathrm{S}2}-\frac{1}{2})T_{\mathrm{s}}<t\le \frac{T_{\mathrm{s}}}{2}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\\ i_{L2},\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\frac{T_{\mathrm{s}}}{2}<t\le D_{\mathrm{S}2}{T}_{\mathrm{s}}\\ i_{L1}+i_{L2},\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{D}_{\mathrm{S}2}{T}_{\mathrm{s}}<t\le T_{\mathrm{s}}\end{array}\hspace{0.17em}\hspace{0.17em}$$

(24)

From Equations (21)–(24), the currents through S₁, S₂, Q₁, and Q₂ can be derived as follows:

$$i_{\mathrm{S}1}=i_{\mathrm{Q}1}=I_{L1}+\frac{u_{\mathrm{in}1}{D}_{\mathrm{S}1}{T}_{\mathrm{s}}}{2L_1}$$

(25)

$$i_{\mathrm{S}2}=I_{L1}+\frac{u_{\mathrm{in}1}{D}_{\mathrm{S}1}{T}_{\mathrm{s}}}{2L_1}+I_{L2}+\frac{D_{\mathrm{S}2}-1}{2L_2}{u}_{\mathrm{in}2}{T}_{\mathrm{s}}$$

(26)

$$i_{\mathrm{Q}2}=I_{L2}+\frac{u_{\mathrm{in}2}{D}_{\mathrm{S}2}{T}_{\mathrm{s}}}{2L_2}$$

(27)

Charging Mode (Buck): To begin with the time of Q₁ turning on, in the following cycle T_s, the inductor currents i_L1 and i_L2 can be denoted by

$$i_{L1}=\{\begin{array}{ll}\frac{u_{\mathrm{C}1}-u_{\mathrm{in}1}}{L_1}t,& 0\text{<}t\le D_{\mathrm{Q}1}{T}_{\mathrm{s}}\\ I_{L1}+\frac{(u_{C1}-u_{\mathrm{in}1})D_{\mathrm{Q}1}{T}_{\mathrm{s}}}{2L_1}-\frac{u_{\mathrm{in}1}}{L_1}(t-D_{\mathrm{Q}1}{T}_{\mathrm{s}}),& D_{\mathrm{Q}1}{T}_{\mathrm{s}}\text{<}t\le T_{\mathrm{s}}\end{array}$$

(28)

$$i_{\mathrm{L}2}=\{\begin{array}{l}{I}_{L2}+\frac{(u_{\mathrm{o}}-u_{C1}-u_{\mathrm{in}2})D_{\mathrm{Q}2}{T}_{\mathrm{s}}}{2L_2}-\frac{u_{\mathrm{in}2}}{L_2}(\frac{1}{2}-D_{\mathrm{Q}2})T_{\mathrm{s}}-\frac{u_{\mathrm{in}2}}{L_2}t,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}0<t\le \frac{1}{2}{T}_{\mathrm{s}}\\ I_{L2}-\frac{(u_{\mathrm{o}}-u_{C1}-u_{\mathrm{in}2})D_{\mathrm{Q}2}{T}_{\mathrm{s}}}{2L_2}+\frac{(u_{\mathrm{o}}-u_{C1}-u_{\mathrm{in}2})}{L_2}(t-\frac{1}{2}{T}_{\mathrm{s}}),\hspace{0.17em}\hspace{0.17em}\frac{1}{2}{T}_{\mathrm{s}}<t\le (\frac{1}{2}+D_{\mathrm{Q}2})T_{\mathrm{s}}\hspace{0.17em}\\ I_{L2}+\frac{(u_{\mathrm{o}}-u_{C1}-u_{\mathrm{in}2})D_{\mathrm{Q}2}{T}_{\mathrm{s}}}{2L_2}-\frac{u_{\mathrm{in}2}}{L_2}[t-(\frac{1}{2}+D_{\mathrm{Q}2})T_{\mathrm{s}}],\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}(\frac{1}{2}+D_{\mathrm{Q}2})T_{\mathrm{s}}<t\le T_{\mathrm{s}}\end{array}$$

(29)

According to the three Sub-modes of the circuit, in a switching cycle, the currents through Q₁ and Q₂ at each stage can be derived as follows:

$$i_{\mathrm{Q}1}=\{\begin{array}{c}{i}_{L1},\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}0\text{<}t\le D_{\mathrm{Q}1}{T}_{\mathrm{s}}\\ 0,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}{D}_{\mathrm{Q}1}{T}_{\mathrm{s}}\text{<}t\le T_{\mathrm{s}}\end{array}$$

(30)

$$i_{\mathrm{Q}2}=\{\begin{array}{c}0,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}0<t\le \frac{1}{2}{T}_{\mathrm{s}}\\ i_{L2},\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\frac{1}{2}{T}_{\mathrm{s}}<t\le (\frac{1}{2}+D_{\mathrm{Q}2})T_{\mathrm{s}}\\ 0,\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}(\frac{1}{2}+D_{\mathrm{Q}2})T_{\mathrm{s}}<t\le T_{\mathrm{s}}\end{array}$$

(31)

From Equations (28)–(31), the currents through S₁, S₂, Q₁, and Q₂ can be derived as follows:

$$i_{\mathrm{S}1}=i_{\mathrm{Q}1}=I_{L1}+\frac{u_{\mathrm{in}1}(1-D_{\mathrm{Q}1})T_{\mathrm{s}}}{2L_1}$$

(32)

$$i_{\mathrm{Q}2}=I_{L2}+\frac{u_{\mathrm{in}2}(1-D_{\mathrm{Q}2})T_{\mathrm{s}}}{2L_2}$$

(33)

$$i_{\mathrm{S}2}=I_{L1}+\frac{u_{\mathrm{in}1}(1-D_{\mathrm{Q}1})T_{\mathrm{s}}}{2L_1}+I_{L2}-\frac{u_{\mathrm{in}2}(1-D_{\mathrm{Q}2})T_{\mathrm{s}}}{2L_2}+\frac{u_{\mathrm{in}2}}{L_2}(\frac{1}{2}-D_{\mathrm{Q}1})T_{\mathrm{s}}$$

(34)

3.5. Power Flow

Discharging Mode (Boost): The inductor current i_L1 increases as the duty cycle D_S1 increases, and the inductor current i_L2 decreases as the duty cycle D_S2 decreases. Since the two input voltages u_in1, u_in2 are equal, the ratio of the power of the two ports is equal to the ratio of the two inductor currents. Therefore, when D_S1 < D_S2, i_L1 < i_L2, i_L1/i_L2 < 1; when D_S1 = D_S2, i_L1 = i_L2, i_L1/i_L2 = 1; when D_S1 > D_S2, i_L1 > i_L2, i_L1/i_L2 > 1. Making D_S1: 0.5–0.8 as the x-axis, D_S2: 0.8–0.5 as the y-axis, and i_L1/i_L2 as the z-axis, the following three-dimensional figure can be obtained as Figure 7 shows.

Charging Mode (Buck): The inductor current i_L1 increases as the duty cycle D_Q1 decreases, and the inductor current i_L2 decreases as the duty cycle D_Q2 increases. Since the two output voltages u_in1, u_in2 are equal, the ratio of the power of the two ports is equal to the ratio of the two inductor currents. Therefore, when D_Q1 < D_Q2, i_L1 > i_L2, i_L1/i_L2 > 1; when D_Q1 = D_Q2, i_L1 = i_L2, i_L1/i_L2 = 1; when D_Q1 > D_Q2, i_L1 < i_L2, i_L1/i_L2 < 1. Making D_Q1: 0.5–0.2 as the x-axis, D_Q2: 0.2–0.5 as the y-axis, and i_L1/i_L2 as the z-axis, the following three-dimensional figure can be obtained as Figure 8 shows.

3.6. Comparison of the Proposed Converter with Other Converters

Some quantitative comparisons between some existing multi-input-port topologies, and the proposed converter are given in

Table 1. Comparison of the converters.

	[22]	[23]	[24]	Proposed
No. of ports	3	4	3	3
No. of switches	12	4	6	4
No. of diodes	0	4	0	0
No. of inductors	6	4	2	2
No. of capacitors	3	5	2	2

. As can be seen, compared to [22,23,24], the number of devices of the proposed converter is less, which means fewer losses and a lower cost.

4. Extension of the Topology

4.1. Topology of the N-Input-Port Bidirectional DC/DC Converter

Based on the topology of the two-input-port bidirectional DC/DC converter shown in Figure 2, the n-input-port bidirectional DC/DC converter topology can be derived as Figure 9 shows. To simplify, assumptions are made as follows:

• Currents of the inductors i_L1, i_L2, …, and i_L2 are all continuous.
• All devices are ideal, regardless of the influence of parasitic parameters.
• Discharging Mode (Boost): during a switching period T_s, S₁, S₂, ..., and S_n interleaved with 360°/n phase shift are turned on with the duty cycle greater than (1 − 1/n), and Q₁, Q₂, ..., and Q_n are turned off. Charging Mode (Buck): during a switching period T_s, Q₁, Q₂, ..., and Q_n interleaved with 360°/n phase shift are turned on with the duty cycle less than 1/n, and S₁, S₂, ..., and S_n are turned off.

4.2. Voltage Conversion Ratio

Discharging Mode (Boost): Due to the voltage-second balance of the inductors L₁, L₂, …, and L_n, it can be derived:

$$D_{\mathrm{S}(i-1)}{u}_{\mathrm{in}(i-1)}=(1-D_{\mathrm{S}(i-1)})(u_{C(i-1)}-u_{C(i-2)}-u_{\mathrm{in}(i-1)})$$

(35)

$$D_{\mathrm{S}i}{u}_{\mathrm{in}i}=(1-D_{\mathrm{S}i})(u_{\mathrm{o}}-u_{\mathrm{C}(i-1)}-u_{\mathrm{in}i})$$

(36)

$$u_{Ci}={\displaystyle \sum _{p=1}^i\frac{u_{\mathrm{in}p}}{1-D_{\mathrm{S}p}}}\left(1\le i\le n-1\right)$$

(37)

$$u_{\mathrm{o}}={\displaystyle \sum _{i=1}^n\frac{u_{\mathrm{in}i}}{1-D_{\mathrm{S}i}}}$$

(38)

When D_S1 = D_S2 = … = D_sn = D_Boost, the ratio of the output voltage u_o, and each input voltage u_ini is the voltage gain M_i of each input port.

$$M_i=\frac{u_{\mathrm{o}}}{u_{\mathrm{in}i}}$$

(39)

$${\displaystyle \sum _{i=1}^n\frac{u_{\mathrm{in}i}}{u_{\mathrm{o}}}}=1-D_{\mathrm{Boost}}$$

(40)

$$\frac{1}{M_1}+\frac{1}{M_2}+\cdots +\frac{1}{M_n}=1-D_{\mathrm{Boost}}$$

(41)

When u_in1 = u_in2 = … = u_inn,

$$M_1=M_2=\cdots =M_n=\frac{n}{1-D_{Boost}}$$

(42)

Charging Mode (Buck): Due to the voltage-second balance of the inductors L₁, L₂, …, and L_n, it can be derived:

$$(1-D_{\mathrm{Q}(i-1)})u_{in(i-1)}=D_{\mathrm{Q}(i-1)}(u_{C(i-1)}-u_{C(i-2)}-u_{in(i-1)})$$

(43)

$$(1-D_{\mathrm{Q}i})u_{\mathrm{in}i}=D_{\mathrm{Q}}{}_i(u_{\mathrm{o}}-u_{C(i-1)}-u_{\mathrm{in}i})$$

(44)

$$u_{C\mathrm{i}}={\displaystyle \sum _{p=1}^i\frac{u_{\mathrm{in}p}}{D_{\mathrm{Q}}{}_p}}\left(1\le i\le n-1\right)$$

(45)

$$u_{\mathrm{o}}={\displaystyle \sum _{i=1}^n\frac{u_{\mathrm{in}i}}{D_{\mathrm{Q}}{}_i}}$$

(46)

When D_Q1 = D_Q2 = … = D_Qn = D_Buck, the ratio of each output voltage u_ini and the input voltage u_o is the voltage gain M_i of each output port.

$$M_i=\frac{u_{\mathrm{in}i}}{u_{\mathrm{o}}}$$

(47)

$${\displaystyle \sum _{i=1}^n\frac{u_{\mathrm{in}i}}{u_{\mathrm{o}}}}=D_{\mathrm{Buck}}$$

(48)

$$M_1+M_2+\cdots +M_n=D_{\mathrm{Buck}}$$

(49)

When u_in1 = u_in2 = … = u_inn,

$$M_1=M_2=\cdots =M_n=\frac{D_{\mathrm{Buck}}}{n}$$

(50)

4.3. Relationship between the Currents of the Inductors

It is assumed that the average values of the inductor currents i_L1, i_L2, ..., and i_Ln are I_L1, I_L2, ..., and I_Ln, respectively.

Discharging Mode (Boost): Due to the ampere-second balance of the capacitors C₁, C₂, …, and C_n, it can be derived as follows:

$$I_{L1}(1-D_{\mathrm{S}1})=I_{L2}(1-D_{\mathrm{S}2})=\cdots =I_{L\mathrm{n}}(1-D_{\mathrm{S}n})$$

(51)

When D_S1 = D_S2 = … = D_sn, I_L1 = I_L2= … = I_Ln. Thus, automatic current sharing is realized. The power of all the ports can be adjusted through controlling D_S1, D_S2, …, and D_Sn, respectively.

Charging Mode (Buck): Due to the ampere-second balance of the capacitors C₁, C₂, …, and C_n, it can be derived:

$$I_{L1}{D}_{\mathrm{Q}1}=I_{L2}{D}_{\mathrm{Q}2}=\cdots =I_{Ln}{D}_{\mathrm{Q}n}$$

(52)

When D_Q1 = D_Q2 = … = D_Qn, I_L1 = I_L2 = … = I_Ln. Thus, automatic current sharing is realized. The power of all the ports can be adjusted through controlling D_Q1, D_Q2, …, and D_Qn, respectively.

In practical applications, the efficiency of the converter will drop along with the increase in the number of input ports.

5. Experimental Results

To verify the analysis presented in the previous sections, experiments were conducted based on a 200 W two-input-port prototype developed from the proposed converter. The specification of the prototype is given in

Table 2. Specification of the prototype.

Parameters	Values
Voltage (uin1, uin2)	24 V
Voltage (uo)	200 V
Output power (Po)	200 W
Switching frequency (fs)	100 kHz
Switch (S1, S2, Q1, Q2)	C3M0280090D
Capacitors	Co: 10 uF, C1: 4 uF
Inductors (L1, L2)	400 uH

, and the experimental results are presented and discussed as follows.

5.1. Constant Duty Cycle

Discharging Mode (Boost): Figure 10a shows the waveforms of u_gs1, u_gs2, u_in1, and u_in2, where the duty cycles are around 0.76. Figure 10b shows the waveforms of u_o, u_Co, and u_C1. It can be seen that the DC values of u_C1 and u_o are about 100 V and 200 V, respectively. The voltage conversion gain is around 8.3, which is consistent with that calculated by Equation (5). Figure 10c shows that the voltage stresses of S₁, S₂, and Q₂ are all about 100 V, while the voltage stress of Q₁ is about 200 V. These are consistent with that obtained by Equations (15)–(17). Figure 10d shows that the currents of L₁ and L₂ are both about 4 A. Apparently, the measured results are all consistent with the previous analysis.

Charging Mode (Buck): Figure 11a shows the waveforms of u_gQ1, u_gQ2, u_in1, and u_in2, the duty cycles are near 0.24. Figure 11b shows the waveforms of u_o, u_Co, and u_C1; it can be seen that the DC values of u_C1, u_o are about 100 V, 200 V, and the conversion gain is approximately 0.12, which is consistent with Equation (10). Figure 11c shows voltage stresses of S₁, S₂, Q₂ are nearly 100 V, and the voltage stress of Q₁ is about 200 V, which are consistent with Equations (18)–(20). Figure 11d shows the waveforms of i_L1, i_L2. The DC values of i_L1, i_L2 are both about 4 A; evidently, the measured results are all consistent with the theoretical analysis.

5.2. Varying Duty Cycle

Discharging Mode (Boost): Figure 12a shows the changes of i_L1 and i_L2 when the duty cycle D_S1 and D_S2 are adjusted. With the increase of the duty cycle, the inductor current increases, and the power of the branch circuit increases.

Charging Mode (Buck): Figure 12b shows the changes of i_L1 and i_L2 when the duty cycle D_Q1 and D_Q2 are adjusted. With the increase of the duty cycle, the inductor current decreases, and the power of the branch circuit decreases.

5.3. Converter Efficiency and Conversion Ratio

Based on the experimental results, the converter efficiency and the conversion ratio are analyzed and presented in this sub-section.

Discharging Mode (Boost): Figure 13a shows the curve of efficiency changing with output voltage after changing the duty cycle and the curve of efficiency changing with output power after changing the load. The calculated loss distribution of the experimental prototype is shown in Figure 13b. The main losses are switching losses 9.59 W, anti-parallel diode losses 3.6 W, and inductor losses 2.874 W. As is shown in Figure 13c, the voltage conversion ratio changes with the duty cycle. When the duty cycle is more than 0.7, the difference between the actual gain and the theoretical gain gradually increases as the duty cycle increases.

Charging Mode (Buck): Figure 14a shows the curve of efficiency changing with output voltage after changing the duty cycle and the curve of efficiency changing with output power after changing the load. The calculated loss distribution of the experimental prototype is shown in Figure 14b. The main losses are anti-parallel diode losses 9 W, switching losses 4.38 W, and inductor losses 2.874 W. As is shown in Figure 14c, the voltage conversion ratio changes with the duty cycle. When the duty cycle is less than 0.3, the difference between the actual gain and the theoretical gain gradually increases as the duty cycle decreases.

6. Conclusions

A multi-input-port bidirectional DC/DC converter for DC microgrid energy storage system applications is proposed in this paper. Comprehensive analyses on the working principle and performance of the proposed converter are given. Experimental results are presented, and it is verified that, compared to the traditional buck and boost converter, the proposed bidirectional converter has the following advantages: (1) a wider range of voltage conversion can be achieved and the voltage stresses of the switches are lower; (2) the power flow of each port can be adjusted easily through the controlling of duty cycles; (3) the number of input ports of the proposed converter can be expanded, which makes it more applicable.