A Review of DC-AC Converters for Electric Vehicle Applications

Abstract

This paper comprehensively reviews the current status of multidisciplinary technologies in electric vehicles. Because the electric vehicle market will expand dramatically in the coming few years, research accomplishments in power electronics technology for electric vehicles will be highly attractive. Challenges in power electronics technology for driving electric vehicles, charging batteries, and circuit topologies are being explored. This paper aims primarily to address the practical issues of the future electric vehicles and help researchers obtain an overview of the latest techniques in electric vehicles, focusing on power electronics-based solutions for both current and future electric vehicle technologies. In this work, different medium-and high-voltage DC-AC inverter topologies are investigated and compared in terms of power losses and component requirements. Recent research on electric vehicle power converters is also discussed, with highlighting on soft-switching and multilevel inverters for electric vehicle motor drives. In this paper, a methodical overview and general classification of DC-AC power converters are presented. In specific topologies, drawbacks such as voltage stresses on active switches and control complications may occur, which can make them difficult for immediate commercialization. However, various modified circuit topologies have been recommended to overcome these drawbacks and enhance the system performance.

1. Introduction

Power electronics interfaces are one of the supporting technologies boosting the transfer from conventional gasoline engine-powered vehicles to BEV, HEV, PHEV, and fuel cell vehicles (FCVs) [1]. In addition, optimizing the conversion of energy from the chemical energy of the battery to the electrical energy via the power electronic circuit and hence to the mechanical energy via the electrical machine needs to be brought to the fore. Many types of power electronics converters are used in BEVs, HEVs, and PHEVs, with the architecture of a series hybrid electric vehicle displayed in Figure 1. In the series configuration, the gasoline engine output is coupled to an electrical generator. The electricity generated by this generator can be utilized to supply power to the main powertrain motor or charge the EV battery. The electric motor is the only element driving the wheels. The motor can be an induction motor, permanent magnet motor, or switched reluctance motor and can be fixed on the vehicle in the same way as in conventional vehicles, without the necessity for a transmission. In-wheel hub motors are also used. In the series configuration, the motor is designed to deliver the required torque to drive the vehicle in all conditions.

There are three power converters types located in the powertrain electrification systems that are used in the vehicle propulsion system: AC-DC converters (rectifiers), DC-DC converters, and DC-AC converters (inverters). Auxiliary units, such as pressure pumps, air-conditioning units, and auxiliary batteries, require a DC-AC inverter or a DC-DC converter at a lower power rating. A DC-AC power inverter converts a DC input voltage to the required magnitude and frequency of AC output voltage. Generally, AC power is more efficient, reliable and widely utilized in many commercial, domestic, and industrial applications, such as the renewable energy system (RES), motor drives system (MDS), and uninterruptible power supplies (UPSs) [1]. An analysis of the EV market is required to assess different topologies of EVs [2]. Almost all EVs in the market nowadays use the similar power electronic conception, which is a two-level inverter (TLIs), as indicated by [3,4]. However, an increase in research is expected for the power electronics topologies used for EV propulsion to improve competitive EVs [5]. The power electronics utilized in an EV are required to comply with specific requirements that are conferred in [6,7]. Packaging possibilities of power electronic circuits provide several advantages in terms of cooling, which affect the design of the cooling capabilities. The robustness and reliability of the power electronic system greatly depend on the cooling system type and performance. With the drastically increased power dissipation of power switches, only high-performance cooling systems should be used to improve converter dimensions. The ability to remove heat greatly influences the overall system design and achieves a cost-optimized solution.

In the battery (HEV/EV), the stored energy must be converted from DC to AC to drive AC motors using DC-AC converters. These converters are called traction inverters, which usually transfer power in the range of tens of kilowatts up to 50 kW. Usually, the semiconductor power switches used in these inverter topologies are insulated gate bipolar transistors (IGBTs). The typical voltage level for these power switches is 600–1200 V. Considering the high-power levels and voltage levels, a three-phase full-bridge inverter uses six semiconductor power devices to create the required voltage for driving electrical motors, as shown in Figure 2. Each bridge leg consists of a higher and lower side IGBT switch. Usually, the switching frequency is in the range of 5 kHz to 20 kHz [8]. Highpower IGBT switches require isolated gate drivers to control their operations. The isolation is galvanic between the higher-voltage output of the gate driver and the lower-voltage control inputs generated by the PWM controller. Moreover, these gate drivers should have integrated protection features such as desaturation and short-circuit detection.

As stated before, the two-level inverter is the most advanced power converter used in electrified vehicles and in industry [9]. The IGBTs have relatively high losses and large harmonic contents in the output voltage compared with the power MOSFETs at this power rating, which increases the electrical motor losses and affects its lifetime. For this reason, it would be favorable to use MOSFET power devices at a lower voltage level. One way to use MOSFETs is to divide the DC-bus voltage into smaller units using capacitors with lower voltage and using one inverter for each DC-bus section. The outputs of the inverters can be connected in series to be able to create the required voltage for the electric motor. This inverter type is called cascaded multilevel inverter (MLIs), as shown in Figure 3. MLIs are a well-known alternative to TLIs, especially in high-power rating and mediumvoltage applications. MLIs deliver AC power with low harmonic contents [10]. However, the key disadvantages of the multilevel converter are the complicated power circuit and the increased number of switching devices. Thus, researchers have designed advanced multilevel power converter topologies with a reduced number of switching devices to ease the circuit complexity and cost [9,10,11,12].

The EV must have a charger for battery charging from the utility grid or other renewable sources. In most electric vehicles widespread on the market nowadays, the charger is a stand-alone component. An EV charger can be either an onboard charger mounted on the vehicle, or it may be an off-board charger mounted on different sites in the infrastructure. It is beneficial that the propulsion power electronics can be utilized for charging; thus, there is no need for separate power electronics in the onboard charger. This will reduce the space and cost requirements of EV applications [11].

The advantages of using MLIs in electric vehicles are discussed in [12,13]. The MLIs have almost no electromagnetic interference (EMI), and therefore, it is a more safe and better accessible choice for vehicles. The efficiency of an MLI is estimated to be higher than that of a TLI. Therefore, MLIs have advantages in EMI and battery utilization.

Many DC-AC inverter circuit configurations and related control strategies have been addressed in several works, comprising two-level PWM DC-AC power inverters (TLIs), conventional MLIs, voltage-source inverters (VSI), current-source inverters (CSI), and impedance-source inverters (ISI) topologies [12,13,14,15]. While conventional two-level PWM inverters (TLIs) are dependable due to a low amount of switching devices, the major shortage of this type is a great total harmonics distortion (THD) in the produced current and voltage. Usually, this can be decreased by controlling the switching devices at high frequency switching. Consequently, attaining a lower THD in the output voltage is accompanied by high switching losses in the switching devices [1,14]. Various circuit topologies can realize a lower THD in the produced current and voltage while allowing decreased power losses [1]. These are classical MLI topologies, such as flying capacitor MLI (FCMLI), diode-clamp inverter (DCMLI), and cascading H-bridge inverters (CHB MLI). They are still efficient with lower-voltage stresses on the switching devices without needing a bulky output passive filter [1,15]. Conversely, conventional MLIs controlled by a low switching frequency need a big number of switching devices and capacitors at DC-link for realizing a lower THD.

Among the various extensive studies conducted to improve numerous aspects of the conventional multilevel PWM inverter, researchers have been attempting to develop innovative multilevel PWM inverter circuit topologies with a reduced number of devices and a simpler control scheme [16]. Several research works have utilized a capacitor in series with switch (switched-capacitor), that has a substantial influence on decreasing the necessary number of isolated DC sources at the input and the number of switching devices [1,17,18]. However, switched-capacitor MLI topologies have complicated arrangements and complex control structure that involve several DC-link capacitors and switching devices with related gate-driving circuits, protection circuits, and cooling requirements. Moreover, unbalanced voltage across capacitors can occur in such topologies. Therefore, voltage balancing methods are necessary for these capacitors, which become more difficult when designing for higher output voltage levels [19]. Therefore, a proper circuit configuration of switched-capacitor and control strategy should be carefully investigated to produce the required voltage-levels at output to achieve a lower voltage-THD with a minimized number of required switching devices and DC-bus capacitors. This will diminish the overall size, cost, and weight of the inverter.

The development of DC-AC inverters for AC motors has become a key area of research in EVs. The target of research in these inverters included an efficiency greater than 95%, an energy density above 3.5 W/cm ${}^3$, a switching frequency of more than 10 kHz, dv/dt less than 1000 V/µs, no failure during the vehicle life, zero EMI, and redundancy. To accomplish these objectives, there are two main directions of research: soft-switching PWM inverters and multilevel PWM inverters. The main resulting contributions from this work could be summarized as follows:

• An overview is provided, and some trends in DC-AC converters for EV applications are discussed.
• The DC-AC converter circuits, two-level PWM inverters, and classical and modern MLI topologies are reviewed.
• A classification of the existing configurations of the DC-AC converter topology is presented to introduce an integrated framework.
• Different types of DC-AC converter topology circuits have been investigated and used in many applications. This helps in selecting the proper DC-AC converter topology circuit for specific applications.
• Finally, these classifications aim to cover all aspects of the DC-AC inverter topology and the advantages and disadvantages of each type to provide a useful framework for future EV applications.

2. Classification of DC-AC Converters Topologies

The general classifications of DC-AC converters (inverters) are presented in Figure 4. Many DC-AC inverter topologies and related control schemes have been explored in the literature. Generally, DC-AC power inverter topologies can be classified as two-level PWM DC-AC inverters (TLIs) and MLI topologies. A MLI topology has some advantages over a TLI topology, summarized as follows:

• The input currents have a sinusoidal shape with low distortion.
• The output voltages have a reduced harmonic distortion.
• Cleaner output waveforms allow a smaller filter size.
• Reduced dv/dt stresses on the converter components, i.e., a reduced dv/dt on the filter results in a reduction in the filter losses and size.
• Reduced common-mode voltage, which reduces common-mode currents.
• Lower switching frequency resulting in reduced switching losses.

Unfortunately, multilevel DC-AC inverters have some disadvantages that can be classified as:

• Larger number of semiconductor switching devices.
• A separate gate-drive circuit is required for each switch.
• Complicated control circuit.
• Higher cost of main circuit and related control system.

3. Two-Level PWM DC-AC Inverters (TLIs) Topologies

The two-level PWM DC-AC inverter (TLI) topologies can be classified as hard-switching and soft-switching inverters, according to their power switching features.

3.1. Hard Switching Topologies

In hard-switching topologies, the power semiconductor devices are connected either to a stiff voltage source inverter (VSI), as shown in Figure 5 [20], or to a current source inverter (CSI), as shown in Figure 6 [20,21,22], or impedance source inverter (ISI), as shown in Figure 7 [20,23]. A VSI is essentially used to invert a constant DC voltage into an AC voltage with an adjustable magnitude and frequency. VSIs and CSIs have some restrictions; thus, they are not appropriate for some types of applications. For example, VSIs cannot boost the voltage level, and CSIs cannot decrease the voltage level [24]; therefore, they cannot work independently for a variety of applications. Furthermore, sudden variations in the switch voltages and currents cause severe switching losses and EMI problems on the switching devices and for the motor supplied from the VSI or CSI [25,26].

An impedance source inverter is distinguished by the presence of an impedance network constituted by capacitors and inductors between the input source and the inverter bridge. The ZSI has the specific ability to use inverter switches to increase the DC-bus voltage. An ISI circuit can turn into a VSI circuit if both inductances have zero value. However, an ISI can become a CSI if both capacitors have zero capacitance. Consequently, ISIs have more flexibility in regulating the output AC voltage than VSIs and CSIs. Moreover, ISIs can overcome the restrictions of VSIs and CSIs by maintaining a smaller size than the DC-DC patterned PWM inverter. The ISI produces the necessary voltage level for an EV motor by monitoring the battery state-of-charge (SOC) and regulating the output power all at once. The addition of LC impedance network increases the cost and volume of the converter [27,28]. The ISI for electric vehicle applications is shown in Figure 7 [23]. ISIs have a lower rating of switching devices for a low boost ratio ranging from 1 to 2.

Another type of DC-AC inverter is the two-boost inverter (TBI), with Figure 8 demonstrating the circuit diagram [29]. The DC inputs of two boost DC-DC power converters are connected in parallel with a DC supply, and the load is connected across the two outputs. Both converters are modulated to generate unipolar DC-biased sinusoidal outputs that are out-of-phase with the other by 180°. Thus, the output voltage across the load shapes a pure sinusoidal waveform. Usually, a sliding mode control can be employed to enhance the dynamic performance of the inverter [30,31,32,33].

The disadvantages of hard-switching VSI, CSI, ISI, and TBI PWM inverters are [34,35,36,37,38,39,40,41,42,43,44]:

• The switching devices in VSI, CSI, ISI, and TBI PWM inverters are required to be controlled at a higher switching frequency to achieve low harmonic distortion in the output voltages and currents.
• Switching losses are high owing to the operation at a higher switching frequency. The VSIs and CSIs are controlled from a small number of kHz up to approximately 100 kHz, while the ISIs and TBIs are usually switched at 20 kHz and higher to realize lower harmonic distortion at the output.
• The switching at higher frequencies is valuable in the CSI, as a minimized element volume can be utilized. Consequently, this can result in an increase in the power losses in the switching devices in both the CSI and VSI, which require a heat sink for cooling. This increases the inverter volume and destroys the benefit of a high frequency switching.
• The output filter is required at both the VSI and CSI output, resulting in an increase in the system size and cost.

Table 1. Summary of the Conventional Hard Switching Topologies and Applications.

Inverter Type	Controller	Modulation Techniques & Control Strategies	Mode of Operation	Reference
VSI	PWM	Unipolar PWM	Buck	[1]
VSI	PWM	Pulse Width Modulation	Buck	[20]
VSI	PWM	high carrier frequency unipolar PWM modulation	Buck	[35]
VSI	SPWM	Sinusoidal pulse width modulation	Buck	[1,14,21]
CSI	PI	Dual Loop Control	Boost	[36]
CSI	SMC	Sliding Mode Control	Boost	[22]
CSI	SPWM	Sinusoidal pulse width modulation	Boost	[21,32,34]
CSI	PWM	Pulse width modulation	Buck, Boost and Buck-Boost	[37,38,39,40]
CSI	PWM	Boost the Voltage in Shoot Through the State	Modified as Improved SBI	[41]
CSI	PWM	Microcontroller-based reference-waveform generation Method	Boost	[42,43]
ISI	PWM	Modified PWM Space Vector Control	—	[44]
ISI	PWM	Shoot-through duty factor control and modulation index control	Modified multiple source application	[27]
ISI	PWM	Maximum Constant Boost with Third Harmonic Injection Control	—	[45]
ISI	PWM	Maximum Boost Control PWM Technique	—	[46]
TBI	SMC	Sliding Mode Control	Boost	[47,48,49,50,51]
TBI	PI	Dual Loop Control	Boost and Buck-Boost	[29,52,53,54,55,56,57,58]
TBI	PID	Ziegler-Nichols Tuning	Buck-Boost	[59,60]
TBI	PWM	Dual Loop Control	Boost	[61,62]
TBI	PWM	Unipolar PWM Control	Boost	[63]
TBI	PWM	One-Cycle Control	Boost	[64]
TBI	AFNNC	Adaptive Fuzzy Rule-Based Neural Network Control	Boost	[65,66]

summarizes the topologies and applications of conventional hard switching converters [45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66].

3.2. Soft Switching DC-AC Topologies

In soft-switching topologies, a resonant high-frequency circuit is added to the classical hard-switching circuit topology. The soft-switching converters are shown in Figure 9. The type of converter is determined according to the position of the resonant network concerning the load, three-phase inverter, and DC-link in the DC-AC inverter systems. The characteristics of the switching device waveforms (ZVS or ZCS) depend on the types of achieved resonant condition(parallel or series). This can be further explained as follows.

3.2.1. Resonant Link DC-AC Inverters

In the resonant DC-AC inverters, the resonant elements are placed between the DC power source and inverter three-phase bridge. The resonant network is employed to force the voltage or current of DC-link periodically down to zero at the moment of switching to create a soft-switching condition. Depending on configuration of the resonant network and gate-pulse switching sequence, the resonant link DC-AC inverters can be subdivided into two main types: (a) resonant AC-link, and (b) resonant DC-link.

(a)

Resonant AC-link: The AC-link waveforms could be either an alternating current or alternating voltage to produce ZCS or ZVS conditions respectively for the DC-AC inverter three-phase bridge. Hereafter, bidirectional power switches should be employed. A resonant AC-link using series resonance was reported in [67]. A parallel resonant AC-link suitable for driving induction motors was studied in [68]. A power conversion systems based-on high-frequency link were presented as a different methodology to power conversion in distribution systems [69]. A resonant circuit with LC high-frequency-link is placed into the input DC-bus. The main disadvantages of the resonant AC-link inverter circuit are that it involves a large number of semiconductor devices and a complex control circuit. They are categorized as series resonant AC-links and parallel-resonant AC-links, as displayed in Figure 9. In the series resonant AC-link, the series resonant components can produce a sinusoidal current waveforms in the link, while in the parallel-resonant mode can produce a sinusoidal voltage-link waveforms.

(b)

Resonant DC-link: The DC-link resonance is a DC-biased fluctuating waveform, whereby unidirectional power switches can be placed in the DC-AC inverter threephase bridge and with ZVS or ZCS soft switching conditions [70]. Resonant networks are located between the DC source and inverter. However, several enhanced soft-switching inverter circuit topologies have been developed [71,72,73,74,75,76], which are categorized as (1) Series-resonant DC-Link inverters, and (2) Parallel-resonant DC-Link inverters.

(1)

Series resonant DC-link: The principle of a series resonant DC-link was proposed in [77,78], as shown in Figure 10. The resonant circuit elements must constantly store an equal amount of energy in each resonance cycle. Subsequently, oscillations might occur because of the input or motor load deviations. The output of the series resonant DC-link must be capacitive. In the case of an inductive load, the capacitors should be placed at the output. For a series resonant DC-link, the inverter switching devices are turned-on and off with ZCS soft-switching. However, several inverter topologies have been demonstrated based on this concept [79,80,81,82,83,84]. In this situation, it is applicable to switch SCRs at high frequencies more than in the forced commutation PWM condition. These characteristics make the series resonant DC-link favorable for high-power and high-dynamic performance applications, such as EV motor drives. The key disadvantages of a series of resonant DC-links are high-link regular/irregular current peaks and complications in the control circuit.

(2)

Parallel resonant DC-link: The concept of parallel resonant DC-link was proposed in [85], as shown in Figure 11. In this circuit, the load can be substituted by a VSI. Therefore, in the DC-link, a resonant voltage appears, where the inverter switching devices can be turned-on or off with a soft switching condition. The semiconductor switches suffer from voltage stresses that are larger than twice the DC source voltage. Utilizing switches with high rating voltage increases the overall cost of the power circuit. Based on this principle, a new circuit was implemented in [86]. Although the topology is slightly different from that studied in [85], the proposed resonant inverter is not promising because of the exceeding of the circuit elements.

To cope with the issues that appear in the resonant DC-link, the bus resonant network has been sometimes adjusted to reduce the clumping factor, accordingly reduces the switch stresses. Therefore, recent topologies have been introduced. They are classified as (i) passively clamped, (ii) actively clamped, and (iii) reduced voltage.

(i)

Passive clamped DC-link: Passive clamp DC-link is accomplished by adding an auxiliary circuit, mainly comprised of passive elements (coupled-inductor), and a diode is placed on the DC-bus [87]. This approach is applied by extracting energy from the LC resonance tank to establish the clamp level. The obtained energy is supplied back to the power source. On the other hand, adequate surplus energy can be stored in the inductor to guarantee zero-crossing position in the voltage waveform of DC-link. Consequently, the DC-link peak voltage stresses are reduced using this technique [87].

(ii)

Active Clamped DC-Link: The concept of the active clamped DC-link was proposed in [88], as shown in Figure 12. The clamping device Sc assists in retrieving the charge stored in capacitor Cc while the average DC-link voltage is still equivalent to the source voltage Vdc. The clamping circuit also supports the creation of an appropriate initial current passing through the resonance inductor Lr for the subsequent resonance cycle. However, this can be attained by correctly adjusting the instant of turning off the clamping switching device Sc. Consequently, the short-circuit is avoided on the DC-link during the zero-crossing instant, thereby removing the dead-time period. The clamp voltage Vcc can be sustained without using an auxiliary DC-power source by accurately regulating the clamping switch Sc. According to this perception, the authors studied some circuit topologies such as [89,90,91,92].

The disadvantages of the active clamped resonant DC-link:

• High ratio of di/dt exists in each switching cycle because the current magnitude is a function of the ratio of clamp voltage to the supply voltage (i.e., k = Vcc/Vdc). The existence of high value of (di/dt) promotes the EMI.
• The variation in the DC-link frequency is a function of K, which adds to the harmonic contents of the load current.
• The additional active clamp circuit adds complexity to the resonant network and increases power losses in the DC-link. Furthermore, accurate control of voltage at DC-link will be more challenging.

(iii)

Reduced Voltage DC-Link: The concept of reduced voltage was proposed in [93], as shown in Figure 13. The loss calculation has also been specified [94]. This topology is composed of two additional resonant elements (Lh and Ch) integrated with the basic parallel resonant DC-link topology. To reach soft switching conditions for the inverter power switches, the resonant switch Sr is energized during each switching cycle. However, the two elements of resonant network ((Lr, Cr) and (Lh, Ch)) are determined in such a way that the resonance frequency of one network (Lh, Ch) is approximately three times that of the second network (Lr, Cr).

The disadvantages of the reduced voltage resonant DC-link are:

• The circuit has two pairs of resonant elements.
• This circuit topology requires a complicated control circuit, such as a current estimation scheme, which estimates the initial current in the resonant main inductor throughout each resonant period.

3.2.2. Load Resonant PWM DC-AC Inverters

Numerous load-resonant PWM DC-AC inverter circuit topologies are described [95,96,97,98,99,100]. Figure 14 shows load resonant DC-AC inverter (LRI) topology for EV motor drive, (a) Series-load resonant DC-AC inverter, and (b) Parallel-load resonant DC-AC inverter [95]. In [96], a thyristor-based topology was proposed for welding purposes. In [101], a different arrangement of LC passive components for these DC-AC inverters was presented. A generalized scheme for the extraction of resonant converter control characteristics using the state-plane diagram is described in [102]. The load resonance DC-AC inverters are categorized into series-load resonant (SLR) and parallel-load resonant (PLR) inverter types. In the (SLR) topologies, the three-phase bridge delivers a square-wave voltage to a series-connected resonant network with the inverter bridge. Thus, the load is connected in series with the resonant network [103], parallel [104], or in a hybrid resonant configuration, such as parallel/series [105,106,107], and multi-resonant [108]. In the (PLR) topologies, the inverter delivers a square-wave-shaped current into the resonant network that is connected to the inverter in parallel. In this case, the load can also appear in series [109,110], or parallel [105,111] with the resonant tank. In load resonant DC-AC inverters, an LC resonant network is placed in series with the load-side, in parallel, or a mixed parallel and series LC connection. As a result, ZVS or ZCS soft switching conditions can be achieved for the switching devices in the inverter bridge.

Hence, the resonant tank generates an oscillating voltage and current waveforms across the load. In either case (i.e., SLR or PLR), the resonant interval determines the conduction times of the switching devices. Therefore, the DC-bus waveform of the load resonant DC-AC inverters is unaltered.

The disadvantages of SLR and PLR DC-AC inverters are:

• The volume and weight of the LC elements become larger.
• Meanwhile, both the semiconductor switches and the resonant elements are connected in the same power transfer path, and the semiconductor switches suffer from severe voltages and current stresses.
• To achieve a wide range of output voltages and to reduce the output harmonic distortion, the quality factor (Q) of the resonant network should be as high as possible.

3.2.3. Resonant Transition DC-AC Inverters

Resonant transition DC-AC inverters may be classified into the following three types according to the principle of resonant transition technique: (a) soft-transition, (b) resonant snubber, and (c) quasi-resonant.

(a)

Soft-Transition: Soft-transition techniques have been reported in the literature as zero-voltage transition (ZVT) inverters and zero current transition (ZCT) inverters [112,113,114,115,116,117,118], as shown in Figure 15 and Figure 16. In the ZVT inverter, when the auxiliary resonant circuit is activated, both the load and the DC bus realize a parallel resonance network, while, in the case of the ZCT inverter, the load and the DC-bus realize a series resonant network. However, the ZCT inverter is not the dual of the ZVT inverter. All the active switches of the inverter-bridge in the soft-transition inverters are turned on and off with ZVT and ZCT, respectively. However, all the diodes and the auxiliary switch in the ZVT inverter topology are subjected to the ZCS turn-on and turn-off, whereas in the case of the ZCT inverter, the diodes and auxiliary switches in the inverter bridge are hardly turned off at levels near the load current. Ref. [70] proposed the concept of soft-transition PWM (STPWM). Consequently, based on this perception, further soft-transition structures have been reported [71,72,73,74,75]. The operation of this topology is similar to that of a conventional PWM converter, except for the duration of the switching transient. This arrangement has the limitation that it requires a substantial number of components comprising three resonant inductors and a diode-bridge.

(b)

Resonant-Snubber: The simple principle of resonant snubbers (RS) is addressed in [76,119], as shown in Figure 17. This arrangement utilizes a resonant capacitor parallel to the switching device to realize zero-voltage switching turn-off and a resonant inductor alongside an additional switch to turn it on with zero voltage. Therefore, it is known as an auxiliary resonant snubber (ARS) inverter [115]. The ARS inverter has been designed particularly for electric propulsion. Therefore, auxiliary switching devices and resonating inductors are used along with resonating snubber capacitors to operate with soft-switching situations. This inverter offers the advantage that all semiconductor devices can perform with the ZVS soft-switching state, whereas all the auxiliary switches can also operate in the ZCS soft-switching. Furthermore, the stray capacitance and parasitic inductance are employed as part of the resonant components. The power losses of the related additional circuit can be further minimized by using soft-switching vector control [116].

(c)

Quasi-Resonant: In quasi-resonant (QR) inverters [120,121,122,123,124,125,126,127,128,129,130,131,132,133,134], as shown in Figure 18, each switching period or cycle has two intervals: the non-resonating interval and resonating interval or period. The resonant interval represents a small period of the switching interval. For the duration of the resonant interval, the resonance network is initiated to facilitate a soft-switching operation. The soft-switching in this case can be zero-voltage soft-switching (ZVS) or zero-current soft-switching (ZCS). However, this principle has been successfully applied to PWM soft-switching converter circuits [120]. Several categories of resonant switching devices were considered as the basic cells, which can be applied to a widespread diversity of topologies. Whereby, when this conception is applied straight to DC-AC conversion [121], the resulting topologies will be extremely complicated because of the large number of required switches. Various QR soft-switching topologies have been introduced [122,123,124,127,128,129,130,131,132,133,134] based on the zero-voltage soft-switching principle. The averaging technique was introduced for modeling quasi-resonant inverters [125]. The utilization of IGBT-GTO cascaded switches achieves a better performance for high-power QR PWM inverters [126]. Refs. [122,123,124,127] proposed topologies of QR based on ZVS with a PWM control method. This adopted control scheme performs a PWM operation at any modulation index. Using additional switches and overmodulation are some of the shortcomings of the PWM technique. To solve such problems, the authors in [128] discussed the space-vector-modulation (SVM) technique. Using this SVM technique, the difficult over-modulation index can be precluded by controlling the time-ratio, and the number of switches is minimized with enhancement in the produced waveforms and a reduction in harmonics. However, the SVM scheme is considered promising to achieve good performance with the PWM scheme.

The key merits of the two-level PWM DC-AC inverters for EV motor drive applications are summarized as follows:

• Simplicity of configuration because of fewer number of components. Therefore, the system is reliable.
• Simplicity of control schemes due to fewer switching devices utilized.
• Can be operated at a high switching frequency, resulting in smaller passive components (i.e., inductors and capacitors).

The major shortcomings of two-level PWM DC-AC inverter topologies for EV motor drive applications are as follows:

• Low total harmonic distortion (THD)
• Higher power losses in semiconductor devices due to high-frequency switching.
• The output voltage has a high dv/dt while the output current has di/dt, which can result in high EMI.
• Sometimes a complicated cooling system is required (heat-sink) that increases the overall size of the system.
• Poor circuit efficiency at high-frequency switching.

For low-power applications, a multilevel inverter can be preferred over two-level PWM DC-AC inverter circuits if the power semiconductor devices are controlled at an exceptionally high frequency (i.e., >100 kHz). However, for high-power applications, classical medium-voltage MLIs are a promising solution that is preferred over two-level inverters because of several benefits such as:

• Low total harmonic distortion (THD).
• Possibility of low-frequency switching.
• Small switching losses.
• Low dv/dt, resulting in low EMI.
• Low-voltage rating of the devices used.
• Higher circuit efficiency.

4. Multilevel DC-AC Inverters (MLIs) Topologies

Achieving a soft-switching operation is a challenging task in the development of multilevel inverters for EV motor drives [135,136,137,138,139,140,141,142]. Nevertheless, multilevel inverters can present several exclusive advantages that are mainly beneficial to EVs. To be exact, they can produce nearby-sinusoidal voltage waveforms with only fundamental frequency, producing smaller harmonic contents in the output current and voltage, reduced power losses, produce almost no EMI, are appropriate for high rating motor drives, and adequate for BEVs where floating DC power sources are logically obtainable. One can overcome the difficulties of the traditional two-level inverter (TLIs), as stated in the previous section. Thus, the expansion of multilevel inverters for EVs can be rapidly accelerated. Multilevel AC output waveforms can be produced by MLI circuit arrangements. Multilevel DC-AC inverters topologies can be classified as classical and advanced inverters.

4.1. Classical Multilevel DC-AC Inverter (MLI) Topologies

For a better understanding of the new advances in MLI topologies, it is necessary to understand classical MLI topologies, which have been reported in the recent literature [1,16]. Three different basic MLI topologies are regularly developed: diode-clamped MLI, flying-capacitors MLI, cascaded H-bridges MLI [143,144,145,146,147]. The following summarizes the different types of multilevel inverters:

4.2. Diode-Clamped Multilevel Inverter Topology

The Diode-Clamped Multilevel Inverter (DC-MLI) topology proposed by [15,148,149] has been used in several experimental works and published articles [150,151,152,153,154,155,156,157,158,159]. These studies have presented results regarding three-, four-, five-, and six-level DC-MLIs. Another application is high-voltage grid applications, where the PV is the supply power to input the DC-bus in addition to variable-speed motor drives [1,14].

A three-phase three-level Diode-Clamped-MLI topology is displayed in Figure 19. Each of the three-phase inverter outputs shares the DC-bus voltage that has been split into five partitions that are clamped by either of the two extra diodes over four DC bus capacitors. The capacitors are C1 to C4. The two diodes clamp the voltage across the switch to the half level of the DC-bus voltage. The middle points of the C2 and C3 capacitors comprise the neutral point of the inverter, and the output voltage has five voltage values referring to the neutral point. The near AC (multilevel/staircase) output voltage signal is synthesized from some inner voltage levels through a number of switches that are connected in series and switched at a low-frequency control.

The main advantages of the DC-MLI topology are as follows [1]:

• Does not require a separate DC supply per bridge leg.
• A combination of DC-link capacitors could be charged together.
• Fewer number of switching devices and capacitors as compared with other conventional topologies.
• The switching losses in the power switches are reduced owing to low switch commutation. Consequently, the efficiency is higher, especially for operation at the fundamental frequency.

The disadvantages of the DC-MLI topology can be presented as follows [150,151,152,153,154,155,156]:

• Reverse recovery problem of clamping diodes; that is, more conduction losses in IGBTs.
• Switching at the fundamental frequency will cause an increase in the current and voltage THD.
• Unequal distribution of power losses among semiconductor devices that produce an asymmetrical temperature distribution.
• Increasing the number of clamping diodes increases the volume and cost of the inverter topology [157,158,159,160,161,162].

4.3. Flying-Capacitor Multilevel Inverter

The flying-capacitor multilevel inverter (FC-MLI) topology was presented in 1992 as a substitute topology to the DC-MLI in [163,164,165]. A five-level three-phase FC-MLI topology is shown in Figure 20. The configuration of this circuit is similar to that of DC-MLI, but DC-side capacitors are placed in a ladder form as a replacement for the clamping diodes [166,167,168,169]. The DC-bus voltage is subdivided by a number of capacitors into various voltage levels with a middle neutral point. Consequently, several inner voltage levels exist at different magnitudes, which are clamped by means of clamping capacitors. The multilevel AC voltages of the FC-MLI are synthesized from several levels of inner voltage through several series-connected switches. The associated switches are controlled in a suitable gate-pulse sequence at a proper switching frequency [151,152,154]. The main advantages of the FC-MLI topology are as follows [1]:

• Requires only one DC source.
• The voltage synthesized in FC-MLI has more resilience than a DC-MLI.
• Ability to control active and reactive power, which can be used for capacitor balancing.
• A considerable number of clamping capacitors can be used as a capacitor bank that supports a short backup power supply for a short period in the case of short-time power outages.

The disadvantages of the FC-MLI topology can be presented as follows [1]:

• The balancing problem of capacitors.
• The increase in the level number will impede the correct charging and discharging of the capacitors.
• Large number of capacitors increase the size and cost of inverter.

Figure 20 shows the three-phase three-level flying-capacitor multilevel inverter (FC-MLI) topology. The number of voltage-levels, and thus the power quality of the FC-MLI inverter, can be further increased by using the full-binary combination schema [142].

4.4. Cascaded H-Bridge Multilevel Inverter Topology

A cascaded H-bridge multilevel inverter (CHB-MLI) is an alternative topology for multilevel inverters that require fewer power semiconductor devices as compared with the topologies described earlier. The CHB-MLI topology is based on the number of H-bridges connected in series with separate DC power sources [174,175]. Figure 21 shows a five-level three-phase CHB-MLI topology. Meanwhile, the terminals of the H-bridge output are in series connection, and the DC power sources must be isolated from each other. Because of this attribute, CHB-MLI has also been introduced for renewable energy sources, such as photovoltaic arrays and fuel cell stacks, to interface with the AC power grid [170,171,172,173,174], because separate DC sources are required in such applications [1], to achieve higher levels [143,170,175,176]. Various classical DC-AC inverters are completed in

Table 2. Comparison of various classical multilevel DC-AC inverters.

Topology	Number of
	DC Voltage Sources	Switches	Antiparallel Diodes	Close Diodes	Capacitors	Balancing Capacitors	Output Voltage Levels
DC–MLI	1	12	12	6	0	2	3
FC–MLI	1	12	12	0	3	2	3
CHB–MLI	3	12	12	0	0	0	3

.

The main advantages of the CHB–MLI topology are as follows [1,151,154,156]:

• The number of output voltage levels is equal to twice the number of DC sources plus one (m = 2 s +1).
• All the power devices operate at the lower switching frequency, resulting in lower switching losses.
• In CHB–MLI, a low rated-voltage is required for the power switch. This results in a lower dv/dt and lower electromagnetic interference (EMI).

The disadvantages of the CHB-MLI topology can be presented as follows [1]:

• To achieve near sinusoidal output voltages with minimum THD, numerous components are required.
• A high number of voltage levels require many separate DC sources, switching devices, and power diodes to construct the circuit.

A cascaded H-bridge multilevel PWM inverter that comprises four floating DC sources for each phase is shown in Figure 21. This inverter is not only specialized by the exclusive benefits of multilevel PWM inverters but also by using identical units of the H-bridge inverter, thus improving the manufacturability and modularity of the system [138].

The literature review in the previous section presented that conventional multilevel PWM inverter circuits have a special benefit over two-level PWM inverters in terms of low THD, low switching losses, and higher efficiency. While traditional multilevel DC-AC inverters are efficient, they are Suffering from too many components. This increases the overall cost and volume of the inverter and requires a complicated control circuit. Hence, it is important to look at various MLI topologies with reduced components, simpler circuit structure, direct control procedures, and simpler control circuits.

5. Advanced Multilevel Inverter (MLI) Topologies

A newly developed type of multilevel DC-AC PWM inverters is the switched-capacitor multilevel inverter (SC–MLI). These newly evolved multilevel DC-AC inverter circuit topologies achieve two-stage energy conversion. The first stage contains a switched-capacitor auxiliary circuit, which is utilized to boost the DC input voltage to the required voltage level. The related switching devices are controlled such that the rectified sine-staircase multilevel waveform is formed throughout the AC output positive half-cycle. The second step is the three-phase-bridge circuit, which converts the DC voltage to a three-phase AC voltage. However, such circuits have a voltage-boosting function; the low voltage input can be stepped up to yield higher levels of output AC voltage.

A MLI can be developed using numerous circuit topologies with switched-capacitor structure that have been suggested in the literature [1,16]. It is essential to first categorize the circuit topologies to explain the advantages and weaknesses of every circuit. These inverter circuits can be categorized according to the element/component used (see Figure 4), resonant-based SC (including inductor), and capacitor-based SC (without inductor) reported in the previous works. For the resonance-based SC, three circuit configurations are treated: cascaded boost-switched-capacitor multilevel inverters (CBSC-MLI), switched-capacitor-boost multilevel inverters using partial charging (SCB-MLI), and switched-inductor multilevel inverter (SI-MLI). Furthermore, there are two configurations of capacitor-based SC inverters: switched-capacitor inverter by means of series/parallel combination (SCI-S/P) and hybrid multilevel inverter with switched-capacitor element (HMI-SC).

5.1. Cascaded-Boost Switched-Capacitor Multilevel Inverters

Figure 22 shows the five-level output voltage of the three-phase cascaded switched-capacitor multilevel boost inverter (CBSC-MLI) power electronics circuit [101]. This inverter has two-stages that are composed of a switched-capacitor boost inverter and conventional three-phase-bridge power circuit. The boost switched-capacitor (SC) circuit is composed of a switched-capacitor, an inductor, and diodes. By stepping-up the DC input voltage, a multilevel voltage waveform can be obtained using a multi-stage switched-capacitor (SC). The control switches operate at a fundamental low frequency. The multilevel voltage is supplied for the input of a full-bridge PWM inverter to produce a staircase AC voltage without isolation transformer. The key advantage is that the input voltage can be raised to attain a higher output voltage value without requiring multiple input DC sources. Low harmonics can be obtained using this inverter topology by increasing the number of voltage levels at the output. However, this requires a substantial number of switches, capacitors, and circuit components.

5.2. Switched-Inductor Multilevel PWM Inverter

This topology was proposed in [1]. The three-phase seven-level SI-MLI is shown in Figure 23. This circuit is composed of two stages that are connected in series. The first stage is an integrated traditional boost DC-DC converter using a SC circuit. The second stage is a three-phase-bridge circuit. The boost DC–DC raises the low DC input voltage and then charges the DC-link capacitors to a particular level of the DC-bus voltage. The SC auxiliary circuit is regulated such that the DC-bus voltage is distributed by the voltage level per capacitor. For example, seven levels output voltage and three voltage steps can be achieved across three series-connected capacitors throughout the positive half-cycle of the fundamental period. This multilevel voltage waveform is converted into a multilevel staircase AC voltage Vo by a three-phase bridge. The output voltage Vo-peak is influenced by the main switch S1 duty cycle. The hybrid modulation scheme can be used for controlling the SI–MLI topology, where only the main switching device S1 operates at a high switching frequency, whereas other switching devices can be operated at a low switching frequency. The key characteristic of this topology is raising the input voltage to a higher value AC output without using many isolated DC sources or transformers. These features make this topology perfect for use in renewable energy applications. However, to accomplish a lower THD, this requires an increasing number of levels in the output voltage, thus requiring bulky capacitors and a high number of switching devices. More power switches require complicated control schemes and complex gate-drive circuits. The number of capacitors required for the SC circuit in an m-level SI-MLI can be calculated as:

$$n=\frac{m-1}{2}$$

(1)

and number of switches S can be expressed as:

$$S=\frac{(m-1)}{2}+2$$

(2)

The number of output voltage levels, m can be calculated by:

$$m=2n+1$$

(3)

where n is the number of capacitors and S is the number of switching devices.

5.3. Switched-Capacitor Boost Multilevel Inverter Using Partial Charging

Figure 24 shows the three-phase partial charging switched-capacitor multilevel boost inverter (SCB-MLI) that generates a 13-level multilevel voltage through a partial charging scheme of switched-capacitor [177]. This topology is composed of a two-stage circuit, an SC boost converter, and a three-phase bridge. However, this circuit topology has similar characteristics to the aforementioned inverter circuit that was reported in [101], where a low DC voltage input can be raised-up to generate a higher staircase AC voltage output without necessitating several isolated DC-voltage sources. The multilevel five, seven, and thirteen-level of output voltage can be obtained by using an SC boost inverter operative with a capacitor partial-charge scheme. The SC boost inverter is controlled by placing particular gate pulses on the switches that regulate the capacitors. Each capacitor is charged gradually to three dissimilar voltage levels. These levels have three equal voltage steps ($Vc1=Vc2=Vc3$) or unequal steps ($Vc1\ne Vc2\ne Vc3$). A greater number of voltage levels can be obtained by addition of several capacitors with their related control switches. The capacitor could work as a voltage gain. A multilevel voltage stepper capacitor was achieved using the partial charging scheme. This results in a reduction in the number of switching devices and components. However, to achieve low harmonic distortion in the output voltage, the of voltage levels number must be raised, which requires the use of several capacitors and switching devices. In this case, the overall system could be more expensive, bulky, complex, and have low reliability.

5.4. Switched-Capacitor PWM Inverter Based on Series-Parallel Combination

Figure 25 demonstrates a three-phase switched-capacitor based inverter by means of series or parallel conversion (SCI-S/P) [178]. An SC stage is utilized to produce three dissimilar levels of voltage (Vc1, Vc2, and Vc3) using the S/P connection of switching devices and capacitor. A seven-level AC-voltage waveform can be produced at output using SC connected with a three-phase bridge. Using a proper control scheme, voltage levels can be achieved during the positive half-cycle of the fundamental output voltage [19,178,179]. As mentioned before, voltage levels could be equal ($Vc1=Vc2=Vc3$) or different ($Vc1\ne Vc2\ne Vc3$). Capacitors are charged from the DC input during the parallel connection while they are discharged during the series connection with the switching devices. A high-frequency multi-carrier PWM control technique is used to achieve a staircase AC-voltage that can be higher than the input voltage [179]. One can extend voltage levels to higher levels using additional stages of capacitors and power switches. The three-phase bridge generates an AC voltage waveform without using a bulky transformer or inductor. Thus, this topology has a reduced size, which could reduce the overall weight and size. The maximum output voltage can be estimated by the capacitor arrangements with the controlled switches. The harmonic distortion in the output voltage waveform can be decreased by increasing levels number of output voltage (i.e., multilevel output voltage) [179]. However, using large numbers of power switches and capacitors can cause oversizing of the overall system and complicate the control circuit. One can use small LC filter circuits to minimize the output harmonics in the inverter voltage. However, this inverter topology could also suffer from unbalanced voltage across the capacitors [19].

5.5. Hybrid Multilevel Inverter Based on Switched-Capacitor

Figure 26 illustrates a switched-capacitor assisted MLI circuit topology for high-power applications, such as the EV motor drive [1,17]. This inverter circuit consists of a multi-stage SC auxiliary circuit and a conventional cascaded three-phase inverter bridge. Hybrid modulation scheme is used for controlling the auxiliary switches at a high frequency switching. However, the switching devices in the three-phase-bridge inverter are controlled with a low frequency switching. Every SC unit is switched in such a way that entire capacitors are charged totally in parallel with the DC source and discharged to the EV load connected in series through the power switches. The multilevel number in the AC output waveform is calculated according to the number of cascaded SC units. The multilevel voltage waveform can be shaped by applying a suitable gate-pulse sequence to the associated switching devices. The inverter circuit produces the AC voltage output waveform into the line frequency. Therefore, the magnitude of the AC output voltage may be higher than or equal to the DC input. The capacitor voltages can be balanced using the fundamental switching frequency without requiring a complex gate-pulse sequence. Seventeen-levels of the staircase sinusoidal output voltage waveforms at the fundamental frequency can be achieved, with a low THD (<5%) and RL output load [1,17]. Owing to the characteristics of the low-pass filter formed by the RL load, the delivered current has a near-sinusoidal waveform. However, multiple stages of the SC units are required to attain a higher number of voltage levels to achieve the minimum value of harmonic distortion at the output.

5.6. Comparison of Several Advanced Multilevel Inverter Topologies

The development of the DC-AC inverter depends t on the particular application for which it is deployed. Generally, the selection requirements of the DC-AC power inverter are based on the merits assessment:

(1)

Output voltage harmonic contents (THD);

(2)

Total power losses in the circuit;

(3)

Semiconductor switching devices and other passive components (diodes, capacitors, and inductors);

(4)

Smaller size of components.

Table 3. Comparison of Several Advanced Multilevel DC-AC Inverter Topologies.

Topology	Number of
	Voltage Levels in the Output	Active Switches	Diodes	Capacitors	Inductors
CBSC	13	10	12	6	1
SCB	13	11	3	2	1
SCI-S/P	13	15	15	6	0
SI	13	9	1	4	1
HMI	25	12	2	2	0

lists a comparison of the existing multilevel PWM DC-AC inverter circuits reported in the literature previously in terms of type and number of components used for producing AC output voltage with thirteen levels.

A key mutual trend detected for the newer SC multilevel PWM inverters in accomplishing lower THD output is that they are controlled with high-frequency PWM switching. Generally, both resonant-based and capacitor-based types of SC-MLI have numerous advantages [18,19,180,181,182] such as:

• These circuits can achieve a high output AC voltages without using a considerable number of isolated input sources.
• Voltage levels can be increased using multiple SC circuits with a suitable control scheme.
• Some applications require an output voltage that exceeds the input voltage. This can be achieved using a boost inverter circuit.

Capacitor-based switched-capacitor multilevel inverters HMI-SC [17] and SCI–S/P [178] have several advantages that can be summarized as [18,19,182]:

• Can be operated without input inductors.
• The number of switching devices and DC sources is lower than that of classical CHB-MLI inverters.
• Multiple units of SC cells can be switched at a high frequency. As the switching frequency increases, smaller passive components can be used.
• Ability to have higher-voltage gain.
• For high-power applications, they are suitable for producing a high multilevel voltage using additional SCC cells.
• Various structures integrate with modular structure.

However, switched-capacitor circuit topologies have also their shortcomings, which can be summarized as:

• More components cause the circuit to be bulky.
• Increasing the power switches results in more power losses.
• High spike or transient current in the capacitors degrades the circuit efficiency.
• Special methods are required for capacitor voltage regulation, such as redundant switching states (RSS).

Resonant-based category SC MLIs SI–MLI [1], CBSC–MLI [101], SCB–MLI [177] have many advantages that can be summarized as in [183]:

• Fewer switching devices and capacitors compared with the capacitor-based type of SC MLI circuits.
• An inductor can be placed in the input circuit. Thus, the resonant characteristics can be utilized for voltage boosting.
• Internal resistance of the resonant inductor limits the spike currents.
• Switching devices in the SCB–MLI circuits are controlled by high-frequency PWM switching. Thus, smaller components could be used. Moreover, the output voltage will be easy to filter, resulting in a low THD.

Conversely, these inverter circuits also have some shortcomings, such as [18,19]:

• High power dissipation exists due to high-frequency switching in the semiconductor devices.
• More stages of SC cells are required to generate more voltage levels, which affects the THD in the output.
• Many clamping diodes are required to block the voltage.
• Complex control circuits are required for controlling the DC-link and capacitor voltages.
• Power switches suffer from high voltage stresses due to a high dv/dt, resulting in high EMI.
• Many power switches are used, resulting in higher switching losses.
• Multi-stages of SC units increase the number of semiconductor devices that require gate drive circuits, protection arrangements, and cooling elements (heat sink) [16]. This leads to increasing overall cost, weight, or size of the inverter.

6. Conclusions

This paper has reviewed the recent status of power electronics technologies in EVs with highlighting DC-AC inverters for EV propulsion. Whereas the EV market will expand widely in the next few years, research works on power electronics converters for EVs will be greatly attractive. Therefore, power electronics technologies play a critical role in the progress of EVs. Moreover, the implementation of innovative DC-AC inverters for electric propulsion is favorable. In this paper, a methodical overview and general classification of DC-AC power converters are presented. Therefore, the elementary principle of each topology and its related applications are discussed. The DC-AC inverter for EV applications and for other applications is outlined. The benefit of increasing the power density and decreasing the switching losses can be attained. However, some circuit topologies have drawbacks such as stresses on devices and complexity in control circuits may occur, which can impede their direct commercialization. Thus, in such cases, several improved circuit arrangements have been recommended to overcome such drawbacks and enhance the circuit performance. These enhancements remain a motivating research focus, and this technology will be widely used in various industry applications in the near future. Many DC-AC PWM inverters were compared in order to choose the best, most effective, and most convenient inverter topology for multisource EVs. In the literature, many approaches have been presented, and their advantages and drawbacks have been identified. Some researchers continue to work toward the modification of the primary impedance source inverter topologies to increase the performance and applicability. The main challenges are to reduce the complexity of these innovative inverters and to sustain high reliability at high-power EV operations.

The developments of the DC-AC inverter depend on the particular application for which it is deployed. Generally, the selection requirements of the DC-AC power inverter are based on the merits assessment. Achieving a soft-switching operation is a challenging task in the development of multilevel inverters for EV motor drives. Nevertheless, multilevel inverters can present several exclusive advantages that are mainly beneficial to EVs. As they can produce smaller harmonic contents in the output current and voltage, reduced power losses, produce almost no EMI. This makes them appropriate for high rating motor drives and adequate for BEVs where floating DC power sources are logically obtainable. Some limitations of EV inverters have been listed along with possible solutions to overcome their shortcomings.