Design of Three-Dimensional Virtual Simulation Experiment Platform for Integrated Circuit Course
Abstract
:1. Introduction
2. Related Work
2.1. Current Situation of 3D Virtual Simulation
2.2. Advantages of Web-Based Virtual Simulation
2.3. Technical Support
2.3.1. 3D Simulation Technology
- (1)
- Unity3d supports the import of models required by projects created by many mainstream 3d modeling software, such as 3dsmax, Maya, C4d, etc.;
- (2)
- Unity3d optimizes the graphics rendering channels of OpenGL and DirectX, which enables it to ensure a certain quality of smooth virtual simulation even on low-end hardware;
- (3)
- After packaging and compiling, Unity3d can not only run on traditional systems such as Windows and macOS, but also on mobile devices such as IOS and Android. Most importantly, it also supports web platforms based on WebGL technology;
- (4)
- Unity3d has a built-in powerful mecanim animation system which can easily add smooth and realistic animation to various objects. It has a built-in editing controller and state machine, in which users can edit and use animation directly. Through script programming control, good animation effects can be created.
2.3.2. Remote Desktop Technology
2.3.3. Website Construction Technology
2.4. Experiment Contents and Goal
2.5. Development Process
3. Method
3.1. Overall Framework
3.1.1. Foundation Layer
3.1.2. Support Layer
3.1.3. Function Layer
3.2. 3D Modeling
3.3. 3D Simulation Development
3.3.1. Design of Presentation Layer
3.3.2. Function Development of Instruments and Equipment
- Preset parameters of the virtual simulation experiment of lithography process: mask selection, number of rotating gluing revolutions, photoresist thickness, exposure time, development time, etc.;
- Preset parameters of the virtual simulation experiment of the etching process: type of etching gas, density of etching gas, etching pressure, etching time, etc.;
- Preset parameters of the diffusion process of the virtual simulation experiment: implanted ion, implanted energy, implantation metering, etc.;
- Preset parameters of the packaging process virtual simulation experiment: wafer segmentation, chip adhesion, resin curing, pin bonding, chip injection molding, laser coding, etc.;
- Preset parameters of the integrated circuit test virtual simulation experiment: test circuit, function signal generator, oscilloscope, DC voltage stabilizing source, etc.
3.3.3. Step Management
3.3.4. Compiling and Exporting Scenarios
- (1)
- In “other settings”, you need to set color space to gamma correctly. Using gamma color space, the standard shader will be written into the color cache in Unity3d, and then visual correction will be carried out in the display stage of the screen and then displayed on the computer screen in brightness. It will correct the light and objects in the virtual space, and make the scene brighter and more realistic;
- (2)
- It should also be noted that the default Aerial font should not be used in Chinese before packaging. Other fonts supporting Chinese packaging should be imported, such as Simeon. Set the Icon image to the virtual simulation lab logo, which will show the simulation lab logo when loading;
- (3)
- There are two mainstream package compression methods: Gzip and Brotli. In Brotli compression mode, the resource compression rate is high after a project is packaged, and the waiting time during the loading and startup phases is short, but the packaging process is long. Gzip, on the other hand, is about 2/3 as efficient as Brotli according to tests by Damiano Perri. However, considering that Gzip supports all major browsers and the platform updates frequently, Gzip packaging is finally selected [19];
- (4)
- Checking the data caching option during packaging and export enables the fast loading function during the second loading. Its principle essence is to use the caching function of the browser [42]. This setting can greatly reduce the waiting time of users. However, we need to pay attention to the memory capacity allowed by the browser and reasonably set the browser cache space.
3.4. Integrated Circuit Design Module Implementation
3.4.1. Set up NoVNC
3.4.2. Synopsys
- (1)
- N-groove polycrystalline silicon gate MOSFET: Threshold voltage , drain-saturation current , drain-source saturation voltage , drain-source breakdown voltage , gate-source breakdown voltage , transconductance , Cut-off frequency (mobility = );
- (2)
- P-groove polycrystalline silicon gate MOSFET: Threshold voltage , drain saturation current , drain-source saturation voltage , drain-source breakdown voltage , gate source breakdown voltage , transconductance , Cut-off frequency (mobility = );
- (3)
- The chip package adopts diP-8 form, the power supply voltage is 1.8 V, and the chip power consumption is less than 10 mW;
3.5. Website Deployment
4. Result and Test
4.1. Testing Configuration Requirements
4.2. Browser Performance Test
4.3. Experimental Results
Integrated Circuit Test Results
4.4. Student Completion and Evaluation
4.4.1. Analysis of Students’ Experimental Results
- (1)
- The score rate of the integrated circuit design module is low, and the completion time is about 2.5 h. However, this part only has four steps, while the whole experiment has 26 steps, so this part takes too much time. The reason for the poor performance of this part by students may be that this part belongs to the traditional simulation experiment, with poor interactivity and high difficulty in using the software. At the same time, it also shows that students’ design ability needs to be further strengthened.
- (2)
- The remaining modules are mainly three-dimensional simulation modules. At the beginning of the module, students’ operation time is longer, while the completion time of other steps is shorter and shorter. To some extent, this reflects that students’ operation proficiency and knowledge application are getting higher and higher. Students reported that the sputtering experiment and oxidation experiment in this module is more difficult, and the failure rate of the experiment is higher. They often have to repeat the experiment several times to get the correct results.
- (3)
- Because the IC manufacturing module has the most steps, the completion time is also the longest. This part takes about 3.5 h. The rest is relatively simple, and the students’ completion speed is relatively fast. Finally, most students can get perfect test results as expected and write experimental reports reasonably.
4.4.2. Analysis of Students’ Course Performance
4.4.3. Student Evaluation
5. Discussion and Conclusions
5.1. Advantages of IC Virtual Experiment Platform
5.2. Cultivation and Promotion of Students’ Ability
- (1)
- Autonomous Learning Ability: The platform contains a large number of video and text materials through which students independently learn relevant knowledge of integrated circuits. Moreover, there are three-dimensional interactive experiments with strong interaction which stimulate students’ interest in independent exploration. In the process of learning and completing the experiment, it can greatly improve students’ self-study ability.
- (2)
- Design and exploration ability: Students can independently customize the process objectives of the inverter and independently design, manufacture, package, and test the inverter. Students can also achieve their own design goals and verify the results by operating experimental equipment. In the process of design and verification, students’ design exploration ability and practical ability will be improved.
- (3)
- Ability to analyze and solve problems: Students need to independently analyze the errors in their operation process and find solutions through the experimental results. For example, in the film preparation in the oxidation process, the wrong setting of a parameter may lead to the error of the whole result. Students can repeatedly analyze the cause of the error according to the wrong experimental results. In the process of this analysis, students’ ability to analyze and solve problems will be exercised and improved.
- (4)
- Innovation ability: The whole experiment includes three-dimensional virtual simulation, which is highly interactive and interesting and can greatly stimulate students’ interest in learning and desire for exploration. In IC design, students will repeatedly think about whether the design indicators can be innovated and optimized and constantly improve the experimental optimization results. In the process of independent learning, independent design, and independent exploration, students’ innovative consciousness and innovative ability can be cultivated.
- (5)
- Emotional attitude cultivation: The experiment covers the whole process of the integrated circuit. There are many steps, including 166 small steps, and they involve a lot of integrated circuit-related knowledge. The experiment is challenging. By completing such a challenging experiment, students’ scientific research ability and scientific research literacy can be improved. Moreover, they can more clearly understand the complexity and difficulty of the integrated circuit industry. For example, only one step of film preparation in the oxidation process is needed to do so many steps, and even repeated failures will be repeated to recalculate the operation. Although the experiment is very difficult, it also exercises the students’ quality of fearing and overcoming difficulties in scientific research.
Author Contributions
Funding
Acknowledgments
Conflicts of Interest
References
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1 | Reverter schematic design |
2 | Inverter schematic diagram function simulation |
3 | Inverter layout layout |
4 | Layout parasitic parameter after simulation |
5 | Wafer cleaning experiment |
6 | Photolithography experiment |
7 | Double well process experiment |
8 | LOCOS isolation process experiment |
9 | Experiment of threshold injection technology |
10 | Polycrystalline silicon gate technology experiment |
11 | LDD injection process experiment |
12 | Side wall technology experiment |
13 | Source drain injection process experiment |
14 | ILD process experiment |
15 | Contact hole process experiment |
16 | Metal layer 1 process experiment |
17 | IMD1 process experiment |
18 | Via hole 1 process experiment |
19 | Metal layer 2 process experiment |
20 | IMD2 process experiment |
21 | Via hole 2 process experiment |
22 | Top metal process experiment |
23 | Passivation layer process experiment |
24 | Integrated circuit packaging experiment |
25 | Integrated circuit characteristic test experiment |
26 | Write and submit experiment report |
1 | Integrated circuit schematic design and simulation |
2 | IC layout design and parasitic parameter simulation |
3 | Integrated circuit manufacturing and cleaning process |
4 | Integrated circuit manufacturing process |
5 | Integrated circuit manufacturing lithography process |
6 | Integrated circuit manufacturing and etching process |
7 | Integrated circuit manufacturing diffusion process |
8 | Integrated circuit manufacturing metal interconnection process |
9 | Integrated circuit packaging process |
10 | Integrated circuit performance test technology |
Principle Description | Design of Equipment and Parameters |
---|---|
The oxidation process thermally grows a uniform layer of dielectric film on the surface of a silicon wafer, which is used as an insulating or masking material. The oxidation process includes high-temperature dry oxygen oxidation and high-temperature wet oxygen oxidation. The oxidation principle equation is as follows: The wet oxygen oxidation principle equation is Derivation of principle formula: Through theoretical analysis and mathematical solution of the oxidation process, a general mathematical expression reflecting the oxidation law of thermal growth can be obtained: (1) The solution of the relationship between oxide layer thickness and oxidation time can be ob-tained from the above formula: (2) For longer oxidation time, , the general relation tends to a parabola, i.e.: (3) For shorter oxidation times, i.e., , the general relation tends to be linear, i.e.,: (4) In the above formula, is the thickness of oxide layer, is the oxidation time, is the parabolic rate constant, is the linear rate constant, and is the correction of the oxidation time after considering that there is a natural oxide layer on the surface of the silicon wafer stored in the air. For wet oxygen oxidation, it is negligible. | Equipment: oxidation diffusion furnaceParameters: silicon oxide film thickness, oxidation time, oxidation temperature |
CPU | Intel® i5-4590/AMD FX 8350 same or higher configuration |
GPU | NVIDIA GT 920 M same or higher configuration |
RAM | 4 GB or higher |
OS | Windows 7 SP1 same or higher version/Mac OS10.9 or higher |
Network speed | Higher than 2 M |
Browser Name | First Loading Time | Secondary Loading Time | Compatibility |
---|---|---|---|
CHROME9 | 289 s | Less than 10 s | Compatible |
FIREFOX9 | 142 s | Less than 10 s | Compatible |
EDGE | 138 s | Less than 10 s | Compatible |
IE11 | NULL | NULL | Not compatible |
Input Frequency | Peak-to-Peak Value of Input Signal | Input Bias | The Output Voltage | The Output Frequency |
---|---|---|---|---|
1 KHZ | 1.8 vpp | 0.9 v | Reverse to input voltage | 1 KHZ |
2 KHZ | 0.3 vpp | 0.3 v | 1.8 v | 2 KHZ |
2 KHZ | 0.2 vpp | 2.0 v | 0 v | 2 KHZ |
Number of User | Pass Rate (Score ≥60) | Excellent Rate (Score ≥80) | Average Completion Time |
---|---|---|---|
1367 | 100% | 66% | 6 to 7 h |
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Lai, Z.; Cui, Y.; Zhao, T.; Wu, Q. Design of Three-Dimensional Virtual Simulation Experiment Platform for Integrated Circuit Course. Electronics 2022, 11, 1437. https://doi.org/10.3390/electronics11091437
Lai Z, Cui Y, Zhao T, Wu Q. Design of Three-Dimensional Virtual Simulation Experiment Platform for Integrated Circuit Course. Electronics. 2022; 11(9):1437. https://doi.org/10.3390/electronics11091437
Chicago/Turabian StyleLai, Ziliang, Yansong Cui, Tonggang Zhao, and Qiang Wu. 2022. "Design of Three-Dimensional Virtual Simulation Experiment Platform for Integrated Circuit Course" Electronics 11, no. 9: 1437. https://doi.org/10.3390/electronics11091437
APA StyleLai, Z., Cui, Y., Zhao, T., & Wu, Q. (2022). Design of Three-Dimensional Virtual Simulation Experiment Platform for Integrated Circuit Course. Electronics, 11(9), 1437. https://doi.org/10.3390/electronics11091437