Motor control systems are known as sandboxes of various engineering disciples. This is because many engineering concepts should be applied for an efficient and high-performance drive of the motor. To name a few: power electronics, analog devices, data, digital devices and data, software design, digital signal processing, digital filters, dynamics, mechanics, thermal mechanics, and heat transfer are the main disciplines that should be considered in every motor control setup [
20,
21]. The complexity of these systems requires a comprehensive scheme for the setup design, where every device is examined accurately in isolated systems and applied in the integrated system along with all other devices. Thus, the setup is divided into three parts of the control unit, the inverter, and the motor. In this section, the design of each piece of hardware and the proper connection is described. Then, an appropriate test is designed for each device to validate the performance with safety consideration, and their proper application in the setup is defined.
2.1.1. The Control Unit
The control unit is the main core of the drive system, which simply runs the motor by applying appropriate signals to the gate drivers of the switches in the inverter. In the closed-loop control systems, the control unit collects the feedback from the motor and, based on the current status of the motor, executes the control processes and implements the control algorithms to generate the signal for the application of the command voltages through the inverter. In this paper, the control unit is categorized into three classifications as follows.
The processor
In the control unit, the processor is the intelligent part where all the other devices are employed to send/receive data to/from other devices in the whole drive system. The algorithms were implemented in the processor, which executed the control process. The PLECS RT box 1 “Plexim GmbH, Zurich Switzerland” was utilized in this setup, which benefitted from the Xilinx Zynq processor of Z-7030. The CPU core of this processor is 2 × 1 GHz, which denotes that it has two cores, each of which has a clock that beats 1 billion times per second. Regarding the resolution of 16 bits, the RT box 1 can manipulate 16 numbers of the bits in each clock bit. Therefore, in each clock bit, the processor provides a possibility of one billion manipulations for each core in all 16 bits. Furthermore, this device provides 2 mega samples per second, which denotes a high sample update rate. For most motor control applications, a sampling rate of 10 kHz is adequate. Therefore, this device offers a strong processor that perfectly meets the motor control applications’ requirements.
The RT box 1 provided the opportunity for rapid control prototyping where the control algorithm was designed in the real-time simulation Plecs platform, and the device was employed as a controller. Furthermore, the high sampling rate and high-fidelity PWM signals, along with the FPGA embedded CPU of RT box 1 offered a versatile processing unit that facilitated the research into control systems for any type of algorithm implementation. Furthermore, thanks to the Xilinx Zynq system-on-chip that benefits from FPGA and CPU cores, the RT box 1 provided a low data transmission latency. In this way, one of the cores was used for communication with the user, and the other core was employed for real-time simulation.
The digital inputs and outputs
The device offered 32 digital inputs and outputs with the logic of 3.3 V and 5 V. The digital breakout board made all digital inputs and outputs accessible via terminal blocks and pin headers.
Figure 1 shows a capture of the PWM signals designed with a 10 kHz carrier frequency for two sinusoidal signals. In addition, the signals were designed with 1 µs dead-time, meaning that for each fall and rise of the first signals, the inverted signal had a delay of 1 µs for rising or falling, respectively. This concept secured the operation of the IGBTs in each leg of the inverter. Therefore, with this concept, there were no longer two turned-on switches at the same time in one leg, and any short circuit in the inverter’s legs was avoided.
The level shifter
The RT box 1 generated the PWM signals for the inverter with the logic of 3.3 V or 5 V, while the inverter (which will be discussed further) in this setup required 15 V of logic for the gate drivers. This being said, a level translator was required to amplify the PWM signals’ level to the gate driver’s level. Hence, a board was designed for dual low-side MOSFET drivers. In this board, the MOSFET driver MIC4127YME “Microchip Technology Inc. West Chandler Blvd, Chandler, Arizona, USA” was utilized. The MIC4127YME translated TTL or CMOS input logic levels to output voltage levels that swung within 25 mV of the positive supply or ground, whereas comparable bipolar devices are capable of swinging only to within 1 V of the supply. Therefore, a desirable output of the board was achieved with this board to have the maximum accuracy of the PWM signals. The PCB design was carried out in ALTIUM, the board was printed in double layers, and the components were assembled in the lab. In this design, the IC-Dual MOSFET Driver required ±15 V for operation. To supply the driver, a positive voltage regulator of L7805CV was supplied by a 2.5 mm power jack that was connected to the grid by a low voltage power supply adaptor with the voltage level of 9 V. The regulated positive voltage output of the voltage regulator was fed to a DC-DC converter of MAU209. The DC-DC converter provided an accurate ±15 V for the current driver. The printed board is illustrated in
Figure 2 and
Figure 3 presents the board’s output for a 5 V level PWM signal.
The speed transducer
As the RT box 1 digital inputs work with the TTL logic, all the digital inputs must be compatible with this logic. Hence, to measure the speed and position status of the motor, an incremental encoder of SICK “Myllynkivenkuja 1, Vantaa, Finland” with TTL/RS-422 was employed in the setup. This encoder generates 2500 pulses per revolution to acquire precise information of the motor shaft position and velocity. The device was supplied with 5 V DC to generate a 5 V output of the transducer. This encoder generates 3 pairs of signals. The pairs of A and B were signals with 90 degree shifts that generated 2500 line pairs in each revolution. The sequence of these pairs indicates the direction of the rotation. Thus, one can define the positive or negative direction of the rotation based on the sequence of the pulses. The pairs of Z provided the index pulse that generated one pulse per rotation. This signal is mainly used in applications where the motor’s position is highly critical, and in case of missed pulses for A and B channels, this signal will reset the counter in each revolution. Besides, in some applications, certain positions are of importance. Hence, in these applications (SynRM control), that particular position (the north pole of phase A in SynRM control) was aligned with the index pulse. In this way, regardless of the initial position of the encoder (as well as SynRM), the encoder would reset by the first index pulse, and afterward, the zero position of the encoder output would be aligned with the defined position.
To mount the encoder on the motor, a 3D printed coupling was designed in the SOLIDWORKS “2020, Wyman Street, Waltham, MA, USA” platform and a frame was used to hold the encoder on the motor. The coupling and the holder were printed in the lab. Then, the encoder was coupled to the motor by the coupling and held by the holder, as shown in
Figure 4.
To test the encoder, it was first supplied by 5 V DC and the outputs of A, B, and an oscilloscope profiled z. Then, the motor was run at a certain speed, and the outputs were displayed. The A and B outputs had the same pulse width and frequency with a 90 degree shift.
To employ the encoder in the real-time setup, the output of the encoder was properly wired to the pin header connection and connected to the RT Box 1 through the digital breakout board. The QEP block of the Plecs simulation setup was employed to count the input pulses of the encoder and to measure the rotor position and speed. The counter of the QEP block was set to (2500 × 4)-1 since all the rising and falling edges were set to count. Then the counted pulses were divided by 360/10,000 to calculate the shaft’s position in the dimension of degrees. To convert this value to the radian, it was multiplied by 2π/360. To validate the results, the motor shaft was rotated for one revolution. In this test, the output of the position calculation block counted up to 2π and dropped to zero. To validate the outputs, a more sophisticated test was completed by rotating the motor with the loading motor at a certain speed. Later, the speed and position information were employed in the closed-loop control of the motor, and the results are displayed in the next section.
The analog inputs and outputs
The RT box 1 offered 16 analog input and output channels with −10–10 V and −5–5 V voltage ranges. The analog input impedance was adjustable to 1 MOhm and 1 ohm with a capacity of 24 pF. The Analogue Breakout Board made the analog inputs and outputs individually accessible via BNC sockets. The breakout board provided the opportunity of reading the single-ended or differential inputs. In this study, the channels were set to −10 to 10 V and 1 kOhm impedance of inputs read in single-ended mode.
The analog transducers
For data exchange, the intermediary devices were designed and exploited in the setup to obtain feedback from the power unit and provide reliable information about the system’s status in terms of voltage and current. Hence, the transducers offered a safe connection between the control unit and the system’s power unit. The applied transducers in this setup were as follows.
The current transducers
For most of the drive applications, the high accuracy of the current feedback was of paramount importance. In this setup, the hall effect LEM “LEM, Bern, Switzerland” current sensors were applied to obtain the current feedback from the motor. As the working point of the system reached up to 30 A, the current transducer of LA 55-P was opted for, which provided the opportunity of measuring up to ±70 A of AC with a supply of ±15 V while keeping the accuracy of ±0.65%. A two-layer board was designed in Altium to assemble on a printed circuit board. In this design, the current transducer required a ±15 V supply for operation. For this purpose, a positive voltage regulator of L7805CV was supplied by a 2.5 mm power jack connected to the grid by a low voltage power supply adaptor with the voltage level of 9 V. The regulated positive voltage output of the voltage regulator was fed to a DC-DC Converter of MAU209. The DC-DC converter provided an accurate ±15 V for the current transducer. The current signal output of L.A. 55-P was connected to the ground of the circuit with a 100 Ohm resistance to generate a precise sensor voltage output. BNC outputs obtained this output. The board was printed in the lab, and the components were assembled. The board was tested, and FLUKE current clamps verified the performance of the board in the lab. To provide a handy device for three-phase connections, the board was placed in a box with 3-phase inputs and outputs, and the supply socket and the BNC outputs were also accessible.
Figure 5 shows the designed current transducers board and the Fluke current clamp to validate the outputs.
To test the current transducers, a three-phase voltage input was applied to a three-phase resistance.
Figure 6 shows the setup for the validation of the current transducers box. The oscilloscope profiled the three-phase currents of the lines. The outputs of the transducers are illustrated in
Figure 7. The sensors correctly measured the three-phase currents, where they showed the same magnitude and frequency with a 120 degree phase shift. To validate the results, the Fluke current clamp was placed in phase a. It can be seen that the current in phase a, which was measured by Fluke, was nearly identical to the current that LEM measured. However, the LEM sensor had a higher accuracy and a bigger bandwidth (200 kHz). Hence, more harmonics were measured by this sensor. One can notice that the scale of the LEM sensors was 10 times bigger than Fluke, which showed that it generated a 10 times bigger output to the same measured current amplitude. It is worth mentioning that using the LEM sensor made the measurement of the DC possible, which was not possible with the Fluke current sensor. Measuring the DC currents is critical for the drive applications. For instance, for the standstill parameter identification test, the measurement of the DC currents is required.
The voltage transducers
The voltage transducer of LTS 25-np “LEM, Bern, Switzerland” was chosen to measure the voltages of the DC link and the line voltages of the motor. The PCB design was designed and prepared in Altium. This board is under work to print and assemble. A differential voltage probe of Pico was utilized in the setup, temporarily.
2.1.2. Inverter
In this setup, the SEMITACH model of SEMICRON inverters was utilized to produce a desirable set of voltages. To provide a safe operation of the inverter, several tests were designed with this inverter. The inverter worked with the nominal current of 30 A and DC-link of 750 V. The three-phase power inputs and outputs were connected with 4 mm banana connectors. To drive the gate drivers through the level-shifter, 15 V BNC connectors were used. In this inverter, the DC link allowed for the application of a desirable DC voltage.
The snubber capacitors were placed as close to the IGBT module as possible to minimize the inductance between the switches and the capacitor. The reverse bias safe operating area of a switching IGBT is square, which means that there is no need to pull the voltage down to zero before reapplying the current or reverse voltage. This means that the IGBT can be switched at full current and full voltage. As far as the switching characteristics of the IGBT alone are concerned, there is theoretically no need for a snubber unless there is a drastic need to reduce the switching losses. However, a snubber is required to deal with short-circuits and the parasitic inductances of the complete switching loop. External elements forced us to use a snubber, and the snubber will be designed according to the converter’s mechanical design. The capacitor snubber was only used for reducing the over vs. the IGBTs turn off by applying zero voltage to the gate drivers. A comprehensive description of the commutation is presented below.
Turn-on: 0…t1 (blocked transistor): Gate current will be triggered by applying a control voltage. Up to the charge quantity, the current solely charges the gate capacitance. The gate voltage rises. As the gate voltage is still below the threshold voltage, no gate current will flow during this period.
Turn-on: t1…t2 (rise of gate current): As soon as the gate voltage has reached the gate voltage threshold, the transistor is turned on, first passing the active region. Gate current rises to load current level (ideal free-wheeling diode) or even exceeds load current pattern for a real free-wheeling diode. Similarly, gate voltage, which is connected to the collector current in the active region by the transconductance, will increase. Since the free-wheeling diode can block the current only at t2, the collector-emitter voltage will not drop considerably up to t2. At t = t2 the charge gate signal will flow into the gate.
Turn-on: switching interval t2…t3 (transistor during turn-on): When the free-wheeling diode is turned off, the collector-emitter voltage will drop almost to the on-state value by time t3. Between t2 and t3, the drain current and gate-source voltage will still be coupled by transconductance; therefore, the collector-emitter voltage remains constant. While the collector-emitter voltage is decreasing, the Miller capacitance is recharged by the gate current with the charge quantity. By t = t3 charge will flow into the gate.
Turn-on: t3…t4 (saturation region): At t3 the transistor is turned on and its curve will have passed the pinch-off area to enter the ohmic area. The gate voltage and collector current are no longer coupled. The charge conducted to the gate at this point affects a further increase in gate voltage up to the gate control voltage. Since the collector-emitter on-resistance depends on the collector current and the gate voltage, the on-state voltage may be adjusted to the physical minimum by the total charge quantity conducted to the gate. The higher the collector-emitter voltage (or commutation voltage), the bigger the charge required to reach a certain gate-emitter voltage.
Turn-off: During turn-off, the described processes will run in the reverse direction; the charge has to be conducted out of the gate by the control current.
Two tests were designed to safely analyze the performance of the inverter as follows.
Gate drivers test
In this test, a DC supply was initially used to supply the gate drivers of the inverter. Then, a DC power supply was utilized to supply the DC link with a limited current range. Then, a function generator was applied to generate PWM signals to the input of the gate drivers. Finally, the outputs of the phase voltages were profiled using a scope to validate the setup’s performance. This test showed that the gate drivers were working with the 15 V logic of the PWM. To avoid any in-rush current, a resistor was connected in series with the DC link.
Figure 8 shows the test bench for this test.
Loading test for the inverter
To assure the performance of the inverter in loading conditions, the outputs of the inverter were connected in a star connection to a three-phase resistor. Then the switching was carried out on the gate drivers, and the voltages were applied to the resistors. The inverter showed a desirable output which validated the performance.
Figure 6 shows the setup for this test. In this test, loading was carried out using a set of pulses commanded by three sinusoidal voltages applied to a three-phase resistance. The test was carried out through the Plecs RT box 1 to generate the PWM pulses. However, a function generator could be sufficient to generate the three-phase pulses. Therefore, in this test, to apply the dead-time and to avoid any risk of damage to the inverter, the RT box 1 was utilized.
Figure 9 shows the results of the inverter loading test. The figure shows the currents of the three-phase resistances sensed by LEM sensors and the phase a current measured by Fluke current clamp. The figure shows that the results were compatible for each phase with a 120 degree shift, and the LEM transducers were capable of measuring higher harmonics and a higher preciseness of the current. Thus, the test validated the performance of all the gate drivers and the power switches, and the inverter could be used in the loop.