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Electronics
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Neuromorphic Computing: Devices, Chips, and Algorithm
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Neuromorphic Computing: Devices, Chips, and Algorithm

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: closed (10 November 2024) | Viewed by 3658

Special Issue Editor

Prof. Dr. Shaogang Hu

E-Mail Website
Guest Editor
State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China
Interests: emerging memory devices; neuromorphic chips; brain-inspired computing

Special Issue Information

Dear Colleagues,

In the quest to replicate and comprehend the computational prowess of the human brain, science and technology have made tremendous advancements. One such area is neuromorphic computing—the engineering feat presenting a promising trajectory for artificial intelligence, machine learning and cognitive computing.

This proposal suggests the topic Neuromorphic Computing: Devices, Chips, and Algorithm for our forthcoming Special Issue. It aims to collate the latest developments, studies, and perspectives encompassing the neuromorphic computing landscape.

This specialized topic will present papers focusing on the breakthroughs in neuromorphic devices, detailing their design, fabrication, or performance, alongside the developments in neuromorphic chips—the powerful brain-inspired processors that are revolutionizing AI hardware.

Moreover, the topic will also cover research exploring innovative algorithms capable of harnessing the potentialities of such hardware. Emphasis will be made on interdisciplinary approaches fusing brain-inspired hardware and software, tackling real-world computational challenges.

We believe that this Special Issue will offer valuable insights to a broad spectrum of readers including researchers, professionals, academics in the fields of computational neuroscience, computer engineering, AI, ML and more.

We welcome submissions addressing these fundamental and experimental aspects of neuromorphic computing, connecting the dots between brain-inspired hardware and the algorithmic keys to unlock their capabilities.

Prof. Dr. Shaogang Hu
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • neuromorphic computing
  • neuromorphic devices
  • brain-inspired hardware, software and algorithm
  • computational neuroscience

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Published Papers (3 papers)

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Research

15 pages, 1114 KiB  
Article
Cross-Domain Object Detection through Consistent and Contrastive Teacher with Fourier Transform
by Longfei Jia, Xianlong Tian, Mengmeng Jing, Lin Zuo and Wen Li
Electronics 2024, 13(16), 3292; https://doi.org/10.3390/electronics13163292 - 19 Aug 2024
Viewed by 683
Abstract
The teacher–student framework has been employed in unsupervised domain adaptation, which transfers knowledge learned from a labeled source domain to an unlabeled target domain. However, this framework suffers from two serious challenges: the domain gap, causing performance degradation, and noisy teacher pseudo-labels, which [...] Read more.
The teacher–student framework has been employed in unsupervised domain adaptation, which transfers knowledge learned from a labeled source domain to an unlabeled target domain. However, this framework suffers from two serious challenges: the domain gap, causing performance degradation, and noisy teacher pseudo-labels, which tend to mislead students. In this paper, we propose a Consistent and Contrastive Teacher with Fourier Transform (CCTF) method to address these challenges for high-performance cross-domain object detection. To mitigate the negative impact of domain shifts, we use the Fourier transform to exchange the low-frequency components of the source and target domain images, replacing the source domain inputs with the transformed image, thereby reducing domain gaps. In addition, we encourage the localization and classification branches of the teacher to make consistent predictions to minimize the noise in the generated pseudo-labels. Finally, contrastive learning is employed to resist the impact of residual noise in pseudo-labels. After extensive experiments, we show that our method achieves the best performance. For example, our model outperforms previous methods by 3.0% on FoggyCityscapes. Full article
(This article belongs to the Special Issue Neuromorphic Computing: Devices, Chips, and Algorithm)
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22 pages, 9424 KiB  
Article
Unsupervised Classification of Spike Patterns with the Loihi Neuromorphic Processor
by Ryoga Matsuo, Ahmed Elgaradiny and Federico Corradi
Electronics 2024, 13(16), 3203; https://doi.org/10.3390/electronics13163203 - 13 Aug 2024
Viewed by 1127
Abstract
A long-standing research goal is to develop computing technologies that mimic the brain’s capabilities by implementing computation in electronic systems directly inspired by its structure, function, and operational mechanisms, using low-power, spike-based neural networks. The Loihi neuromorphic processor provides a low-power, large-scale network [...] Read more.
A long-standing research goal is to develop computing technologies that mimic the brain’s capabilities by implementing computation in electronic systems directly inspired by its structure, function, and operational mechanisms, using low-power, spike-based neural networks. The Loihi neuromorphic processor provides a low-power, large-scale network of programmable silicon neurons for brain-inspired artificial intelligence applications. This paper exploits the Loihi processors and a theory-guided methodology to enable unsupervised learning of spike patterns. Our method ensures efficient and rapid selection of the network’s hyperparameters, enabling the neuromorphic processor to generate attractor states through real-time unsupervised learning. Precisely, we follow a fast design process in which we fine-tune network parameters using mean-field theory. Moreover, we measure the network’s learning ability regarding its error correction and pattern completion aptitude. Finally, we observe the dynamic energy consumption of the neuron cores for each millisecond of simulation equal to 23 μJ/time step during the learning and recall phase for four attractors composed of 512 excitatory neurons and 256 shared inhibitory neurons. This study showcases how large-scale, low-power digital neuromorphic processors can be quickly programmed to enable the autonomous generation of attractor states. These attractors are fundamental computational primitives that theoretical analysis and experimental evidence indicate as versatile and reusable components suitable for a wide range of cognitive tasks. Full article
(This article belongs to the Special Issue Neuromorphic Computing: Devices, Chips, and Algorithm)
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17 pages, 6429 KiB  
Article
Design Optimization of an Enhanced-Mode GaN HEMT with Hybrid Back Barrier and Breakdown Voltage Prediction Based on Neural Networks
by Kuiyuan Tian, Jinwei Hu, Jiangfeng Du and Qi Yu
Electronics 2024, 13(15), 2937; https://doi.org/10.3390/electronics13152937 - 25 Jul 2024
Viewed by 1121
Abstract
To improve the breakdown voltage (BV), a GaN-based high-electron-mobility transistor with a hybrid AlGaN back barrier (HBB-HEMT) was proposed. The hybrid AlGaN back barrier was constructed using the Al0.25Ga0.75N region and Al0.1 [...] Read more.
To improve the breakdown voltage (BV), a GaN-based high-electron-mobility transistor with a hybrid AlGaN back barrier (HBB-HEMT) was proposed. The hybrid AlGaN back barrier was constructed using the Al0.25Ga0.75N region and Al0.1G0.9N region, each with a distinct Al composition. Simulation results of the HBB-HEMT demonstrated a breakdown voltage (1640 V) that was 212% higher than that of the conventional HEMT (Conv-HEMT) and a low on-resistance (0.4 mΩ·cm2). Ultimately, the device achieved a high Baliga’s figure of merit (7.3 GW/cm2) among reported devices of similar size. A back-propagation (BP) neural network-based prediction model was trained to predict BV for enhanced efficiency in subsequent work. The model was trained and calibrated, achieving a correlation coefficient (R) of 0.99 and a prediction accuracy of 95% on the test set. The results indicated that the BP neural network model using the Levenberg–Marquardt algorithm accurately predicted the forward breakdown voltage of the HBB-HEMT, underscoring the feasibility and significance of neural network models in designing GaN power devices. Full article
(This article belongs to the Special Issue Neuromorphic Computing: Devices, Chips, and Algorithm)
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