Selected Papers from 32nd International Telecommunication Networks and Application Conference (ITNAC 2022)

A special issue of Future Internet (ISSN 1999-5903). This special issue belongs to the section "Internet of Things".

Deadline for manuscript submissions: closed (30 April 2023) | Viewed by 13734

Special Issue Editors

School of Engineering and Computer Science, Victoria University of Wellington, Wellington 6140, New Zealand
Interests: cybersecurity; honeypots; applied machine learning

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Guest Editor
School of Computing, Electrical and Applied Technologies, Unitec Institute of Technology, Auckland 1025, New Zealand
Interests: network survivability; sustainable computing and communications; trust computing
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Special Issue Information

Dear Colleagues,

This issue is dedicated to the annual International Telecommunication Networks and Applications Conference (ITNAC 2022) held at Wellington, New Zealand in 2022. Due to the difficulties of international travel, ITNAC 2022 will be a hybrid conference – online and face-to-face.

With the increasing number of emerging robust networks, the challenges associated with the design of new networking protocols, techniques, and applications are never-ending. With the imminent deployment of 5G and 6G on the horizon, the demand for better service and quality has never been greater. ITNAC is a leading forum for researchers and engineers to present and discuss topics related to advanced telecommunication network technologies, services and applications.

ITNAC 2022 seeks to address and capture highly innovative and state-of-the-art research from academia, communications industry and standardization bodies that covers applications for and analysis of distributed, mobile, cognitive and cloud computing; computer and data communications; local and metropolitan networks; as well as optical, wired and wireless telecommunication networks and applications.

The conference focus topics are:

  • Wireline and wireless network
  • Multi-access edge computing, Fog, Mist
  • Modelling and Simulation
  • Cyber Security
  • Data Mining
  • Distributed, Cognitive and Cloud Computing
  • Network Applications & Convergence
  • Local and Metropolitan Networks
  • Community and corporate Wi-Fi
  • Data Communications
  • Networks and Management
  • Software Defined Networking
  • Internet Technologies and Applications
  • Emerging Technologies
  • Mobility and Vehicular Networks
  • Mobile Cellular and Wireless Networks
  • Optical Communications
  • Wireless Sensor Networks
  • Power Efficiency and Sustainability
  • Networking and the Climate Crisis

Dr. Ian Welch
Dr. William Liu
Guest Editors

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Published Papers (3 papers)

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Research

17 pages, 18103 KiB  
Article
RSSI and Device Pose Fusion for Fingerprinting-Based Indoor Smartphone Localization Systems
by Imran Moez Khan, Andrew Thompson, Akram Al-Hourani, Kandeepan Sithamparanathan and Wayne S. T. Rowe
Future Internet 2023, 15(6), 220; https://doi.org/10.3390/fi15060220 - 20 Jun 2023
Cited by 4 | Viewed by 3073
Abstract
Complementing RSSI measurements at anchors with onboard smartphone accelerometer measurements is a popular research direction to improve the accuracy of indoor localization systems. This can be performed at different levels; for example, many studies have used pedestrian dead reckoning (PDR) and a filtering [...] Read more.
Complementing RSSI measurements at anchors with onboard smartphone accelerometer measurements is a popular research direction to improve the accuracy of indoor localization systems. This can be performed at different levels; for example, many studies have used pedestrian dead reckoning (PDR) and a filtering method at the algorithm level for sensor fusion. In this study, a novel conceptual framework was developed and applied at the data level that first utilizes accelerometer measurements to classify the smartphone’s device pose and then combines this with RSSI measurements. The framework was explored using neural networks with room-scale experimental data obtained from a Bluetooth low-energy (BLE) setup. Consistent accuracy improvement was obtained for the output localization classes (zones), with an average overall accuracy improvement of 10.7 percentage points for the RSSI-and-device-pose framework over that of RSSI-only localization. Full article
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19 pages, 395 KiB  
Article
Through the Window: Exploitation and Countermeasures of the ESP32 Register Window Overflow
by Kai Lehniger and Peter Langendörfer
Future Internet 2023, 15(6), 217; https://doi.org/10.3390/fi15060217 - 19 Jun 2023
Viewed by 1920
Abstract
With the increasing popularity of IoT (Internet-of-Things) devices, their security becomes an increasingly important issue. Buffer overflow vulnerabilities have been known for decades, but are still relevant, especially for embedded devices where certain security measures cannot be implemented due to hardware restrictions or [...] Read more.
With the increasing popularity of IoT (Internet-of-Things) devices, their security becomes an increasingly important issue. Buffer overflow vulnerabilities have been known for decades, but are still relevant, especially for embedded devices where certain security measures cannot be implemented due to hardware restrictions or simply due to their impact on performance. Therefore, many buffer overflow detection mechanisms check for overflows only before critical data are used. All data that an attacker could use for his own purposes can be considered critical. It is, therefore, essential that all critical data are checked between writing a buffer and its usage. This paper presents a vulnerability of the ESP32 microcontroller, used in millions of IoT devices, that is based on a pointer that is not protected by classic buffer overflow detection mechanisms such as Stack Canaries or Shadow Stacks. This paper discusses the implications of vulnerability and presents mitigation techniques, including a patch, that fixes the vulnerability. The overhead of the patch is evaluated using simulation as well as an ESP32-WROVER-E development board. We showed that, in the simulation with 32 general-purpose registers, the overhead for the CoreMark benchmark ranges between 0.1% and 0.4%. On the ESP32, which uses an Xtensa LX6 core with 64 general-purpose registers, the overhead went down to below 0.01%. A worst-case scenario, modeled by a synthetic benchmark, showed overheads up to 9.68%. Full article
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29 pages, 3716 KiB  
Article
Analysis of Lightweight Cryptographic Algorithms on IoT Hardware Platform
by Mohammed El-hajj, Hussien Mousawi and Ahmad Fadlallah
Future Internet 2023, 15(2), 54; https://doi.org/10.3390/fi15020054 - 30 Jan 2023
Cited by 18 | Viewed by 7640
Abstract
Highly constrained devices that are interconnected and interact to complete a task are being used in a diverse range of new fields. The Internet of Things (IoT), cyber-physical systems, distributed control systems, vehicular systems, wireless sensor networks, tele-medicine, and the smart grid are [...] Read more.
Highly constrained devices that are interconnected and interact to complete a task are being used in a diverse range of new fields. The Internet of Things (IoT), cyber-physical systems, distributed control systems, vehicular systems, wireless sensor networks, tele-medicine, and the smart grid are a few examples of these fields. In any of these contexts, security and privacy might be essential aspects. Research on secure communication in Internet of Things (IoT) networks is a highly contested topic. One method for ensuring secure data transmission is cryptography. Because IoT devices have limited resources, such as power, memory, and batteries, IoT networks have boosted the term “lightweight cryptography”. Algorithms for lightweight cryptography are designed to efficiently protect data while using minimal resources. In this research, we evaluated and benchmarked lightweight symmetric ciphers for resource-constrained devices. The evaluation is performed using two widely used platform: Arduino and Raspberry Pi. In the first part, we implemented 39 block ciphers on an ATMEGA328p microcontroller and analyzed them in the terms of speed, cost, and energy efficiency during encryption and decryption for different block and key sizes. In the second part, the 2nd-round NIST candidates (80 stream and block cipher algorithms) were added to the first-part ciphers in a comprehensive analysis for equivalent block and key sizes in the terms of latency and energy efficiency. Full article
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