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Micromachines
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Advanced Interconnect and Packaging, 2nd Edition
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Advanced Interconnect and Packaging, 2nd Edition

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "E：Engineering and Technology".

Deadline for manuscript submissions: closed (30 November 2023) | Viewed by 16674

Special Issue Editor

Prof. Dr. Wensheng Zhao

E-Mail Website
Guest Editor
School of Electronics and Information, Hangzhou Dianzi University, Hangzhou 310018, China
Interests: interconnect; packaging; TSV; 3-D IC
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

Unlike transistors, the continuous downscaling of feature size in CMOS technology leads to a dramatic rise in interconnect resistivity and concomitant performance degradation. At nanoscale technology nodes, interconnect delay and reliability become the major bottleneck faced by modern integrated circuits. To resolve these interconnect problems, various emerging technologies including airgap, nanocarbon, optical, and through-silicon via (TSV) have been proposed and investigated. For example, by virtue of TSV technology, dies can be stacked to increase integration density. More importantly, 3D integration and packaging also offer the most promising platform to implement “More-than-Moore” technologies, providing heterogenous materials and technologies on a single chip.

This Special Issue seeks to showcase research papers, communications, and review articles on new developments in advanced interconnect and packaging, i.e., on the design, modeling, fabrication, and reliability assessment of emerging interconnect and packaging technologies.

We look forward to receiving your submissions!

Prof. Dr. Wensheng Zhao
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • interconnect
    • on-chip interconnect
    • Through-Silicon Via (TSV)
    • transmission line
  • advanced packaging
  • 3D integrated circuits and microsystems
  • Antenna in Packaging (AiP)
  • Integrated Passive Device (IPD)

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Related Special Issues

Published Papers (8 papers)

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Editorial

Jump to: Research

3 pages, 142 KiB  
Editorial
Editorial for the Special Issue on Advanced Interconnect and Packaging, 2nd Edition
by Dawei Wang and Wensheng Zhao
Micromachines 2024, 15(5), 643; https://doi.org/10.3390/mi15050643 - 11 May 2024
Viewed by 2778
Abstract
Interconnect and packaging technologies are crucial aspects of modern electronics, and they are essential to achieve high performance, miniaturization and low power consumption of electronic equipment [...] Full article
(This article belongs to the Special Issue Advanced Interconnect and Packaging, 2nd Edition)

Research

Jump to: Editorial

18 pages, 7810 KiB  
Article
A Statistical Approach for Signal and Power Integrity Co-Design in High-Speed Interconnects Considering Non-Linear Power/Ground Noise and Bit-Patterns
by Youngwoo Kim
Micromachines 2023, 14(9), 1654; https://doi.org/10.3390/mi14091654 - 22 Aug 2023
Viewed by 1886
Abstract
In this article, a novel statistical approach is proposed and applied to co-design signal and power integrity (SI/PI) in high-speed interconnects considering the non-linear power/ground noise generated by parallel buffers and bit-patterns. With increased data rates and decreased operating voltages, the allowed noise [...] Read more.
In this article, a novel statistical approach is proposed and applied to co-design signal and power integrity (SI/PI) in high-speed interconnects considering the non-linear power/ground noise generated by parallel buffers and bit-patterns. With increased data rates and decreased operating voltages, the allowed noise margin in high-speed interconnects is continuously reduced, and this trend requires SI/PI co-design. Specifically, non-linear power/ground noise associated with simultaneous switching circuits sharing a power delivery network (PDN) and bit-patterns must be carefully considered during the interconnects’ design and analysis phase. In many cases, conventional electromagnetic (EM) and transient circuit simulators require heavy computational resources or even fail to deliver an accurate result. The proposed statistical method estimates the statistical eye-diagram in the high-speed interconnect considering power/ground noise and bit-patterns such as data bus inversion (DBI) coding. The accuracy and computational efficiency of the proposed method are validated by comparing the result with HSPICE transient simulation result. The proposed method is also compared with conventional statistical methods, such as peak distortion analysis (PDA) and statistical channel simulation in the transient simulator. Lastly, the proposed method is applied to the SI/PI co-design and co-analysis in the high bandwidth memory (HBM) interposer channel. Impacts of decoupling capacitors on hierarchical PDN impedance, statistical eye-diagram of the HBM channel, and bit error rate (BER) Bathtub curves are summarized. Finally, the BER eye-diagram is derived from the estimated statistical eye-diagram for timing and voltage analysis. The impacts of hierarchical PDN design and bit-patterns on SI/PI are discussed. Full article
(This article belongs to the Special Issue Advanced Interconnect and Packaging, 2nd Edition)
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12 pages, 5460 KiB  
Article
Built-In Packaging for Two-Terminal Devices
by Ahmet Gulsaran, Bersu Bastug Azer, Dogu Ozyigit, Resul Saritas, Samed Kocer, Eihab Abdel-Rahman and Mustafa Yavuz
Micromachines 2023, 14(7), 1473; https://doi.org/10.3390/mi14071473 - 22 Jul 2023
Cited by 2 | Viewed by 1703
Abstract
Conventional packaging and interconnection methods for two-terminal devices, e.g., diodes often involve expensive and bulky equipment, introduce parasitic effects and have reliability issues. In this study, we propose a built-in packaging method and evaluate its performance compared to probing and wire bonding methods. [...] Read more.
Conventional packaging and interconnection methods for two-terminal devices, e.g., diodes often involve expensive and bulky equipment, introduce parasitic effects and have reliability issues. In this study, we propose a built-in packaging method and evaluate its performance compared to probing and wire bonding methods. The built-in packaging approach offers a larger overlap area, improved contact resistance, and direct connection to testing equipment. The experimental results demonstrate a 12% increase in current, an 11% reduction in resistance, and improved performance of the diode. The proposed method is promising for enhancing sensing applications, wireless power transmission, energy harvesting, and solar rectennas. Overall, the built-in packaging method offers a simpler, cheaper, more compact and more reliable packaging solution, paving the way for more efficient and advanced technologies in these domains. Full article
(This article belongs to the Special Issue Advanced Interconnect and Packaging, 2nd Edition)
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12 pages, 3342 KiB  
Article
Crosstalk Analysis of Delay-Insensitive Code in High-Speed Package Interconnects
by Bo Sun and Zhaoxin Xu
Micromachines 2023, 14(5), 1033; https://doi.org/10.3390/mi14051033 - 11 May 2023
Viewed by 1429
Abstract
The development of integrated circuits has increased the size of chip interconnects, which has brought challenges to interconnect design in chip packages. The closer the spacing between interconnects, the higher the space utilization, which can cause severe crosstalk problems in high-speed circuits. In [...] Read more.
The development of integrated circuits has increased the size of chip interconnects, which has brought challenges to interconnect design in chip packages. The closer the spacing between interconnects, the higher the space utilization, which can cause severe crosstalk problems in high-speed circuits. In this paper, we applied delay-insensitive coding to the design of high-speed package interconnects. We also analyzed the effect of delay-insensitive coding on crosstalk improvement in package interconnects at 26 GHz for its high crosstalk immunity. Compared to the synchronous transmission circuit, the 1-of-2 and 1-of-4 encoded circuits designed in this paper can reduce crosstalk peaks by 22.9% and 17.5% on average at a wiring spacing of 1–7 μm, which can achieve closer wiring spacing. Full article
(This article belongs to the Special Issue Advanced Interconnect and Packaging, 2nd Edition)
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13 pages, 6134 KiB  
Article
Design and Implementation of Broadband Hybrid 3-dB Couplers with Silicon-Based IPD Technology
by Mengmeng Xu, Jiangtao Su, Ruijin Wang, Zhongjie Lin, Weiyu Xie and Jun Liu
Micromachines 2023, 14(5), 932; https://doi.org/10.3390/mi14050932 - 25 Apr 2023
Viewed by 2343
Abstract
Heterogeneous integration (HI) is a rapidly developing field aimed at achieving high-density integration and miniaturization of devices for complex practical radio frequency (RF) applications. In this study, we present the design and implementation of two 3 dB directional couplers utilizing the broadside-coupling mechanism [...] Read more.
Heterogeneous integration (HI) is a rapidly developing field aimed at achieving high-density integration and miniaturization of devices for complex practical radio frequency (RF) applications. In this study, we present the design and implementation of two 3 dB directional couplers utilizing the broadside-coupling mechanism and silicon-based integrated passive device (IPD) technology. The type A coupler incorporates a defect ground structure (DGS) to enhance coupling, while type B employs wiggly-coupled lines to improve directivity. Measurement results demonstrate that type A achieves <−16.16 dB isolation and <−22.32 dB return loss with a relative bandwidth of 60.96% in the 6.5–12.2 GHz range, while type B achieves <−21.21 dB isolation and <−23.95 dB return loss in the first band at 7–13 GHz, <−22.17 dB isolation and <−19.67 dB return loss in the second band at 28–32.5 GHz, and <−12.79 dB isolation and <−17.02 dB return loss in the third band at 49.5–54.5 GHz. The proposed couplers are well suited for low cost, high performance system-on-package radio frequency front-end circuits in wireless communication systems. Full article
(This article belongs to the Special Issue Advanced Interconnect and Packaging, 2nd Edition)
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8 pages, 6274 KiB  
Communication
Extracting and Analyzing the S-Parameters of Vertical Interconnection Structures in 3D Glass Packaging
by Jinxu Liu, Jihua Zhang, Libin Gao and Hongwei Chen
Micromachines 2023, 14(4), 803; https://doi.org/10.3390/mi14040803 - 31 Mar 2023
Cited by 10 | Viewed by 1910
Abstract
In order to effectively employ through-glass vias (TGVs) for high-frequency software package design, it is crucial to accurately characterize the S-parameters of vertical interconnection structures in 3D glass packaging. A methodology is proposed for the extraction of precise S-parameters using the transmission matrix [...] Read more.
In order to effectively employ through-glass vias (TGVs) for high-frequency software package design, it is crucial to accurately characterize the S-parameters of vertical interconnection structures in 3D glass packaging. A methodology is proposed for the extraction of precise S-parameters using the transmission matrix (T-matrix) to analyze and evaluate the insertion loss (IL) and reliability of TGV interconnections. The method presented herein enables the handling of a diverse range of vertical interconnections, encompassing micro-bumps, bond-wires, and a variety of pads. Additionally, a test structure for coplanar waveguide (CPW) TGVs is constructed, accompanied by a comprehensive description of the equations and measurement procedure employed. The outcomes of the investigation demonstrate a favorable concurrence between the simulated and measured results, with analyses and measurements conducted up to 40 GHz. Full article
(This article belongs to the Special Issue Advanced Interconnect and Packaging, 2nd Edition)
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15 pages, 12464 KiB  
Article
Analysis of Degradation of Electromigration Reliability of Au-Al and OPM Wire Bonded Contacts at 250 °C Using Resistance Monitoring Method
by Xueqin Li, Linchun Gao, Tao Ni, Jingnan Zhou, Xiaojing Li, Yifan Li, Lida Xu, Runjian Wang, Chuanbin Zeng, Bo Li, Jiajun Luo and Jing Li
Micromachines 2023, 14(3), 640; https://doi.org/10.3390/mi14030640 - 12 Mar 2023
Cited by 1 | Viewed by 2024
Abstract
The ongoing trend towards miniaturization and increased packaging density has exacerbated the reliability problem of Au-Al heterogeneous metal bonding structures in high-temperature environments, where extreme temperatures and high current pose a serious challenge. In order to address this issue, the present study aims [...] Read more.
The ongoing trend towards miniaturization and increased packaging density has exacerbated the reliability problem of Au-Al heterogeneous metal bonding structures in high-temperature environments, where extreme temperatures and high current pose a serious challenge. In order to address this issue, the present study aims to investigate the electromigration reliability of Au-Al bonding by comparing the conventional heterogeneous contacts with OPM structures, which are homogeneous contacts. A novel bonding layout was developed to precisely detect the resistance and obtain stage changes in electromigration. The experimental results demonstrated that the relative resistance shift of Au-Al bonding at 250 °C was 98.7%, while CrAu and NiPdAu OPM structures exhibited only 46.1% and 2.93% shifts, which suggests that the reliability of OPM structures was improved by a factor of 2.14 and 33.6, respectively. The degradation of Au-Al bonding was attributed to the large cracks observed at the bonding interface and lateral consumption of Al elements. In contrast, OPM structures only exhibited tiny voids and maintained a better bonding state overall, indicating that homogeneous metal contacts have better immunity to electromigration. Furthermore, this study also observed the polarity effect of electromigration and analyzed the impact of NiPdAu thickness on reliability. Overall, this research provides a novel approach and an insightful theoretical reference for addressing the bottleneck of high-temperature electromigration reliability in high-temperature sensor packaging. Full article
(This article belongs to the Special Issue Advanced Interconnect and Packaging, 2nd Edition)
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12 pages, 4844 KiB  
Article
Solving the Bonding Problem of the Ni Thin Coating with the Ultrasonic Assisted Electrochemical Potential Activation Method
by Zhong Zhao, Guanying Huo and Huifang Li
Micromachines 2023, 14(1), 34; https://doi.org/10.3390/mi14010034 - 23 Dec 2022
Viewed by 1519
Abstract
Electroplating nanocrystallite Ni coating can improve the mechanical properties of the metal structure surface, which is widely used in fabricating metal MEMS devices. Because of the large internal compressive stress caused by the oxidation layer of the substrate surface, the Ni coating easily [...] Read more.
Electroplating nanocrystallite Ni coating can improve the mechanical properties of the metal structure surface, which is widely used in fabricating metal MEMS devices. Because of the large internal compressive stress caused by the oxidation layer of the substrate surface, the Ni coating easily falls off from the substrate surface. To solve this bonding problem, the ultrasonic assisted electrochemical potential activation method was applied. The ultrasonic experiments have been carried out. The bonding strength was measured by the indentation method. The substrate surface oxygen element was tested by the X-ray photoelectron spectroscopy (XPS) method. The dislocation was observed by the TEM method. The compressive stress was tested by the XRD method. The coating surface roughness Ra was investigated by the contact profilometer method. The results indicated that the ultrasonic activation method can remove the oxygen content of the substrate surface and reduce the dislocation density of the electroplating Ni coating. Then, the compressive stress of the electroplated Ni coating has been reduced and the bonding strength has been improved. From the viewpoint of the compressive stress caused by the oxygen element of the substrate surface, mechanisms of the ultrasonic activation method to improve the bonding strength were researched originally. This work may contribute to enhancing the interfacial bonding strength of metal MEMS devices. Full article
(This article belongs to the Special Issue Advanced Interconnect and Packaging, 2nd Edition)
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