Hardware-Friendly Machine Learning and Its Applications, 2nd Edition
A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "E：Engineering and Technology".
Deadline for manuscript submissions: closed (25 June 2023) | Viewed by 8455
Special Issue Editor
Interests: computer architecture; emerging technologies; machine learning; hardware security; neuromorphic computing; bioinformatics
Special Issues, Collections and Topics in MDPI journals
Special Issue Information
Dear Colleagues,
Machine learning algorithms, such as those for image object detection, object recognition, multicategory classification, and scene analysis, have shown impressive performance and success in recent decades in various applications, achieving close to human-level perception rates. However, their computational complexity still challenges the state-of-the-art computing platforms, especially when the application of interest is tightly constrained by the requirements of low-power, high-throughput, real-time response, etc. In recent years, there have been enormous advances in implementing machine learning algorithms with application-specific hardware. There is a timely need to map the latest learning algorithms to physical hardware to achieve huge improvements in performance, energy efficiency, and compactness. Recent progress in computational neurosciences and nanoelectronic technology will further help to shed light on future hardware–software platforms for efficient machine learning. This Special Issue aims to explore the potential of efficient machine learning, reveal emerging algorithms and design needs, and promote novel applications. It will also collect contributions on the advancement of methodologies and technologies for the design, evaluation, and optimization of software, hardware, and emerging applications representing the current solution to support the diverse computing scenarios in which machine learning is exploited.
Topics of interest include, but are not limited to, the following:
- New microarchitecture designs of hardware accelerators for ML;
- Sparse learning, feature extraction, and personalization;
- Deep learning with high speed and high power efficiency;
- Computing models and hardware architecture co-design for machine learning;
- New microarchitecture designs of hardware accelerators using emerging devices;
- Tools for the modeling, simulation, and synthesis of hardware accelerators
- ML acceleration for edge computing and IoT.
Dr. Arman Roohi
Guest Editor
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Keywords
- machine learning
- design methodology
- co-design
- framework
- computing methodologies
- hardware accelerators
- DNN compression
- DNN quantization
- edge AI
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Related Special Issue
- Hardware-Friendly Machine Learning and Its Applications in Micromachines (10 articles)
