Wide Bandgap Based Devices: Design, Fabrication and Applications, 4th Edition

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: closed (15 March 2024) | Viewed by 5449

Special Issue Editor


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Guest Editor
Department of Microelectronics, Harbin Institute of Technology, Harbin 150001, China
Interests: wide bandgap semiconductor materials and nanoelectronics

Special Issue Information

Dear Colleagues,

Wide-bandgap (WBG) semiconductor materials have become a key driver in the development of electronic devices, driving innovation in multiple areas. The WBG semiconductor materials mainly include SiC, GaN, AlN, AlGaN, BN and Ga2O3. Among them, SiC and GaN perform well in power electronics, their high electron mobility and electron saturation drift speed making them ideal for power-switching devices with high energy efficiency and high-power density. At the same time, GaN and indium InGaN and other wide-bandgap semiconductors have also changed traditional lighting technology. For example, GaN LEDs have high light efficiency, long life and high color temperature characteristics. By carefully designing the band of the semiconductor structure, it is possible to control the color of the light emitted for high-efficiency lighting systems and display devices. Current research into AlN, especially AlGaN, is focused on improving growth techniques to obtain higher-quality films, as well as on optimizing device structures for high-frequency power-switching devices, such as high-voltage converters, motor control, power inverters and so on. These devices have higher efficiency and lower switching losses, which help to improve energy conversion efficiency and reduce power loss.

BN, a WBG semiconductor material, has extremely high thermal conductivity and can be used for heat dissipation in high-power systems to improve performance and reliability. Additionally, BN is interested in ultraviolet (UV) and deep-ultraviolet (DUV) LEDs, while Ga2O3 is also useful in photodetectors and laser diodes (LDs). BN is represented in various forms, such as nanosheets, nanotubes, nanoribbons and twins, making it promising for the new generation of devices. In summary, the current wide-bandgap semiconductors are based on basic material research, application property research, architecture technology and device architecture design. This Special Issue will focus on the following topics:

  1. Boron nitride polymorphic (thin films, tubes and bands) growth for electronic devices;
  2. Mid-infrared optical devices based on WBG;
  3. Ga2O3 thin films for photodetectors and LD;
  4. Exploration of group III-V semiconductors in quantum information, high-energy physics experiments, satellite communications and medical devices;
  5. Characteristics and application exploration of multi-form and multi-dimensional wide-bandgap semiconductors.

Prof. Dr. Ling Li
Guest Editor

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Keywords

  • wide-bandgap (WBG) devices
  • deep UV devices
  • mid-infrared devices
  • power devices
  • optoelectronics
  • GaN
  • Ga2O3
  • AlN
  • SiC
  • BN

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Published Papers (3 papers)

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Research

11 pages, 3519 KiB  
Article
Optimization of Non-Alloyed Backside Ohmic Contacts to N-Face GaN for Fully Vertical GaN-on-Silicon-Based Power Devices
by Youssef Hamdaoui, Sofie S. T. Vandenbroucke, Sondre Michler, Katir Ziouche, Matthias M. Minjauw, Christophe Detavernier and Farid Medjdoub
Micromachines 2024, 15(9), 1157; https://doi.org/10.3390/mi15091157 - 15 Sep 2024
Viewed by 1248
Abstract
In the framework of fully vertical GaN-on-Silicon device technology development, we report on the optimization of non-alloyed ohmic contacts on the N-polar n+-doped GaN face backside layer. This evaluation is made possible by using patterned TLMs (Transmission Line Model) through direct laser writing [...] Read more.
In the framework of fully vertical GaN-on-Silicon device technology development, we report on the optimization of non-alloyed ohmic contacts on the N-polar n+-doped GaN face backside layer. This evaluation is made possible by using patterned TLMs (Transmission Line Model) through direct laser writing lithography after locally removing the substrate and buffer layers in order to access the n+-doped backside layer. As deposited non-alloyed metal stack on top of N-polar orientation GaN layer after buffer layers removal results in poor ohmic contact quality. To significantly reduce the related specific contact resistance, an HCl treatment is applied prior to metallization under various time and temperature conditions. A 3 min HCl treatment at 70 °C is found to be the optimum condition to achieve thermally stable high ohmic contact quality. To further understand the impact of the wet treatment, SEM (Scanning Electron Microscopy) and XPS (X-ray Photoelectron Spectroscopy) analyses were performed. XPS revealed a decrease in Ga-O concentration after applying the treatment, reflecting the higher oxidation susceptibility of the N-polar face compared to the Ga-polar face, which was used as a reference. SEM images of the treated samples show the formation of pyramids on the N-face after HCl treatment, suggesting specific wet etching planes of the GaN crystal from the N-face. The size of the pyramids is time-dependent; thus, increasing the treatment duration results in larger pyramids, which explains the degradation of ohmic contact quality after prolonged high-temperature HCl treatment. Full article
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12 pages, 3339 KiB  
Article
A Novel SiC Trench MOSFET with Self-Aligned N-Type Ion Implantation Technique
by Baozhu Wang, Hongyi Xu, Na Ren, Hengyu Wang, Kai Huang and Kuang Sheng
Micromachines 2023, 14(12), 2212; https://doi.org/10.3390/mi14122212 - 7 Dec 2023
Viewed by 1940
Abstract
We propose a novel silicon carbide (SiC) self-aligned N-type ion implanted trench MOSFET (NITMOS) device. The maximum electric field in the gate oxide could be effectively reduced to below 3 MV/cm with the introduction of the P-epi layer below the trench. The P-epi [...] Read more.
We propose a novel silicon carbide (SiC) self-aligned N-type ion implanted trench MOSFET (NITMOS) device. The maximum electric field in the gate oxide could be effectively reduced to below 3 MV/cm with the introduction of the P-epi layer below the trench. The P-epi layer is partially counter-doped by a self-aligned N-type ion implantation process, resulting in a relatively low specific on-resistance (Ron,sp). The lateral spacing between the trench sidewall and N-implanted region (Wsp) plays a crucial role in determining the performance of the SiC NITMOS device, which is comprehensively studied through the numerical simulation. With the Wsp increasing, the SiC NITMOS device demonstrates a better short-circuit capability owing to the reduced saturation current. The gate-to-drain capacitance (Cgd) and gate-to-drain charge (Qgd) are also investigated. It is observed that both Cgd and Qgd decrease as the Wsp increases, owing to the enhanced screen effect. Compared to the SiC double-trench MOSFET device, the optimal SiC NITMOS device exhibits a 79% reduction in Cgd, a 38% decrease in Qgd, and a 41% reduction in Qgd × Ron,sp. A higher switching speed and a lower switching loss can be achieved using the proposed structure. Full article
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12 pages, 4915 KiB  
Article
Design of Trench MIS Field Plate Structure for Edge Termination of GaN Vertical PN Diode
by Sung-Hoon Lee and Ho-Young Cha
Micromachines 2023, 14(11), 2005; https://doi.org/10.3390/mi14112005 - 28 Oct 2023
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Abstract
In this study, we developed an analytic model to design a trench metal–insulator–semiconductor (MIS) field plate (FP) structure for the edge termination of a vertical GaN PN diode. The key parameters considered in the trench MIS FP structure include trench depth, MIS dielectric [...] Read more.
In this study, we developed an analytic model to design a trench metal–insulator–semiconductor (MIS) field plate (FP) structure for the edge termination of a vertical GaN PN diode. The key parameters considered in the trench MIS FP structure include trench depth, MIS dielectric material and thickness, and interface charge density of MIS. The boundary conditions are defined based on the maximum allowed electric field strengths at the dielectric and semiconductor regions. The developed model was validated using TCAD simulations. As an example, a 1 kV GaN vertical PN diode was designed using the optimized FP structure, which exhibited the same breakdown voltage characteristics as an ideal one-dimensional PN diode structure without edge effects. This proposed simple analytic model offers a design guideline for the trench MIS FP for the edge termination of vertical PN diodes, enabling efficient design without the need for extensive TCAD simulations, thus saving significant time and effort. Full article
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