A Low-Cost CMOS-MEMS Piezoresistive Accelerometer with Large Proof Mass

Abstract

This paper reports a low-cost, high-sensitivity CMOS-MEMS piezoresistive accelerometer with large proof mass. In the device fabricated using ON Semiconductor 0.5 μm CMOS technology, an inherent CMOS polysilicon thin film is utilized as the piezoresistive sensing material. A full Wheatstone bridge was constructed through easy wiring allowed by the three metal layers in the 0.5 μm CMOS technology. The device fabrication process consisted of a standard CMOS process for sensor configuration, and a deep reactive ion etching (DRIE) based post-CMOS microfabrication for MEMS structure release. A bulk single-crystal silicon (SCS) substrate is included in the proof mass to increase sensor sensitivity. In device design and analysis, the self heating of the polysilicon piezoresistors and its effect to the sensor performance is also discussed. With a low operating power of 1.5 mW, the accelerometer demonstrates a sensitivity of 0.077 mV/g prior to any amplification. Dynamic tests have been conducted with a high-end commercial calibrating accelerometer as reference.

1. Introduction

The piezoresistive effect is one of the most exploited physical effects in sensors. Since the discovery of the excellent mechanical properties and late on the manufacturability of silicon and other semiconductors, a large array of MEMS piezoresistive sensors have been developed [1–3]. MEMS piezoresistive accelerometers have also been extensively attempted [4]. According to the topological configurations of the sensing elements, the reported piezoresistive accelerometers can be classified into the following four thing listed categories [5]:

• Single-clamped beams, where the seismic mass is suspended with only one beam, and the bending of the beam leads to stress and strain on both sides of the beam with opposite polarity; whereas the neutral axis itself is stress free;

• Double-clamped beams, where the seismic mass is suspended by two (or more) beams and the mechanical stress is mainly concentrated in four areas in each beam;

• Axially loaded beams, where the seismic mass is accelerated in the axial direction of the beam, and the acceleration leads to a stretching of the beam instead of a bending;

• Some special sensing structures with combination of the above configurations, including asymmetrical beams [6,7].

CMOS-MEMS technology provides a viable means for monolithic integration of MEMS elements with mainstream CMOS electronics, for an overall improved device performance and possible lower cost [8]. Post-CMOS MEMS has been proven as a strong competitor in the integration [9]. Numerous CMOS-MEMS piezoresistive accelerometers using these above four topologies have been investigated. Thus far most of the reported CMOS-MEMS piezoresistive accelerometers use thin film structures as proof mass [10,11]. Although the surface micromachining processes employed for the creation of these devices are quite simple, due to the small structure thickness, the devices suffer from low sensitivity and other shortcomings. Moreover, the residual stress in the CMOS thin films often causes large structure curling. Thus, the area and mass of the proof mass structure is also limited. DRIE based dry bulk CMOS-MEMS technology has paved pathways for microfabrication of various devices with robust MEMS structures and desired device sizes [12,13]. Compared with the wet process for SCS proof mass manufacturing [14,15], the DRIE method is more effective and environmentally-friendly.

In this work, a low cost, high sensitivity CMOS-MEMS piezoresistive accelerometer is designed, fabricated and tested. Compared to the reported devices, higher sensor sensitivity and larger process tolerance are achieved by using a maskless bulk DRIE CMOS-MEMS microfabrication to include SCS as proof mass. Inherent CMOS SiO₂/Aluminum laminated composite layers are employed to form cantilevers in which the CMOS polysilicon layer as the sensing elements are embedded. On the other end of the cantilevers, a large proof mass with SCS attached is connected to increase the stress induced in the cantilevers upon the application of an out-of-plane acceleration. Using multiple CMOS metal layers, the four poly resistors are conveniently wired to form a full sensing Wheatstone bridge for even higher sensitivity.

2. Device Design and Simulation

2.1. Device Design

Figure 1 shows a 3-D structural model of the fabricated accelerometer with the inset showing the cross-sectional view of the CMOS composite beams in which the sensing polysilicon piezoresistors are embedded. Inset “A” and “B” show cross-sections of the folded polysilicon resistors that are arranged in longitudinal and transverse direction, respectively. The sensor has a SCS proof mass of 500 μm × 500 μm in size and approximately a 40 μm thickness. The SCS proof mass is anchored through the four cantilever beams that consist of the inherent CMOS SiO₂/Al thin films with a total thickness of approximately 5 μm. The planar dimension of each composite beam is 200 μm × 13 μm. The inherent CMOS polysilicon layer, which is used as the piezoresistive sensing material, has a thickness of approximately 0.35 μm, according to the standard ON 0.5 μm CMOS technology used in this project. The schematic cross-section of the CMOS thin films and their spatial locations are illustrated in Figure 2. The typical thin film parameters of the ON 0.5 μm technology is listed in

Table 1. Typical CMOS Layers Thickness in the ON 0.5 μm Technology Used.

Layers	Thickness (μm)
Single Crystal Silicon (SCS)	∼250
Field Oxide under Poly, Hox	0.4
Field Oxide under Metal 1	0.375
Gate Oxide	0.0135
Polysilicon, tpoly	0.35
Metal, HAl	0.77
Boron-phosphorus-silicate-glass (BPSG)	0.7

[16].

When the sensor is subject to an out-of-plane motion, the induced stress on the longitudinal and transverse polysilicon resistors will result in the relative change of resistance δR/R given by:

$$\frac{\Delta R}{R}={\left(\frac{\Delta R}{R}\right)}_l=G_{\mathit{polyl}}{\varepsilon }_x$$

(1)

where the subscripts “l” and “t” denote the longitudinal and transverse relative change of resistance, respectively; v is the Poisson’s ratio of the silicon having the value of 0.27; G_polyl and G_polyt are the longitudinal and transverse gauge factors. In the ON 0.5 μm technology used in this work, the polysilicon layer has a nominal sheet resistance ρ_s of 26.1 Ω/□ [16], which is equivalent to a resistivity of 9.14 × 10⁻⁴ .cm and a boron doping concentration of 1.42 × 10¹⁹ cm⁻³. This amount of doping concentration corresponds to estimated longitudinal and transverse gauge factor of 40 and −15, respectively [3]. The resistivity of the polysilicon can be determined using:

$${\rho }_{\mathit{poly}}={\rho }_s{t}_{\mathit{poly}}$$

(2)

$$\frac{\Delta R}{R}={\left(\frac{\Delta R}{R}\right)}_t=G_{\mathit{polyt}}{\varepsilon }_y$$

(3)

where t_poly is 0.35 μm. The relationship between the axial (y-direction) and transverse strains can be evaluated using the following equation:

$${\varepsilon }_t=-\nu {\varepsilon }_x$$

(4)

The axial strain, ε_x in the direction of x, which occurs on the composite beam is given by:

$${\varepsilon }_y=\frac{z}{R_c}$$

(5)

where z is the distance from the neutral axis; and R_c is the radius of curvature of the bending beam. The Young’s modulus of aluminum and silicon dioxide (SiO₂) material are close. According to the ON 0.5 μm technology, the total thickness of the cantilever is approximately 5.3 μm, with the 0.35 μm polysilicon being located above the 0.4 μm field oxide at the bottom of the cantilever [16]. As the 0.4 μm thickness is much smaller than the half thickness of the beam, it is acceptable to assume that the neutral axis is at the center of the cantilever beam. The beam bending moment can be obtained by the integration of the stress through the thickness of the beam, H_b and is given by [17]:

$$M={\int }_{-H_b/2}^{H_b/2}\left[(W_b\mathit{dz}){\sigma }_x\right]\cdot z$$

(6)

where σ_x is the axial stress of the beam. Since the relation between the stress and strain is σ_x = E_εx:

$$M={\int }_{-H_b/2}^{H_b/2}\left[(W_{b}dz)\frac{E{z}^2}{R_c}\right]=\frac{E{W}_b}{R_c}{\int }_{-H_b/2}^{H_b/2}{z}^{2}dz=\frac{E{W}_b{H}_b^3}{12R_c}$$

(7)

which can be further simplified to:

$$\frac{1}{R_c}=\frac{12M}{E{W}_b{H}_b^3}=\frac{M}{\mathit{EI}}$$

(8)

where I is the beam moment of inertia and is given by:

$$I=\frac{W_b{H}_b^3}{12}$$

(9)

It should be noted that due to the composite nature of the cantilevers, the Young’s Modulus E in the above equations is the effective value of the beams that are comprised of SiO₂ and top aluminum layer in the CMOS stack. Since the SiO₂ is much thicker than the Al layer in the composite beam, and the Young’s Modulus of SiO₂ is slightly greater than aluminum’s, E can be approximated as SiO₂ Young’s Modulus of 70 GPa [17]. The same E applies to the following derivations.

Referring to Figure 3, the solution of the bending beam with proof mass results in the maximum bending stress at the beam support to substrate (y = 0), which is given by:

$$\frac{1}{R_c}=\frac{d^{2}w}{d{y}^2}=\frac{M}{\mathit{EI}}=\frac{\mathit{ma}}{\mathit{EI}}\left(L_b+\frac{L_{\mathit{pm}}}{2}\right)$$

(10)

and from Equation (5), the strain occurs at the top (tension) and bottom (compression at polysilicon layer) of the beam surface is:

$${\varepsilon }_{\mathit{poly}}=\frac{z}{R_c}=\frac{H_b}{2R_c}$$

(11)

Inserting Equation (10) to Equation (11) yields:

$${\varepsilon }_{\mathit{poly}}=\frac{H_b}{2}\frac{\mathit{ma}}{\mathit{EI}}\left(L_b+\frac{L_{\mathit{pm}}}{2}\right)=\frac{6m}{E{W}_b{H}_b^2}\left(L_b+\frac{L_{\mathit{pm}}}{2}\right)a$$

(12)

The complete solution of the relative change of resistance due to the acceleration applied to the four cantilever beams can be then computed by substituting Equation (12) into Equations (1) and (2), which yields:

$${\left(\frac{\Delta R}{R}\right)}_l=G_{\mathit{polyl}}\frac{1.5m}{{\mathit{EW}}_b{H}_b^2}\left(L_b+\frac{L_{\mathit{pm}}}{2}\right)a$$

(13)

$${\left(\frac{\Delta R}{R}\right)}_t=G_{\mathit{polyt}}\frac{1.5m\nu }{{\mathit{EW}}_b{H}_b^2}\left(L_b+\frac{L_{\mathit{pm}}}{2}\right)a$$

(14)

$$R={\rho }_{\mathit{poly}}\frac{L_{\mathit{poly}}}{W_{\mathit{poly}}{t}_{\mathit{poly}}}={\rho }_s\frac{L_{\mathit{poly}}}{W_{\mathit{poly}}}$$

(15)

where R is the original resistance of each poly resistor without acceleration, which is calculated to be 1.1 kΩ using Equation (15). The resonant frequency, f of the sensor is calculated as 1.85 kHz using the equation given by:

$$f=\frac{1}{2\pi }\sqrt{\frac{k}{m}}$$

(16)

where k is the stiffness coefficient of the composite beam calculated to be 14.21 N·m⁻¹ which is defined as:

$$k=\frac{E{W}_b{H}_b^3}{4L_b^3}$$

(17)

Other parameters such as the sensor geometric and material properties used in Equations (1) and (2) and their values are given in

Table 2. Sensor Dimension and Material Properties.

Symbol	Description	Value
Mechanical:
Epoly	Polysilicon Young’s modulus	160 GPa
E	Effective Young’s modulus of the beam	70 GPa
m	Proof mass weight	105 μg
Geometric:
Wb	Cantilever beam width	13 μm
Hb	Cantilever thickness from polysilicon layer	4.2 μm
Lb	Cantilever beam length	200 μm
Lpm	Proof mass length	500 μm
Wpm	Proof mass width	500 μm
Lpoly	Length of poly resistor	49.4 μm
Wpoly	Width of poly resistor	1.2 μm
Electrical:
ρs	Polysilicon sheet resistance	26.1 Ω/square
αpoly	Polysilicon temperature coefficient of resistance (TCR)	2.1 × 10−3 K−1*
ρpoly	Polysilicon resistivity	9.14 Ωμm
Thermal:
κAl	Aluminum thermal conductivity	237 W/(K.m)
κox	SiO2 thermal conductivity	1.1 W/(K.m)
κSi	Silicon thermal conductivity	170 W/(K.m)
κpoly	Polysilicon thermal conductivity	29 W/(K.m)

^*Note: This data is obtained from the temperature characterization on the fabricated device.

.

Using Equations (13) and (14), the longitudinal and transverse relative change of resistance with acceleration from 1 g to 10 g are estimated and the results are shown in Figure 4. The calculation results show that the longitudinal relative change of the piezoresistance +4.26 × 10⁻⁴ %/g or +4.3 mΩ/g, while the transverse relative change of the piezoresistance has a sensitivity of −0.46 × 10⁻⁴ %/g or −0.46 mΩ/g.

2.2. Self Heating Effect of the Piezoresistors

Self heating effect of the polysilicon resistors is estimated to evaluate its impact on the performance of the sensor fabricated particularly using ON Semiconductor 0.5 μm CMOS technology used in this project. When a biasing voltage is applied to a polysilicon piezoresistor, the Joule heat generated will raise the temperature of the resistor which consequently changes the sensing resistance. The resistance change caused by this self heating is superposed to the sensing resistance caused by the acceleration to be measured. The lumped-element thermal circuit in Figure 5 can be used to estimate the temperature rise and in turn the resistance variations resulted from the Joule heating.

In Figure 5, the electric circuit consists of a voltage source and a resistor which is the original resistance of the polysilicon piezoresistors. The thermal circuit consists of three elements: the diamond shape represent a dependent current source that provides the Joule heat power V²/R; the capacitor C_T represents the heat capacity of the resistor; and the resistor R_T represents the heat resistance from the polysilicon resistor to the thermal ground—the substrate on which the piezoresistive cantilevers are attached. T₀ = T_R is the substrate temperature which is assumed as the room temperature of 25 °C or 293 K. In the thermal circuit, the current (heat flux) is denoted as I_Q. The relative change of resistance due to self heating effect in the polysilicon resistor can be then estimated as:

$${\left(\frac{\Delta R}{R}\right)}_{\mathit{thermal}}={\alpha }_{\mathit{poly}}(T_{\mathit{ss}}-T_R)={\alpha }_{\mathit{poly}}\Delta T$$

(18)

where α_poly is the temperature coefficient of resistance (TCR) of polysilicon as listed in Table 2; T_SS represents the final steady state temperature of the sensing element. The transient response of the temperature, T_tr is derived as:

$$T_{\mathit{tr}}=T_R+\frac{R_T{V}^2}{R_R\left(1+\frac{{\alpha }_{\mathit{poly}}{R}_T{V}^2}{R_R}\right)}\left(1-e^{-\left(\frac{1}{R_T{C}_T}\right)t}\right)$$

(19)

R_R = R = 1.1 kΩ is the designed resistance of the polysilicon resistor at room temperature and is calculated using Equation (15). Due to the great thermal conductivity difference among the thin films in the system and the layer sequence in the cantilevers, it is assumed that the heat flux generated on the polysilicon resistors travels in the following path: polysilicon resistors → SiO₂ layer → metal 3 layer → substrate. The corresponding thermal resistance, R_T and capacitance, C_T can be calculated using Equations (20) and (21) as:

$$R_T=R_{\mathit{Tpoly}}+R_{\mathit{TSiO}2}+R_{\mathit{TAl}}=\frac{H_{\mathit{poly}}}{{\kappa }_{\mathit{poly}}{A}_{\mathit{poly}}}+\frac{H_{\mathit{ox}}}{{\kappa }_{\mathit{ox}}{A}_{\mathit{ox}}}+\frac{L_{\mathit{Al}}}{{\kappa }_{\mathit{Al}}{W}_{\mathit{Al}}{H}_{\mathit{Al}}}$$

(20)

$$\frac{1}{C_T}=\frac{1}{C_{\mathit{Tpoly}}}+\frac{1}{C_{\mathit{TSiO}2}}+\frac{1}{C_{\mathit{TAl}}}$$

(21)

The values used and calculated are listed in

Table 3. Calculated Thermal Resistances and Capacitances.

Symbol	Description	Values
Apoly	Area of the Polysilicon resistor	5.93 × 10−11 m2
Aox	Area of the Polysilicon resistor	1.37 × 10−10 m2
WAl	Area of the oxide	13.4 × 10−6 m
LAl	Width of the metal	10.2 × 10−6 m
RTpoly	Thermal resistance of polysilicon layer	233 K/W
RTSiO2	Thermal resistance of silicon dioxide layer	1.2 × 104 K/W
RTAl	Thermal resistance of aluminum layer	4.6 × 103 K/W
CTpoly	Thermal capacitance of polysilicon layer	3.88 × 10−11 J/K
CTSiO2	Thermal capacitance of silicon dioxide layer	3.80 × 10−10 J/K
CTAl	Thermal capacitance of aluminum layer	2.32 × 10−10 J/K
RT	Total thermal resistance	1.7 × 104 K/W
CT	Total thermal capacitance	3.1 × 10−11 J/K

.

Based on the material properties and dimensions, the temperature change due to the self-heating effect discussed above is found to be ∼17 °K using Equation (19) which is under a biasing voltage of 1.0 V that results in approximately 1 mA driving current. These results are further verified by the numerical simulations. The thermal transient response of the polysilicon resistor is plotted in Figure 6, as a result of Equation (19).

2.3. Device Simulation

CoventorWare, a comprehensive finite element analysis (FEA) tool dedicated for MEMS design and simulation, is used to validate the relative resistance change of the piezo resistors design. From CoventorWare simulation, as shown in Figure 7, it is found that the relative piezoresistance change in longitudinal direction can be as high as 1.8 × 10⁻⁴%/g or 1.7 mΩ/g. The FEA simulation results are in good agreement with the theoretical calculation as shown in Figure 4.

Figure 8 shows the CoventorWare simulation results of the heat flux distribution from the polysilicon sensing element to the substrate.

A 1 mA driving current is applied through the polysilicon resistor. From the contour representing the direction and value of the flux, a heat dissipation path of Z → Y → X can be derived, as predicted in Equation (20). The simulated self-heating caused temperature rise ∼12 °K. This result is in good agreement with the theoretical calculation. The relative change of resistance due to the self heating effect is 0.1639 %. This change is even larger than the resistance change due to acceleration as shown in Figure 7. It should be noted that the self heating is a universal effect, happening to all the resistors monotonously. Consequently this effect can be largely canceled due to the Wheatstone configuration of the polysilicon sensors. Yet it is noteworthy to gain insights into the sensing mechanism in this composite structured CMOS-MEMS sensor.

3. Device Fabrication

The ON Semiconductor 0.5 μm CMOS technology has been utilized for CMOS fabrication of the sensor through MOSIS. The post-CMOS process, with a flow as illustrated in Figure 9, has been used to release the structure. The process starts with a back side selective DRIE process that produce a SCS membrane with a thickness of ∼40 μm, as illustrated in Figure 9(a). Anisotropic SiO₂ RIE is then performed on front side of the device to open patterns of the composite beams and proof mass, as shown in Figure 9(b). Next, silicon DRIE process is used to etch through the structure, as in Figure 9(c). Finally, an isotropic silicon etching undercuts the silicon underneath the composites and releases the device, as illustrated in Figure 9(d). During the isotropic undercut process, a small portion of the proof mass and the substrate will also be undercut. This problem will not have a large effect to the sensor performance due to the large proof mass dimension. The backside photoresist used in the process can be removed by oxygen ashing.

Figure 10 shows a SEM photograph of the fabricated sensor with inset showing close-up of the cantilever beams. The structure curling observed in Figure 10 is due to the residual stress existing among the CMOS thin films. This curling is much smaller than that in the thin film sensors [11].

4. Device Characterization

The resistance of the polysilicon resistor in each beam is measured as ∼1.32 kΩ. With a 1 mA biasing current, the sensor demonstrates a sensitivity of ∼0.077 mV/g prior to amplification, much larger than what were reported in [2,10,11]. The greatly increased sensitivity is mainly due to the large proof mass attached to the ends of composite cantilever beams. This attribute is particularly enabled by the bulk CMOS-MEMS microfabrication process we have developed, as described in reference [12]. It’s also noteworthy that due to the complete protection of polysilicon sensing elements in post-CMOS process, the device structure allows considerable process variations in microfabrication. The piezoresistors are immune to the slight over-etching in device release that is necessary for complete undercut of the beams. Other sensor characterizations are performed with an external instrumentation amplifier that has a voltage gain of 52 dB. In the dynamic test, a LMT-100 shaker from Ling Electronics is used to provide standard acceleration. A Kistler type 8692B50 accelerometer is used as a reference. It is calibrated using a 394C06 hand-held shaker from PCB Piezotronics, which generates a standard 1 g acceleration at a nominal frequency of 159.2 Hz. Figure 11 shows the test board on which the device under test (DUT) is assembled with the reference accelerometer. The DUT is packaged in a standard ceramic 16-pin DIP package. The board is screwed to the threaded pole of the shaker.

The resonant frequency of the sensing element has been identified as 1.34 kHz through an impulse test. The dynamic response spectrum of the sensor is shown in Figure 12. The lower resonant frequency of the structure compared to the simulation result is caused by the following combined effects: the thicker proof mass than the designed value; the undercut around the composite beams; and the thickness reduction of the top aluminum layer resulted from the physical milling effect in the DRIE etching.

Figure 13 shows an output waveform under a 3 g excitation at 160 Hz. With a 52 dB amplification gain, the sensor produces an output of 192 mV_{p − p}. The testing frequency of 160 Hz is chosen to be in consistence with the frequency at which the reference accelerometer has been calibrated. Figure 14 compares the output of the fabricated sensor with the reference accelerometer output in an acceleration range from 1 g to 7 g. The piezoresistive accelerometer reported in this work demonstrates a better linearity than the reference device.

The merits of the piezoresistive accelerometer demonstrated in this work are further summarized in

Table 4. Summary of the merits of the demonstrated device and comparisons with the device demonstrated in Reference [10].

Specifications	This work	Device in Reference [10]
Proof mass	230 μg	0.96 μg
Cantilever beam length	200 μm	500 μm
Proof mass size	500 μm × 500 μm	280 μm × 280 μm
Sensitivity	∼77 μV/g	∼2.0 μV/g
Power consumption	1.5 mW	N/A
Fabrication process	DRIE and RIE	Front side wet bulk micromachining
Process tolerance	Good	Need front side protection
Structure curling	Mediocre	Large

. A comparison between the device in this work and that is reported in reference [10] is also made. It should be noted that in the device in reference [10], the CMOS thin film structures are fabricated using wet bulk micromachining process, which requires careful protection of the CMOS region in wet etching. Whereas the dry etching based process in this work has better process tolerance due to the complete protection of the polysilicon sensing element.

5. Conclusions

A low-cost, high-sensitivity z-axis CMOS-MEMS piezoresistive accelerometer with large proof mass has been successfully demonstrated. The accelerometer has a 0.077 mV/g mechanical sensitivity with a very low power consumption of ∼1.5 mW for operation. Common issues associated with CMOS-MEMS thin film accelerometers such as large structural curling and low sensitivity have been solved by incorporating SCS in the proof mass. The four cantilever beams employed in the sensor has significantly improved the sensor stability by allowing sorely the out-of-plane motion of the proof mass and minimizing the in-plane motion. Multiple CMOS metal layer permits flexible wiring of the sensing elements for full Wheatstone bridge configuration, which further increases the sensitivity of the accelerometer. While monolithic integration of amplification and signal conditioning circuits in progress, the demonstrated z-axis accelerometer provides a low cost solution for out-of-plane sensing that is normally more challenging for capacitive sensors. This device can find many applications such as in portable electronics.