Bidirectional Interleaved PWM Converter with High Voltage-Conversion Ratio and Automatic Current Balancing Capability for Single-Cell Battery Power System in Small Scientific Satellites

Abstract

Single-cell battery power systems are a promising bus architecture for small scientific satellites. However, to bridge the huge voltage gap between a single-cell battery and power bus, bidirectional converters with a high voltage conversion ratio and a large current capability for the low-voltage side are necessary. This article proposes a bidirectional interleaved pulse width modulation (PWM) converter with a high voltage conversion ratio and an automatic current balancing capability. By adding capacitors to conventional interleaved PWM converters, not only are inductor currents automatically balanced without feedback control or current sensors, but also voltage conversion ratios at a given duty cycle can be enhanced. Furthermore, the added capacitors can reduce voltage stresses of switches and charged-discharged energies of inductors, realizing more efficient power conversion and reduced circuit volume in comparison with conventional converters. A 100-W prototype was built for experimental verification, and results demonstrated the fundamental characteristics and efficacy of the proposed converter.

1. Introduction

Vigorous research and development efforts for small scientific satellites are underway to realize frequent and low-cost scientific space missions. Traditional power systems in scientific satellites employ an unregulated bus architecture, where a rechargeable battery and load are directly connected, as illustrated in Figure 1a. The unregulated bus architecture (see Figure 1a) is advantageous over regulated bus architectures (see Figure 1b) from the viewpoint of the system simplicity, as no dedicated converter for battery regulation is necessary. However, since the battery is directly connected to the load in the unregulated bus architectures, the number of battery cells connected in a series is determined by the load voltage requirement—e.g., eight and twelve cells for 28-V and 50-V bus systems, respectively. The energy capacity of the battery in watt-hours should be adjusted by selecting or manufacturing cells with a proper capacity, hence impairing the design flexibility. The poor design flexibility is quite unfavorable for small satellites, to provide frequent scientific mission opportunities.

Although the converter count is doubled, the regulated bus architecture (see Figure 1b) is attractive from the viewpoint of battery design flexibility. The number of battery cells connected in series can be arbitrarily changed to meet the energy capacity demand, and even a single-cell battery system is theoretically feasible, as shown in Figure 1c [1]. Despite the cost penalty of the additional bidirectional converter for batteries, the regulated bus system would be a promising choice to realize frequent scientific space missions demanding a wide range of power requirements.

In general, voltages of series-connected cells are gradually imbalanced due to a minor mismatch in individual cell characteristics, such as capacity, self-discharge rate, and internal impedance. Some cells with higher/lower voltages might be over-charged/discharged, likely accelerating irreversible deterioration and increasing risks of fire or, in the worst case, an explosion. To ensure years of safe operation of batteries consisting of multiple cells connected in series, a cell equalizer is indispensable to mitigate or even eliminate cell voltage imbalance. Cell equalizers are essentially a switching power converter, such as nonisolated bidirectional converters [2,3,4,5], single-input multi-output converters [6,7,8,9], etc. [10], and these add complexity to spacecraft power systems.

In the single-cell battery system, cell voltage mismatch is no longer an issue because there is only one single cell. Hence, no cell equalizer is necessary, allowing the simplified system configuration, as shown in Figure 1c. Although the single-cell battery system offers flexible battery design and a simplified system, two major challenges concerning bidirectional converters arise.

The first issue is an extreme duty cycle operation. To bridge the huge voltage gap between the power bus (50 V) and single-cell battery (3.0–4.2 V for lithium-ion cells), a conventional nonisolated pulse width modulation (PWM) converter [Figure 2a] must operate with extremely high duty cycles (e.g., duty cycle greater than 0.9). However, conventional converters with such extreme duty cycles are exposed to high voltage and current stresses, and are known to suffer from increased losses and reduced controllability [11]. Coupled- or tapped-inductors [11,12,13,14] and switched-capacitor structures [15,16,17] are often employed to achieve high voltage conversion ratios at a given duty cycle. The coupled- or tapped-inductors behave as a voltage divider whose voltage conversion ratios are adjustable with the turns ratio. Although these magnetic components realize high voltage conversion ratios with relatively simple structures, the increased magnetic design difficulty is often cited as a top concern. Switched capacitors can arbitrarily increase voltage conversion ratios by adding capacitors and switches, but numerous switches are necessary to enhance its voltage gain, likely increasing the circuit complexity.

The second issue is a large current at the low-voltage battery side. A current of the low-voltage side is more than ten times greater than that of the high-voltage side, increasing current stress as well as associated Joule losses. Interleaved PWM converters, which equivalently consist of parallel-connected multiple PWM converters operating out of phase, are a favorable solution to mitigate current stresses of switches and inductors. The topology shown in Figure 2b is a conventional three-phase interleaved PWM converter, and current stresses of inductors and switches are one-third those of the traditional converter shown in Figure 2a. However, all inductor currents need to be measured using current sensors to achieve active current balancing among multiple phases [18], increasing the cost and control complexity. Otherwise, inductor currents are likely to be unbalanced, due to minor mismatches in resistive components and duty cycles, and current stresses and power conversion losses are likely to soar, due to current concentration [19].

This article presents a bidirectional interleaved PWM converter with high voltage conversion-ratio and automatic current balancing capability for single-cell battery power systems in small scientific satellites. By adding only two capacitors to the conventional interleaved three-phase PWM converter (Figure 2b), the voltage conversion ratio at a given duty cycle is tripled, hence preventing extreme duty cycle operations. Inductor currents can be automatically balanced thanks to the added capacitors, and no current sensor is necessary for inductor current balancing. Furthermore, the added capacitors reduce voltage stresses of switches and charged-discharged energies of inductors, contributing to efficient power conversion and reduced circuit volume.

The rest of this article is organized as follows. Section 2 describes the proposed bidirectional converter topology. The detailed operation analysis, including the derivation for voltage conversion ratio and discussion about automatic current balancing, will be discussed in Section 3. Section 4 presents the quantitative comparison between proposed and conventional converters from the viewpoint of total device power rating (TDPR) and normalized charged-discharged energies in passive components—these can be metrics to quantitatively compare efficiencies and circuit volumes of different converter topologies. Experimental results of a 100-W prototype will be shown to demonstrate the proposed converter in Section 5.

2. Interleaved Bidirectional PWM Converter with High Voltage-Conversion Ratio and Automatic Current Balancing Capability

The proposed bidirectional interleaved PWM converter is shown in Figure 3. Three inductors, L₁–L₃, are connected to the battery and share the input current. Currents of these inductors are automatically balanced without feedback control, and therefore, no current sensors nor feedback control loops are necessary. The high- and low-side switches (Q_Li and Q_Hi, respectively, where i = 1, …, 3) operate in a complementary mode. Three pairs of switches (Q_L1-Q_H1, Q_L2-Q_H2, Q_L3-Q_H3) and inductors operate in the interleaving manner 120° out of phase, and thus, this converter can be regarded as a three-phase interleaved converter when viewed from the battery side. Capacitors, C₁ and C₂, play two roles of a high voltage-conversion ratio and automatic current balancing, as will be discussed in the next section.

3. Operation Analysis

The presented converter operates as step-up and -down converters when a battery is being discharged and charged, respectively. This section deals only with the step-up operation or battery discharging for the sake of brevity. However, the step-down operation or battery charging can be analyzed similarly. The analysis is performed with the premise that all circuit elements are ideal, with no parasitic components and that all capacitors are large enough so that their voltages are constant.

3.1. Operation Modes and Voltage Conversion Ratio

The theoretical key operation waveforms and current flow directions are shown in Figure 4 and Figure 5, respectively. Gating signals for Q_L1–Q_L3, v_gsL1–v_gsL3, are applied so that at least two of three switches are simultaneously on. v_gsL1–v_gsL3 are 120° out of phase for the interleaving operation. One switching cycle can be divided into six operation modes, but three of them are Mode 1, during which all low-side switches are simultaneously turned on.

Mode 1 (Figure 5a): v_gsL1–v_gsL3 are applied. All the low-side switches are on and their drain-source voltages, v_QL1–v_QL3, are zero. Inductor currents, i_L1–i_L3, linearly increase as V_bat is applied to L₁–L₃. The input current i_in, which is the sum of i_L1–i_L3, also increases.

Mode 2 (Figure 5b): v_gsL1 is removed to turn off Q_L1. i_L1 linearly decreases and flows through a channel or body diode of Q_H1. Since one of the inductor currents decreases, i_in also decreases. C₁ is charged by i_L1, and the volt-sec balance on L₁ yields the voltage of C₁, V_C1, as

$$V_{C1}=\frac{1}{1-d_1}{V}_{bat}$$

(1)

where d₁ is the duty cycle of Q_L1 as designated in Figure 4.

Mode 3 (Figure 5c): v_gsL2 is at a low level to turn off Q_L2. A channel or body diode of Q_H2 starts to conduct. At the same time, L₂ discharges and its current i_L2 decreases. Similar to Mode 2, i_in decreases due to the decrease in i_L2. i_L2, together with C₁, charges C₂, and the voltage of C₂, V_C2, can be yielded from the volt-sec balance on L₂, as

$$V_{C2}=V_{C1}+\frac{1}{1-d_2}{V}_{bat}=\left(\frac{1}{1-d_1}+\frac{1}{1-d_2}\right)V_{bat}$$

(2)

where d₂ is the duty cycle of Q_L2.

Mode 4 (Figure 5d): Q_L3 is turned off, and Q_H3 conducts. L₃ and C₂ charge C_bus. i_L3 discharges, and C_bus is charged by i_L3 and C₂. From volt-sec balance on L₃, the voltage of C_bus, V_bus, is obtained as

$$V_{Cbus}=V_{C2}+\frac{1}{1-d_3}{V}_{bat}=\left(\frac{1}{1-d_1}+\frac{1}{1-d_2}+\frac{1}{1-d_3}\right)V_{bat}$$

(3)

where d₃ is the duty cycle of Q_L3. This equation dictates the step-up voltage conversion ratio of the proposed interleaved converter.

Given that all the duty cycles are identical as d₁ = d₂ = d₃ = d, (3) can be rewritten as

$$\frac{V_{Cbus}}{V_{bat}}=\frac{3}{1-d}$$

(4)

Thus, the voltage conversion ratio of the proposed three-phase interleaved converter is three times greater than that of traditional PWM boost converters.

In order to ensure the operation discussed above, all the low-side switches must be simultaneously on in every switching cycle, and more than two of them must be always on. To this end, d₁–d₃ must be greater than 0.667. Otherwise, inductor currents are no longer balanced.

The voltage conversion ratios of the proposed and conventional converters are compared in Figure 6. For the 50-V bus system, the required voltage conversion ratio is 12.5–16.7 for a lithium-ion single cell with 3.0–4.2 V. Conventional converters need to operate with an extremely high duty cycle of d > 0.92. The duty cycle range of the proposed converter, on the other hand, is reduced to around 0.8, avoiding extreme duty cycle operations.

3.2. Current Balancing Mechanism

C₁ is charged by i_L1 during Mode 2 (Figure 5b) and its amount of charge stored corresponds to q₁ in Figure 4. During Mode 3, C₁ is discharged by i_L2, and a released charge amount is q₂. Meanwhile, C₂ receives q₂ as i_L2 flows through it. In Mode 4, C₂ is discharged by i_L3, and its released charge amount is q₃ that is transferred to the bus. The charge balance on C₂ and C₃ yields

$$q_1=q_2=q_3=I_{bus}{T}_s$$

(5)

where I_bus is the bus current designated in Figure 3. Since q₁–q₃ are equal to respective average inductor current I_L1–I_L3 multiplied by mode length, Equation (5) can be rewritten as

$$\left(1-d_1\right)I_{L1}=\left(1-d_2\right)I_{L2}=\left(1-d_3\right)I_{L3}=I_{bus}$$

(6)

This equation suggests that the balance among I_L1–I_L3 is dependent on d₁–d₃. If d₁–d₃ are identical, the charge conservation law for C₂ and C₃ ensures complete current balancing for all inductors. This balancing mechanism does not rely on any active control nor current sensing, and therefore, all inductor currents are automatically balanced.

Now consider the non-ideal case that d₁–d₃ are slightly mismatched as d₁ = d − ∆d and d₂ = d₃ = d, due to non-ideality of microcontrollers and gate drivers. I_L2 and I_L3 can be balanced to be I_L, and Equation (6) can be rewritten as

$$\left(1-d+\Delta d\right)I_{L1}=\left(1-d\right)I_L$$

(7)

Rearrangement of Equation (7) yields

$$\frac{I_L-I_{L1}}{I_{L1}}=\frac{\Delta d}{1-d}$$

(8)

This equation represents the degree of current imbalance due to duty cycle mismatch. For instance, even if d₁ severely deviates from others as ∆d = 0.01, the inductor current imbalance is merely 5% with d = 0.8. Thus, the inductor current imbalance due to the non-ideality of microcontrollers and gate drives would be very minor.

4. Quantitative Comparison

4.1. Total Device Power Rating

Total device power rating (TDPR) is often introduced as a metric to quantitatively compare different topologies from the viewpoint of semiconductor volt-amp stresses [20,21]. TDPR is the sum of the theoretical volt-amp stress of all semiconductor devices normalized by input or output power and is defined as

$$TDPR={\displaystyle \sum }_{All MOSFETs}\frac{V_{max}{I}_{max}}{V_{bat}{I}_{bat}}$$

(9)

where V_max and I_max are the theoretical maximum voltage and current stresses of a metal-oxide-semiconductor field-effect transistor (MOSFET). The lower the value of TDPR, the better the converter’s performance will be, as power conversion loss reportedly increases with a sum of volt-ampere (V-A) products of switches [22]. In this paper, ripple components are not taken into consideration for the sake of simplicity.

The theoretical voltage and current stresses of MOSFETs in the proposed converter are summarized in

Table 1. Voltage and current stresses of metal-oxide-semiconductor field-effect transistors (MOSFETs) in the proposed interleaved converter.

Component	Voltage	Current
QL1	Vbat/(1 − d)	IL
QH1	2Vbat/(1 − d)	IL
QL2	Vbat/(1 − d)	2IL
QH2	2Vbat/(1 − d)	IL
QL3	Vbat/(1 − d)	2IL
QH3	Vbat/(1 − d)	IL

. All duty cycles d₁–d₃ and average inductor currents I_L1–I_L3 are assumed equal to d and I_L, respectively. Voltage stresses can be determined from the operation modes shown in Figure 5 or values designated in Figure 4 with (1)–(3). The current stresses of Q_L2 and Q_L3 are double those of others as can be seen in Figure 5—two out of three inductor currents flow through Q_L2 and Q_L3 as shown in Figure 5b,c.

TDPRs of the proposed interleaved converter, conventional single-phase converter (Figure 2a), and conventional interleaved three-phase converter (Figure 2c) are compared in Figure 7. At a given conversion ratio higher than 9.0, the proposed converter achieves the lowest TDPR. At the voltage conversion ratio of 12.5, for example, the TDPR values of the conventional and proposed interleaved converters are 25.0 and 11.1, respectively, corresponding to 56% reduction. The lower TDPR tendency is attributable to the reduced voltage stresses, due to C₁ and C₂. Switches in the conventional converters, on the other hand, must endure the full output voltage or the bus voltage V_bus, resulting in a higher TDPR trend.

4.2. Normalized Charged-Discharged Energies in Passive Components

Inductors and capacitors occupy a significant portion of the total volume of converters. Volumes of passive components of inductors and capacitors are generally proportional to their stored energies. In this section, the proposed and conventional converters are quantitatively compared on the basis of total charged-discharged energies in inductors and capacitors normalized by input energy in a single switching cycle E_in = V_batI_batT_s.

To fairly compare various topologies, volume metrics S is introduced and is defined as

$$S=\frac{1}{E_{in}}\left({\displaystyle \sum }_{Inductors}\frac{\beta E_L}{{\alpha }_L}+{\displaystyle \sum }_{Capacitors}\frac{E_C}{{\alpha }_C}\right)$$

(10)

where α_L and α_C are the ripple factors of inductor current and capacitor voltage, respectively, and β is the energy density ratio of capacitors to inductors. E_L and E_C are the charged-discharged energies of inductors and capacitors. Mathematical expressions of E_L and E_C for passive components in the proposed converter are listed in

Table 2. Charged-discharged energies in inductors and capacitors in the proposed converter.

Component	Charged-Discharged Energy
L1–L3	VbatILdTs
C1	VbatILTs
C2	2VbatILTs
Cbus	3VbatILd(1 − d)Ts
Cbat	αILVbat(3d − 2)Ts/24d

.

In general, α_L is chosen in the range of 0.2–0.4 for ordinary PWM converters. To tightly regulate input and output voltages, input and output smoothing capacitors (i.e., C_bat and C_bus) should be selected so that their ripple voltage α_C is in the range of 0.03–0.05. Meanwhile, ripple factors of flying capacitors (C₁ and C₂) can be around 0.1 [23]. Energy densities of discrete capacitors are in the range of more than three orders of magnitude greater than those of similarly scaled inductors [23,24,25]. In the following, the comparison on S was performed with α_L = 0.3, α_C = 0.03 and 0.1 for smoothing and flying capacitors, respectively, and β = 100.

Calculated tendencies of S are shown in Figure 8. Inductors took the largest portion in all the converters. The portions taken by smoothing capacitors (C_bat and C_bus) were substantial in the conventional single-phase converter and proposed interleaved converter, because C_bus must be large to absorb large pulsating current at the bus side. Meanwhile, C_bus in the conventional three-phase converter can be designed smaller, owing to the interleaving operation at the bus side. Although the proposed converter also operates in the interleaving manner at the battery side, the operation at the bus side is not in an interleaving manner, as can be seen in Figure 5.

Despite the increased portion of capacitors, the proposed converter exhibits the lowest S tendency. At the voltage conversion ratio of 12.5, the S values of the conventional 1-phase, 3-phase, and proposed converters were 339, 310, and 289, respectively, implying the volume of passive components would be reduced by greater than 7%. The lowest S tendency was chiefly because charged-discharged energies of inductors are significantly reduced by C₁ and C₂. As shown in Figure 5, inductors together with capacitors contribute to power transfer, mitigating the energy storage burden of inductors. Since capacitors are far more compact than inductors (as characterized by β), reducing the burden of inductors by using capacitors translates into a reduction in total volume.

5. Experimental Results

A 100-W prototype of the proposed converter was built, as shown in Figure 9. Component values are listed in

Table 3. Components used for prototype.

Component	Value
L1–L3	15 μH, 16.9 mΩ
Cbat	Ceramic Capacitor, 220 μF, 3.1 mΩ
Cbus	Al Electrolytic Capacitor, 272 μF, 5.0 mΩ
C1, C2	Ceramic Capacitor, 22 μF, 6.0 mΩ
QL1–QL3, QH1–QH3	N-Channel MOSFET, TPCA8050-H, Ron = 14.2 mΩ

. The prototype operated with V_bat = 4.0 V and V_bus = 50 V at the switching frequency of 100 kHz. Gate drivers were power by an external power supply (neither by V_bus nor V_bat). Gating signals were generated using a TMS320F28335 control card (Texas Instruments, Dallas, TX, USA).

Measured key operation waveforms at full load in the step-up mode are shown in Figure 10. v_QL1–v_QL3 and i_L1–i_L3 were 120° out of phase, and inductor average currents were identical, verifying the passive automatic current balancing capability.

The measured step-up voltage conversion ratio is shown and compared with the theoretical one in Figure 11. The experimental result matched satisfactorily with the theoretical one. The error was considered due to the power conversion loss in the prototype.

The measured power conversion efficiency in the step-up mode is shown in Figure 12a. The efficiency steadily decreased as the output power increased. The efficiency at the full load of 100 W was as high as 90%.

The calculated loss breakdown is shown in Figure 12b. Joule losses of inductors and switches were dominant in medium to heavy load regions. Meanwhile, switching losses were insignificant in all power range, probably due to reduced voltage stresses of switches, as discussed in Section 4.1. The result suggests that the use of inductors and switches with low resistive components is a key to improving power conversion efficiency.

6. Conclusions

A bidirectional interleaved PWM converter with high voltage conversion ratio and passive automatic current balancing capability has been proposed for single-cell battery power systems in small scientific satellites. The proposed converter operates in an interleaving manner, and the added capacitors realize not only voltage conversion ratios three times greater than those of conventional bidirectional converters, but also automatic current balancing. A quantitative comparison of TDPR and volume metrics S was performed for the proposed and conventional converters. The comparative results revealed that TDPR and S of the proposed converter could be reduced by 56% and >7%, respectively, in comparison with conventional converters, suggesting higher power conversion efficiencies and more compact circuit design. The 100-W prototype with V_bat = 4.0 V and V_bus = 50 V was built for experimental verification. The average inductor currents were automatically balanced due to the added capacitors, and the measured power conversion efficiency was higher than 90% in the entire range, demonstrating the fundamental characteristics of the proposed converter.