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Article

A New Photovoltaic Emulator Designed for Testing Low-Power Inverters Connected to the LV Grid

by
Przemysław Korasiak
and
Janusz Jaglarz
*
Faculty of Materials Engineering and Physics, Cracow University of Technology, 31-155 Cracow, Poland
*
Author to whom correspondence should be addressed.
Energies 2022, 15(7), 2646; https://doi.org/10.3390/en15072646
Submission received: 22 February 2022 / Revised: 22 March 2022 / Accepted: 1 April 2022 / Published: 4 April 2022
(This article belongs to the Special Issue Computational Thermal, Energy, and Environmental Engineering)

Abstract

:
Assessing the performance of photovoltaic systems, particularly dedicated DC/AC inverter devices, requires the use of photovoltaic panels operating under natural environmental conditions, such as variations in solar radiation intensity, temperature and wind speed. Environmental testing is obviously very troublesome, inconvenient and limited. An alternative solution is to use a device that emulates the output photovoltaic panel curves in variable weather conditions, which allows the carrying out of all necessary tests at the laboratory. This paper presents a new photovoltaic emulator (PVE), mimicking the output characteristics of the photovoltaic panels. The proposed PVE is designed and constructed at the renewable energy laboratory for testing low-power PV inverters connected to the LV grid. A novelty of this solution is the method for shaping emulated current–voltage characteristics I–V. The concept of this method assumes autonomous regulation of slopes and shapes of emulated curve fragments. This allows us to obtain the desired shapes of the output characteristics for a wide range of both voltages and currents. The proposed PVE is not a pulse device; it belongs to linear analogue circuits. In order to confirm the assumed concept, a prototype is designed and constructed, and laboratory tests are conducted. Satisfactory results are obtained, confirming the correctness of the adopted concept. High compliance of the emulated characteristics is found in comparison to the characteristics of the selected commercial photovoltaic module. Very good results of dynamic tests and energy efficiency measurements are achieved.

1. Introduction

One of the many specialized measuring devices used in photovoltaic systems is a photovoltaic emulator (PVE). It mimics the current–voltage output characteristics of photovoltaic modules. The emulators are particularly useful for evaluating Maximum Power Point Tracking (MPPT) algorithms implemented in DC/AC inverter input circuits. The shape of PV panel characteristics varies depending on the current solar radiation intensity, ambient temperature, wind speed and other environmental variables. The MPPT algorithm in real time ensures maximum power consumption of the inverter [1,2]. The power unit in the Maximum Power Point (MPP) is the Watt peak (Wp), and this is the maximum power taken from the PV panel under Standard Test Condition (STC) [3]. Measurements can be taken regardless of daytime and weather, there is no need to use large-surface expensive photovoltaic panels and energy-intensive light sources illuminating the panel, and complex mounting systems are not required. Solutions of this type are certainly much cheaper and more convenient, and measuring stations are therefore easier to use and take up less space. Such solutions are implemented especially in university laboratories. Laboratory equipment generally represents a compromise between functionality and price. The authors of this paper have designed and built a simple and functional PVE for the testing and laboratory analysis of a single-phase, on-grid inverter.
There are many PVE solutions described in the literature. A significant group represents relatively simple and cheap impulse systems based on boost/buck converters with microprocessor control and a DC source [4,5]. Simplicity, high efficiency and low costs are the main advantages of such solutions. However, not all of them can relatively accurately imitate PV characteristics. There are large mismatch errors of emulated curves and long delay time of the dynamic response, approximately 1 s. Better output parameters are achieved by emulators with fast processors and converter drivers [6], where the relative error of output mismatch reaches a maximum of some 4%. However, these are more sophisticated systems. Some solutions use commercial solar panels powered in parallel with the DC power supply [7,8]. Such emulators mimic the PV characteristics quite well and have no limitations as with pulse-switching systems; this means that they are able to reach extreme points on the characteristics and react faster to load resistance changes. The main disadvantage is that the shape of the emulated curve cannot be changed; it is the same as that of the panel used. In order for the emulator to generate the shape of a different characteristic, it is necessary to connect the proper panel. This solution is not practical and additional panels generate additional costs.
More complex PVEs built using pulse systems operate in environments such as Matlab/Simulink, LabView and real-time platforms, e.g., dSPACE, FPGA, FPAA, Arduino [9,10,11,12,13,14,15,16,17,18,19]. Devices of this type can well emulate PV characteristics, including partial shading effects [10,11]. Real-time control of PVEs based on both digital and analogue platforms allows for better accuracy of PV characteristics but significantly increases the demand for system resources. This implies high implementation costs for the measuring station. However, it is difficult to compare such emulators taking into account important operating parameters such as the accuracy of the emulated curves, dynamic responses or energy efficiency. This is due to the fact that some authors of such examinations may not report some results. Solutions of this type can also be used to emulate characteristics of several kW but then they have to cooperate with high-power, DC-programmable power supplies [15,20,21]. However, the disadvantage is that the power supplies introduce additional time delays of output reaction to input variables and are expensive laboratory devices.
Another group of emulators is adopted to operate with high power. They can emulate panels connected in series, parallel or serial–parallel. High energy efficiency enables operation in single- and three-phase high-power systems [22,23]. Other solutions reproduce I–V characteristic shapes using serial-connected semiconductor diodes. They can relatively well reproduce the shape of PV characteristics; however, there are significant energy losses caused by diode heating, even when emulating low powers [24]. Other comparable solutions are simple and cheap, but the emulated characteristics are less accurate and contain distortions [25]. The emulators of smaller powers are usually linear analogue systems. Integrated current–voltage stabilizers or bipolar transistors are used as control elements [26,27,28,29]. Similar emulators, due to their simple design and control, may have a better output response to changes in input signals but larger mismatch errors in reproduced curves. The disadvantage is also their low energy efficiency, which limits their application to systems with power ranging from several dozen to several hundred watts.
Most of the proposed solutions, except for the diode and linear ones, are switching (pulse) circuits. The control of this type of circuit most often consists of iterative calculations of a single-diode or two-diode PV cell-equivalent circuit model [30,31]. Therefore, considerable calculation resources of control systems are used in real time, which introduces significant delay times of the output response with respect to the input variables. There are also difficulties in reproducing the entire characteristic curve of the PV module, especially in extreme areas, i.e. for output voltages and currents close to their maximum values [32,33]. Such limitations are related to the PWM pulse control of boost/buck converters. Moreover, pulse devices are a source of electromagnetic radiation; hence, there may be problems with electromagnetic compatibility (EMC).
The aim of the research work presented in this paper was to design, construct and analyze the performance of a simple and low-cost photovoltaic emulator. It will be used for the laboratory testing of low-power PV inverters connected to the LV grid. More details about the emulator and emulation method are given in Section 3.1, Section 3.2 and Section 4.
The authors have preliminarily estimated the approximate cost of the proposed PV emulator: electronic parts—USD 25; mechanical parts, e.g., heat sinks, fans, wires, switches, etc.—USD 25; case—USD 20. In total, the cost is around USD 70. The estimation does not include the cost of a DC power supply, the type of which can be chosen according to current preferences.

2. Single-Diode Model of the PV Cell and the Effect of Model Parameters on the I–V Curve Shape

A photovoltaic cell converts the energy of solar radiation into electricity. The conversion process occurs in the n-type and p-type semiconductors of which the cell is built. In the semiconductor, the flux of solar radiation generates current carriers that are electron–hole pairs. It is an internal photoelectric phenomenon. The p–n junction separates these carriers and a voltage is generated across the junction; therefore, current starts flowing in the external circuit.
A single photovoltaic cell provides a very low amount of current at a low output voltage. A PV panel is constructed using more cells connected in series or combinations in series–parallel. This solution provides the appropriate value of current and voltage depending on the purpose of the panel. Connecting a larger number of cells together does not fundamentally change the shape of the output characteristics, but it shifts the short-circuit current ISC and open-circuit voltage VOC toward larger values.
Various mathematical models of photovoltaic cells/modules have been proposed, including single-diode, double-diode and three-diode models [34]. For our specific, PVE-oriented application, it is sufficient to employ the simple, single-diode model. Figure 1 shows a single-diode equivalent circuit model of the photovoltaic cell. The intensity of the photovoltaic current IPh generated in the photovoltaic generator IPhgen depends on the intensity and the light spectrum of the flux φ reaching the surface of the cell. Furthermore, IPh depends also on the size of this surface, the construction and the methods for semiconductor doping.
Resistances Rs and Rsh symbolize parasitic phenomena occurring in the PV cell. The Rs value is determined by the resistances of connections of metallic electrodes to the semiconductor, as well as the resistances of both metallic fingers and collecting bus-bars. The Rs resistance is also increased by the semiconductor material resistance of the cathode and anode regions, and external contacts. The Rsh value depends primarily on the parasitic junction currents, resulting from defects (imperfections) of the crystal structure, as well as the type of semiconductor materials and impurities, cell temperature and irradiation intensity. The dark cell, where IPh = 0, is described by the basic p–n semiconductor junction theory equation, commonly known as the Shockley diode model equation [35]:
I D = I s a t e x p q V k T 1 ,
where ID is the current of the semiconductor diode, Isat is the reverse junction saturation current, q is the electron charge, V is the conduction direction voltage on the p–n junction, T is the temperature (K), and k is the Boltzmann constant.
If the cell is illuminated and the photovoltaic current IPh starts flowing in the external circuit, the above resistances must be taken into account in the model. The shapes of both the diode current ID and I–V characteristics depend on the saturation current of the semiconductor junction Isat, but they do not depend on the photovoltaic current IPh. The mathematical description of the PV cell model can be presented as [36,37]:
I c e l l = I P h I s a t e x p q V c e l l + I c e l l R s A k T 1 V c e l l + I c e l l R s R s h ,
where IPh is the photovoltaic current generated in the cell, Vcell is the photovoltaic voltage across the cell terminals, Icell is the photovoltaic current flowing through the cell’s external circuit, Rs is the series resistance, Rsh is the shunt resistance, and A represents the dimensionless diode ideality factor.
As demonstrated in Equation (2), the single-diode model is described using five generally known parameters: IPh, Isat, A, Rs and Rsh. It is a simple model, but sufficient to describe the current–voltage characteristics of PV with satisfactory accuracy [38,39]. Figure 2 shows a typical I–V characteristic, where the most important points are indicated. Denotations are as follows:
  • Open-circuit voltage (VOC)—maximum output voltage for open output terminals,
  • Short-circuit current (ISC)—maximum output current for load resistance equal to 0 (RO = 0 Ω),
  • Maximum power point (MPP)—the point of the characteristic where the power output on the emulator’s load resistance is maximum and equal to IMPVMP,
  • Voltage at MPP (VMP),
  • Current at MPP (IMP).
The most important parameter determining the quality of a PV cell/module is the fill factor (FF), given as:
F F = I M P V M P I S C V O C = P M a x I S C V O C ,
where IMP is the output current value at the MPP, and VMP is the output voltage value at the MPP.
The FF is a parameter informing about a cell/module’s quality, with higher FF indicating better cell or module quality.
Photovoltaic current IPh is created by converting light radiation into electrical energy. The current is directly proportional to the light stream intensity φ reaching the cell/module surface. The φ increase raises the ISC value and slightly increases the VOC value and vice versa. A serious problem appears if the temperature rises above the STC reference value. An increase in the cell’s operating temperature significantly reduces both the VOC value and the photovoltaic conversion efficiency, while slightly increasing the ISC value. The influence of the temperature on the output voltage and current is determined by the temperature coefficients of the open-circuit voltage and short-circuit current, kV and kI, respectively. They are given as a percentage change in VOC and ISC values per one degree Celsius or Kelvin.
Figure 3a,b shows the influence of parasitic resistances on particular fragments of I–V curves and consequently on its general shape. The slope and shape of the curve between the VOC and MPP points depend on the resistance Rs. An increase in Rs results in a higher VRs voltage drop, which decreases the output voltage. Consequently, this causes a slope increase for this plot part and reduces the power value at the MPP, as shown in Figure 3a. For the part determined by the ISC and MPP points, the resistance Rsh has a dominant influence on the slope magnitude, as shown in Figure 3b. The small Rsh values represent high parasitic leakage currents Ish, which in effect reduces the flowed photovoltaic cell current Icell. In this case, unlike for Rs, higher resistance is more advantageous because it reduces the slope of this curve part and increases the value of maximum power at the MPP.
The coefficient of ideality factor A corresponds, to some extent, to the curvature (shape) of the I–V characteristics, especially within the knee area, as shown in Figure 4. According to many researchers, there is no accurate method to determine the exact value of this coefficient. In the model calculation procedures, the initial value is arbitrarily chosen and then adjusted to obtain a relatively good fit for the model curve. Its values are usually taken as 1 < A < 1.5 [38].
The actual values of the specific points in I–V curves are published by the manufacturer’s data sheets. In addition, the following data are also provided: temperature coefficients of short-circuit current, open-circuit voltage, power and conversion efficiency. All published values are obtained under STC. Some manufacturers also provide data from measurements under Normal Operation Cell Temperature (NOCT).

3. Proposed PVE Device

3.1. Design Assumptions

During the PVE design, several important assumptions were taken into account. The design assumes a simple construction, low cost and general availability of electronic parts, simple algorithms and control systems and the possibility of easy, simple-to-perform modernization and adaptation to emulating higher-power PV panels.
Ranges of current and voltage operations have been designed. It was established that the set values of the output current would correspond to the ISC current of the emulated PV panel. However, the set value of the unloaded PVE output voltage will correspond to the VOC voltage at the terminals of the unloaded panel. These are the extreme points on the I–V characteristic, as shown in Figure 2. Moreover, the span of the current and voltage ranges of the emulated characteristics was adopted. The output current, corresponding to ISC, is stepwise adjustable at three ranges—1 A to 2 A, 2 A to 3 A and 3 A to 4 A—and then continuously adjusted within the selected range. The output voltage VOUT, corresponding to VOC, is only continuously adjustable within a single range from 28 V to 45 V.
The main assumption of the emulation method is the ability to independently adjust a slope and curvature in specific sections of characteristics, which results in the desired shape of the emulated characteristics, wherein the maximum relative mismatch is assumed to be less than 1%. The values of voltages and currents are set both in steps and continuously, and the minimum and maximum values have been adapted to the operating conditions of the possessed inverter. It was also assumed that the emulated output curves would be continuous, and free from distortions, oscillations, spikes and rapid jump changes, which could have a negative impact on the proper performance of the MPPT algorithms. Relatively high energy efficiency was assumed by limiting dissipated power, especially in the main output control element. Moreover, inexpensive, specialized control and measurement equipment will be used for the proper functioning of the PVE.

3.2. Description of the PVE Circuit

The presented PVE is a modified current/voltage stabilizer. It has a continuously adjustably output voltage and short-circuit current value and co-operates connected to an external DC power supply. It is capable of emulating I–V curves with VOC from 28 V to 45 V and ISC from 1 A to 4 A. Such values correspond to PV panels with powers from around 25 Wp to around 160 Wp. The adjustment and stabilization of the output voltage or current for a given operation mode is realized by using the control element CE, over current protection stages OCP1 and OCP2, potentiometer voltage divider PVD, error amplifier EA and reference source RS. From the control systems point of view, the blocks CE, OCP1, OCP2, PVD, EA and RS constitute the controller.
It is worth emphasizing that this controller, and so the PVE as a whole, is a very complicated, nonlinear, time-varying dynamical system, which is very difficult to tackle in a rigorous mathematical manner. Therefore, our PVE is designed in a graphical way, with support from the simple model in Equation (2).
The CE block contains an n–p–n bipolar power transistor operating as an emitter follower. The output current IOUT is controlled by the over current protection stage OCP1. The block diagram is shown in Figure 5 and general output characteristic is shown in Figure 6.
A low-pass filter (LPF) is installed at the input to reduce higher-frequency interference from external sources that may occur at the DC power terminals. The PVE operates in the automatic regulator mode. The value of the output voltage VOUT is set using a potentiometer voltage divider (PVD). A portion of this voltage, equal to the nVOUT value, is fed to one of error amplifier inputs (EA), which is also a voltage comparator. The second input is supplied with the reference voltage Vref as a voltage drop at either the Zener diode Dz or resistance RF, both operating in the RS block. The Vref and nVOUT values are compared and their error Verr controls the power transistor in the CE block. The resistance Rs is responsible for the slope magnitude between the points PMax = (IPmax, VPmax) and P0V = (0, Vmax) within the operation mode VM. Under the operation mode VM, current differences ΔIOUT induce output voltage changes ranging from VPmax to VMax. If the output current IOUT reaches the IPmax value set in the OCP1, the output voltage achieves the VPmax value. After exceeding this value, under a further increase in IOUT, the system shifts to the current operation mode CM, and for output resistance RO = 0, it reaches the point PI0 = (ISC, 0), as shown in Figure 6. The resistance RC influences the slope within the CM area, which means the slope between the points PMax and PI0. The resistance R in the OCP1 block sets the value of the output current IOUT in the assumed range ΔISC = 3 A. For ranges 1 A, 2 A, 3 A and 4 A, the values of R are equal to 1.5 Ω, 0.75 Ω, 0.5 Ω and 0.375 Ω, respectively. In order to better match the emulated curves to the reference ones, an additional OCP2 circuit has been designed, which is coupled together with OCP1. The resistances RB1 and RB2 are used to adjust the curvature between the PMax and P0V. This solution allows a better adjustment of the characteristic shape for the VM mode and the knee area.
Depending on the operation mode, the PVE works as either a current or voltage stabilizer. It can be assumed that the operating point moves within certain limits around the PMax. When the operating point moves below the PMax, the voltage mode VM changes to the current mode CM. In contrast, if the operating point moves above the PMax, the current mode CM changes to the voltage mode VM, as shown in Figure 6.
The above output characteristics of the stabilizers are presented in the Cartesian coordinate system as the output voltage versus output current VOUT = f(IOUT). In the following sections of this paper, the curves emulated by PVE will be depicted in the same way as for the PV cells and modules, that means., the output current vs. the output voltage IOUT = f1(VOUT) and for power POUT = f2(VOUT).

4. Emulation Method

This is an original graphical (rather than analytical) method for shaping the emulated output characteristics I–V, consisting of the separate regulation of slopes and curvatures for the VM and CM regions. In this way, it is possible to obtain the shapes of the real PV module curves, which are schematically presented in Figure 7. To determine the basic shapes of PV characteristics, manufacturer’s data for VOC, ISC, VMP and IMP are used. Now, the characteristic points PMax, PI0 and P0V of Figure 6 correspond to the points MPP = (VMP, IMP), P0I = (0, ISC) and PV0 = (VOC, 0), respectively, in Figure 7. To precisely match the curvature shapes of particular sections to the I–V curve of the selected PV module, both voltage and current values for a few specific points are required. These values are obtained using the mathematical model [40] for the selected module.
Particular sections of the emulated characteristics correspond to the operating modes VM and CM of the PVE. The two modes can transfer between each other, so there is a transition region TR, in the vicinity of the MPP. The slopes of the individual sections with their curvatures are proportional to the ΔV and ΔI values, being the maximal voltage and current differences VOC-VMP and ISC-IMP, respectively. These differences are calculated into the relevant values of the resistances RS and RC, on which the slope depends. The curvatures of the sections are adjusted based on auxiliary characteristics’ current and voltage values IA, IA, VA, VA. Optionally, more values can be adopted and this depends on the emulator’s adjustment capabilities. Assumed, that the coordinates of these values are fixed and estimated (from the model (2)).
The distances between the MPP and auxiliary values and their positions on the characteristic I–V were selected empirically based on the measurement tests. For this purpose, several modules with different shapes of output curves were selected. The best results were obtained for the following fixed values: VA = 0.2 VMP and VA = 0.4 VMP, and IA = 0.75 IMP and IA = 0.5 IMP. For such values in each point, the estimated values of the current and voltage are obtained from the mathematical model. Increases in the current differences from IA-IA and IA-IMP indicate increases in the slope and curvature of the current section CM. Higher voltage differences from VA-VA and VA-VMP occur for higher slopes in the section VM. The values of calculated differences are converted into appropriate values of resistances RB1 and RB2 in the OCP2 block.
Our original emulated slope shaping method is currently being intensively developed taking into account the influence of variable lighting conditions on the shapes of the emulated curves. In addition, we plan to extend the method with the temperature coefficients kI and kV for the short-circuit current and open-circuit voltage, respectively.

5. Description of the Experimental Stand

A general view of the measuring stand is shown in Figure 8. The emulator prototype was assembled on a double-sided printing PCB board. All adjustment elements were placed in an accessible location for easy and quick setting manipulation. The emulator is powered using a DC Rohde & Schwarz 380 W programmable power supply. All measurements were performed after thermal stabilization of the CE transistor heat sink for 35 °C. Emulated characteristics I–V were collected using programmable electronic load DL3031 Rigol. Wide ranges of current and voltage measurements allow us to carry out all necessary tests with high resolutions of 2 mA and 10 mV for current and voltage ranges, respectively.
In order to limit the negative influence of the resistance of the measuring wires on the values of the obtained results, all measurements were performed using the four-wire mode.
The measurements of the PVE step responses in the case of fast step changes in the load resistance were performed for the shortest possible fall and rise times of the measured pulses. For very short rise and fall times, below 300 µs, parasitic oscillations were observed at the output, particularly at the ends of rising slopes. Therefore, the rise and fall times were set to 1.17 ms and 1.12 ms for the operating conditions 4 A/28 V and 4 A/45 V, respectively. The voltage and current output waveforms were captured simultaneously using compensated voltage and current probes and a two-channel Tektronix digital oscilloscope. The results of all measurements are plotted in Section 6.

6. Results

6.1. Simulation and Measurement Results

In the first stage of the study, the PVE circuit was designed using the TINA electronics simulation software [41] in accordance with the assumptions of Section 3.1. Then, PVE operations were simulated under the extreme operating conditions specified in the design assumptions of Section 3.1. Specifically, IOUT was tested both at 1 A and 4 A, while VOUT at 28 V and 45 V. The next step of the study consisted of assembling the prototype PVE device and testing it under various operating conditions. PVE measurements and TINA simulations were conducted for selected values of slopes and curvature settings shown in Figure 9, Figure 10 and Figure 11. The experimental data were compiled using Matlab, with the dashed lines showing the simulation results and the solid lines plotting the PVE measurements. Figure 9 shows the results of the simulations and the measurements of I–V characteristics. The emulator operation ranges of IOUT (ISC) and VOUT (VOC) are indicated.
Figure 10a,b and Figure 11a,b show the current–voltage and resulting power diagrams obtained during the TINA simulations and PVE measurements. Each plot shows the values of VMPP voltages, IMPP currents and corresponding PMax values at the MPP. Additionally, each figure contains values of VOC, ISC and MPP for the curves obtained from the PVE tests. Relative error values δ have been calculated based on Equation (6), only for the current, voltage and power values at the MPP shown on the plots. The following percentage errors are achieved: from 2.0% to 2.9% for PMax, from 1.1% to 3.9% for VMPP and from 0.64% to 1.5% for IMPP. The low values of the errors prove the high accuracy of the measurements produced by the constructed PVE as compared with the TINA simulations. However, the presented errors are still not very important. The most significant results of the relative error calculation for a mismatch between the characteristics and those from the precise mathematical model [40] will be presented in Section 6.3.
It is worth noting that the PVE is capable of emulating PV curves starting from the maximum VOUT voltage, which is equal to the VOC voltage of an unloaded PV panel. For confirmation, the coordinates of VOC points are shown in the plots. The output current IOUT can reach very closely the value ISC that flows through the PV panel when the output terminals are short-circuited. This means that the output resistance RPVE can reach very small values.
The results of the initial measurements allowed us to determine the minimum values of the output resistance from 0.52 Ω to 2.86 Ω. It is noteworthy that, regardless of the emulator’s operating settings, the high compliance and repeatability of the emulated curves can be observed.

6.2. Power Loss and PVE Efficiency

Power losses PCE in the CE control transistor have been calculated according to the following relation
P S C E = V I N R I O U T V O U T I O U T
for the two emulated power cases: 99.55 W under the VOC = 28 V/ISC = 4 A and 154.6 W under the VOC = 45 V/ISC = 4 A. The results are shown in Figure 12a,b in the form of PCE power loss plots as a function of emulated power P. The power loss PCE at MPP is equal to 16.95 W and 17.53 W for the two above respective cases. It should be noted that the VIN voltage supplied to the input of PVE from the DC source was only approximately 5 V higher than the set VOC value at the PVE output. This enabled us to significantly reduce the power lost in the CE, without affecting the PVE operation.
In addition to the CE power loss, the overall efficiency of the PVE is also affected by the losses brought about due to the resistance R in OCP1, which is series-connected with the RO. In both cases, the value of R was equal to 0.375 Ω. However, for the first case, the current IOUT is equal to 3.69 A, and for the second, 3.54 A. Therefore, the power loss causes the resistance R at the MPP to have the values of 5.1 W and 4.7 W for the two respective cases; this was taken into account during the calculation of the PVE energy efficiency:
η = V O U T I O U T V I N I I N 100 % .
According to relation (5), for the above cases, the energy efficiency η of the emulator at the MPP was calculated. For the output power equal to 99.55 W, η achieves 80.52%, whereas for 154.6 W, η reaches 85.93%. It should be noted that the calculated efficiency is appropriate for the output power at the MPP. The tracking algorithm moves within small limits along the curvature of the characteristic I–V, searching for the PMax value, which causes momentary small fluctuations in the power lost in the CE and therefore also efficiency fluctuations.

6.3. Comparison of Emulated Characteristics to the Mathematical Model of Real PV Module

Measurements were carried out to assess the accuracy of characteristics emulated by the PVE. The multi-crystalline BP Solar MSX-120 PV module was selected for comparison [42]. Electrical data of this module were collected and are presented in Table 1. The characteristics I–V of this module for STC conditions were generated using a mathematical model scripted in [40]. This type of PV module was chosen because the output values of voltage, current and power are similar to those emulated by our PVE, especially for higher output powers. The maximum output power of the PVE amounts to 160 W, while the power of the MSX-120 module at MPP equals 120 W (IMP = 3.56 A).
The PVD and RF adjusting elements set the VOC value up to 42.1 V. The short-circuit current ISC value was set to 3.87 A, changing the value of resistance R in the OCP1 block. The curvatures of the slopes MPP–VOC, MPP–ISC and the knee were adjusted by varying the resistance RC in the OCP1 and both RB1 and RB2 in the OCP2, as presented in Figure 5. Each time before conducting a proper measurement, the temperature of the CE transistor was stabilized at 35 °C. To verify the correctness of the applied settings, two control measurements were performed.
The measurement results are presented in Figure 13a, b in the form of comparison plots. The upper curves in Figure 13a represent a comparison of the current–voltage characteristic IOUT = f(VOUT) obtained from the PVE (solid blue line) to the characteristic generated using the mathematical model (dashed red line). The bottom curve represents calculated absolute differences (at each point of the plot) between the PVE current IP versus the model current IM. The absolute values of the IP-IM differences vary from 0 to a maximum of 0.030 A. The top curves in Figure 13b represent a comparison of the PVE output power characteristic POUT = f(VOUT) to the curve obtained using the mathematical model. The bottom plot represents the calculated absolute value of the PP-PM differences varying from 0 to 0.82 W. It can be seen that the PVE mimics the current–voltage and power curves of the MSX-120 commercial photovoltaic module with high accuracy. The emulator reaches an accurate VOC value of 42.1 V and approaches very closely the ISC value of approximately 3.87 A, reaching a maximum of 3.85 A. However, the MPPT algorithm does not force such extreme conditions.
The relative error δ of the mismatch between the emulated characteristics and mathematical model was calculated according to the relation:
δ = x P x M T x M T 100 % ,
where xP—data obtained from PVE measurements, xMT—mathematical model data or data acquired from TINA in Section 6.1.
The results are shown in Figure 14 a,b in the same way as for previous measurements in Figure 13. Very low errors of emulation mismatch were obtained, i.e., below 1%, as adopted in the design assumptions. It should be stressed that the mismatch magnitude in the total range of simulated characteristics was achieved in the range from 0 to 0.7%. The highest relative error of around 0.9% was observed for VOUT and POUT around 40 V and 50 W, respectively. However, this is far beyond the curve of the knee—namely, outside the area of MPPT algorithm operation.
The obtained results of relative error calculations for I–V and P–V curves were compared to the PVE realized using the FPGA platform [14]. The reported values of relative error I–V and P–V compared to the reference curves were less than 3% and 2.5%, respectively.

6.4. Transient Output Response

In addition to precisely imitating the PV characteristics, the emulator should have a relatively fast output response to step changes in load resistance Ro. Such states can be forced by the input circuits of the PV inverters, which are related to the tracking algorithm operation MPPT. The short response time of the PVE output to fast steps of load resistance changes enables the testing of high-speed MPPT algorithms.
The PVE was tested under a fast step change in load resistance. The measurements were carried out for the output voltages VOUT = 28 V and 45 V, while the maximum current IOUT = 4 A. This test allows the description of the PVE behavior under dynamic conditions more accurately. The measurements were carried out for the highest possible values of the output current step, registering simultaneously both IOUT and VOUT. The rate of rise and fall of the output current during tests was equal to 3 mA/µs. The goal was to check whether the shapes of the observed curves VOUT and IOUT during transient time Δt are comparable in both cases. The measurement was also to show whether there are no harmonic distortions and parasitic oscillations during the step Δt and immediately before and after it.
The measurement results are shown in Figure 15a,b and 16a,b. Before performing the first test, the operating conditions of the emulator were set to 4 A/28 V. Figure 15a shows the results of the PVE response time under a step change of the resistances from 2 Ω to 57 Ω, while Figure 15b shows the results from 57 Ω to 2 Ω. Response times of 1.26 ms and 1.84 ms, respectively, were obtained. The voltage and current differences ΔV and ΔI are 19.6 V and 3.52 A, respectively. The second test was performed for the changed settings to 4 A/45 V. Figure 16a shows the results of the measurement of the output response time under a step change of the resistances from 4,2 Ω to 92 Ω, and Figure 16b shows the result from 92 Ω to 4,2 Ω. Response times of 1.18 ms and 1.88 ms, respectively, were noted. For these measurements, the ΔV and ΔI differences reached approximately 28.0 V and 3.36 A, respectively.
Analyzing the obtained plots, it can be concluded that no parasitic oscillations or harmonic distortions occur during the Δt and immediately before and after it. Regarding the very different test conditions, the responses in transition times are quite comparable. The difference in response time Δt for ascending and descending RO is 0.58 ms for 4 A/28 V operating settings and 0.7 ms for 4 A/45 V, as shown in Figure 15 and Figure 16, respectively.
The obtained results were compared to the similar results of the PVE dynamic output response tests in the literature. The response time of 21.25 ms under RO step change from 5 Ω to 55 Ω was reported in [32], while a time of less than 150 ms under RO step change from 5 Ω to 30 Ω was reported in [33]. Based on the above results, it can be concluded that the proposed PVE has very good dynamic properties and can outperform some other PVEs.

7. Discussion

Based on the simulation and measurement results presented in Section 6.1, it can be concluded that the ranges of the emulated characteristics ΔISC = 3 A and ΔVOC = 17 V are in accordance with the adopted assumptions. The shapes of the PVE output characteristics obtained from the measurements are very similar to the simulation results, which can also be determined from the obtained values of PMAX, IMPP and VMPP. The PVE correctly emulates the characteristics even far beyond the MPPT area, approaching closely the ISC point and reaching the VOC point, which is additionally confirmed by the small values of the output resistance.
Power loss in the PVE circuit is minimized by selecting the appropriate value of the supply voltage. This procedure limits the power loss in the control transistor to around 17 W with the range of emulated power from around 100 W to 155 W. It effectively increases the total energy efficiency of the emulator. The obtained results, presented in Section 6.2, are satisfactory as for this type of analog device.
An important step in the measurements was to generate the I–V curves of the commercial PV module and compare them to those obtained by means of its mathematical model (2), as presented in Section 6.3. The values of the absolute differences of the current characteristics and the resulting powers were compared. Very small values were obtained for currents and powers below 30 mA and 820 mW, respectively. Additionally, relative mismatch errors were calculated for both I–V and P–V curves. The maximum error value of ±1% adopted in the assumptions was not exceeded; see Figure 14. Moreover, the obtained error results were lower than those of 2.5% to 3% reported in the literature [14]. This proves that the emulator has a very good ability to imitate the desired shapes of the photovoltaic characteristics.
Dynamic response tests, presented in Section 6.4, showed that the PVE can react quickly to time-varying load conditions of the output and does not generate any interference, harmonic frequencies, current–voltage peaks, etc. The obtained response times—see Figure 15 and Figure 16—are shorter compared to similar measurements reported in the analyzed literature. The tests were performed for changes in rising and falling resistances at the PVE output. The oscillograms of Figure 15 and Figure 16 recorded minimum and maximum values as well as differences in output voltages and currents.
The emulator is not a pulsed device, so there are no electromagnetic compatibility (EMC) problems. The emulated characteristics, in the entire reproduction range, do not contain ripples, pulsations or harmonic components. Such distortions could interfere with the MPPT algorithms by, e.g., increasing the number of iterations and overloading of the inverter processor.
The disadvantages include the manual input of the desired working conditions and characteristic shapes. This is executed by means of adjustment elements that have been calibrated during testing according to the indications of the measuring equipment. This limits, to a certain extent, the functionality of the proposed PVE; however, from the point of view of the emulator’s intended purpose, which is didactic tasks and research works at the laboratory, this is not so important at present.
The further work plan includes the adaptation of the PVE to emulate the characteristics of photovoltaic panels for output powers of up to 1 kWp. Development works are also being carried out concerning our original method for shaping slopes of emulated photovoltaic curves. Moreover, the automation of settings is under improvement using a combination of analogue and digital circuits and a dedicated application installed on a PC.

8. Conclusions

This paper presents an analogue, simply designed PV emulator, with high accuracy, mimicking the I–V characteristics of PV modules. The PVE has been developed for the purpose of teaching and the laboratory tests of a single-phase, low-voltage photovoltaic inverter. The aim of the research was to validate the authors’ method for emulating PV characteristics.
Based on the results of the simulation and the prototype measurements, it can be said that the PVE is operating in accordance with the assumptions. There is a high correlation between the simulation and measurement results. The current–voltage output characteristics are comparable to the characteristics of a commercially manufactured photovoltaic module selected for testing with high accuracy. On this basis, it can be concluded that the emulator will be able to mimic the I–V curves of different module types with similar accuracy.
The advantage of the device is the ability to adjust the slope and shape of the output runs in an analogue way, which was not found in the descriptions of other PVEs in the available analyzed literature. The other advantages include the lack of parasitic, harmonic and overvoltage oscillations in the output curves. There are no significant response time delays as the PVE is not controlled by complex algorithms. The measured energy efficiency gave very good results for this type of analogue system. Satisfactory results of dynamic measurements were also obtained in comparison with other PVEs described in the literature. The emulator reproduces the PV characteristics with high accuracy, which is evidenced by low values of relative mismatch, which are smaller than those specified in the design assumptions. The high modeling accuracy of our PVE is illustrated in Section 6, which provides a quantitative reference on the results obtained.

Author Contributions

P.K. conceived and wrote this paper, designed the experiments and carried out the simulations and measurements. J.J. provided supervision, software and review and editing. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Acknowledgments

I would like to express my gratitude to Krzysztof Latawiec, who is no longer with us, for his valuable remarks concerning the manuscript.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Single-diode equivalent circuit model of the PV cell; IPhgen—photocurrent generator.
Figure 1. Single-diode equivalent circuit model of the PV cell; IPhgen—photocurrent generator.
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Figure 2. Typical I–V characteristics of a PV cell with marked characteristic points.
Figure 2. Typical I–V characteristics of a PV cell with marked characteristic points.
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Figure 3. Effect of parasitic resistances Rs and Rsh on the I–V characteristics’ shape: (a) Effect of series resistance Rs for the MPP–VOC slope; (b) Effect of shunt resistance Rsh for the MPP–ISC slope.
Figure 3. Effect of parasitic resistances Rs and Rsh on the I–V characteristics’ shape: (a) Effect of series resistance Rs for the MPP–VOC slope; (b) Effect of shunt resistance Rsh for the MPP–ISC slope.
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Figure 4. Effect of A-value on the I–V characteristics’ shape within the arc area.
Figure 4. Effect of A-value on the I–V characteristics’ shape within the arc area.
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Figure 5. Block diagram of the proposed PVE.
Figure 5. Block diagram of the proposed PVE.
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Figure 6. General output characteristic VOUT = f(IOUT). VM—voltage operation mode, CM—current operation mode.
Figure 6. General output characteristic VOUT = f(IOUT). VM—voltage operation mode, CM—current operation mode.
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Figure 7. Graphical presentation of the emulation method.
Figure 7. Graphical presentation of the emulation method.
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Figure 8. General view of the measuring stand: 1—PVE prototype (under testing), 2—two-channel digital oscilloscope, 3—programmable DC supplier, 4—digital multimeter, 5—programmable electronic load.
Figure 8. General view of the measuring stand: 1—PVE prototype (under testing), 2—two-channel digital oscilloscope, 3—programmable DC supplier, 4—digital multimeter, 5—programmable electronic load.
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Figure 9. Simulation (dashed line) and measurements (solid line) results for the assumed values of currents IOUT (ISC) and voltages VOUT (VOC).
Figure 9. Simulation (dashed line) and measurements (solid line) results for the assumed values of currents IOUT (ISC) and voltages VOUT (VOC).
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Figure 10. Simulation and measurement results of emulated characteristics I–V and P for IOUT range from 0 to 1 A: (a) For voltage VOUT equal 28 V; (b) For VOUT equal 48 V. The minimum values of the output resistance RPVEmin are specified.
Figure 10. Simulation and measurement results of emulated characteristics I–V and P for IOUT range from 0 to 1 A: (a) For voltage VOUT equal 28 V; (b) For VOUT equal 48 V. The minimum values of the output resistance RPVEmin are specified.
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Figure 11. Simulation and measurement results for the output current range from 0 to 4 A: (a) For voltage VOUT equal 28 V, where VMPP and IMPP values are indicated; (b) For VOUT equal 48 V. The minimum values of the output resistance RPVEmin are specified. The location of important points is also shown: ISC, VOC, IMPP, VMPP.
Figure 11. Simulation and measurement results for the output current range from 0 to 4 A: (a) For voltage VOUT equal 28 V, where VMPP and IMPP values are indicated; (b) For VOUT equal 48 V. The minimum values of the output resistance RPVEmin are specified. The location of important points is also shown: ISC, VOC, IMPP, VMPP.
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Figure 12. PCE power loss in CE as a function of output power P (at MPP): (a) For output power 99.55 W, PCE = 16.95 W; (b) For output power 154.6 W, PCE = 17.53 W.
Figure 12. PCE power loss in CE as a function of output power P (at MPP): (a) For output power 99.55 W, PCE = 16.95 W; (b) For output power 154.6 W, PCE = 17.53 W.
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Figure 13. Comparison of emulated characteristics by PVE (solid blue line) and generated by mathematical model (dashed red line): (a) Upper curves represent IOUT = f(VOUT) function, bottom curve represents absolute values of the IP-IM difference; (b) Upper curves represent POUT = f(VOUT) function, bottom curve represents absolute values of the PP-PM difference.
Figure 13. Comparison of emulated characteristics by PVE (solid blue line) and generated by mathematical model (dashed red line): (a) Upper curves represent IOUT = f(VOUT) function, bottom curve represents absolute values of the IP-IM difference; (b) Upper curves represent POUT = f(VOUT) function, bottom curve represents absolute values of the PP-PM difference.
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Figure 14. Comparison of PVE characteristics to the model and relative error calculation results: (a) Upper curves are the function IOUT = f(VOUT), bottom curve represents relative error values at each point of the compared plots; (b) Upper curves are the function POUT = f(VOUT), bottom curve represents relative error values.
Figure 14. Comparison of PVE characteristics to the model and relative error calculation results: (a) Upper curves are the function IOUT = f(VOUT), bottom curve represents relative error values at each point of the compared plots; (b) Upper curves are the function POUT = f(VOUT), bottom curve represents relative error values.
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Figure 15. Responses of the PVE output to Ro steps under the operating conditions 4 A/28 V: (a) The output response for the increase step change of resistances from 2 Ω to 57 Ω; (b) The output response for the decrease step change of resistances from 57 Ω to 2 Ω.
Figure 15. Responses of the PVE output to Ro steps under the operating conditions 4 A/28 V: (a) The output response for the increase step change of resistances from 2 Ω to 57 Ω; (b) The output response for the decrease step change of resistances from 57 Ω to 2 Ω.
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Figure 16. Responses of the PVE output to Ro steps under operating conditions 4 A/45 V: (a) The output response for the increase step change of resistances from 4.2 Ω to 92 Ω; (b) The output response for the decrease step change of resistances from 92 Ω to 4.2 Ω.
Figure 16. Responses of the PVE output to Ro steps under operating conditions 4 A/45 V: (a) The output response for the increase step change of resistances from 4.2 Ω to 92 Ω; (b) The output response for the decrease step change of resistances from 92 Ω to 4.2 Ω.
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Table 1. Multi-crystalline module parameters of BP Solar MSX-120 at STC.
Table 1. Multi-crystalline module parameters of BP Solar MSX-120 at STC.
ParameterValue
Maximum power (PMax)120 W
Voltage at Pmax (VMP)33.7 V
Current at Pmax (IMP)3.56 A
Short-circuit current (ISC)3.87 A
Open-circuit voltage (VOC)42.1 V
Temperature coefficient of ISC(0.065 ± 0.015) %/°C
Temperature coefficient of VOC−(80 ± 10) mV/°C
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Korasiak, P.; Jaglarz, J. A New Photovoltaic Emulator Designed for Testing Low-Power Inverters Connected to the LV Grid. Energies 2022, 15, 2646. https://doi.org/10.3390/en15072646

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Korasiak P, Jaglarz J. A New Photovoltaic Emulator Designed for Testing Low-Power Inverters Connected to the LV Grid. Energies. 2022; 15(7):2646. https://doi.org/10.3390/en15072646

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Korasiak, Przemysław, and Janusz Jaglarz. 2022. "A New Photovoltaic Emulator Designed for Testing Low-Power Inverters Connected to the LV Grid" Energies 15, no. 7: 2646. https://doi.org/10.3390/en15072646

APA Style

Korasiak, P., & Jaglarz, J. (2022). A New Photovoltaic Emulator Designed for Testing Low-Power Inverters Connected to the LV Grid. Energies, 15(7), 2646. https://doi.org/10.3390/en15072646

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