Analysis on DC Fault Current Limiting Operation of Twice-Quench Trigger Type SFCL Using Transformer Considering Magnetizing Current and Current Limiting Reactor

Abstract

As the penetration of distributed energy resources (DER) has increased, research on direct current (DC) power transmission and distribution has been actively performed. The DC system has the advantage of high-power transmission efficiency. However, it has a very large and rapid increase in fault current in the DC system directly after a fault occurs. As one of the countermeasures, studies on the application of the superconducting fault current limiter (SFCL) into the DC system have been conducted to protect major facilities from DC fault current, which is expected to alleviate the power burden on the DC circuit breaker through its quench operation. Among the studied DC SFCLs, the trigger-type DC SFCL using a transformer, which can achieve the peak DC fault current-limiting operation, has been suggested. However, the DC fault current-limiting operation, in the case of the DC SFCL with a current-limiting reactor (CLR), was analyzed to not be effectively executed in the steady state since the transient state directly follows the fault occurrence. In this paper, the DC fault current-limiting operation of a twice-quench trigger type SFCL using a transformer considering magnetizing current and its CLR was analyzed. Through DC fault current-limiting experiments according to the inductance of its current-limiting reactor (CLR), the effective current-limiting design of twice-quench trigger type SFCL using a transformer was described.

1. Introduction

The importance of renewable energy has emerged to cope with the climate change problem. Accordingly, the penetration of distributed energy resources (DER) in a power distribution system has increased, and thus, many studies on direct current (DC) power systems have been carried out. In particular, since DC transmission has advantages in terms of power loss compared with AC transmission, DC transmission begins to take notice as a future transmission plan. Furthermore, a high-voltage direct current transmission (HVDC) system has the advantage of being able to control the power flow and is particularly advantageous for long-distance transmission. However, when a fault occurs in the DC power system, the DC fault current rapidly increases. The fault current should be interrupted as quickly as possible because it can adversely affect other major equipment. Therefore, the DC fault current is required to be limited for quick interruption [1,2,3,4,5,6,7].

As a method to limit the fault current in a DC power system, superconducting fault current limiters (SFCLs) have been mainly studied. Among the various types of SFCLs, the flux-lock type, the trigger type, and the transformer type SFCLs, which perform the peak fault current-limiting operation through the twice-quench of superconducting modules, have been suggested [8,9,10,11,12,13,14,15,16]. The application of the SFCL using a twice-quench DC power system is expected to be an effective solution to solve the problem of DC fault current. Recently, as one of the DC SFCLs, the trigger type SFCL using a transformer, which could perform DC fault current-limiting operation through twice quench according to its current-limiting reactor/resistor (CLR), was suggested [16]. However, the DC fault current-limiting operation of the trigger type SFCL using a transformer is affected by the magnetizing current of the transformer, which can make its DC fault current-limiting operation ineffective during the DC fault period. Furthermore, in the case of the trigger type SFCL with the current-limiting reactor, unlike the current-limiting resistor, its charging and discharging characteristics affect the DC transient fault current-limiting operation of the trigger type SFCL using a transformer. Therefore, the analysis of the transient operating characteristics of the trigger type SFCL using a transformer due to the magnetizing current of the transformer and the charging and discharging characteristics of its CLR is essentially needed.

In this paper, with consideration for the magnetizing current from its electrical equivalent circuit, the DC transient fault current-limiting operations of a twice-quench trigger type SFCL using a transformer with a current-limiting reactor were analyzed. For the analysis of its DC fault current-limiting operation, the DC short-circuit experiment for the DC short-circuit tests of twice-quench trigger type SFCL using a transformer was constructed. From the analysis of the DC short-circuit tests, it was confirmed that the charging and discharging characteristics of the current-limiting reactor comprising a twice-quench trigger type SFCL using a transformer, together with its magnetizing current, played a main role in its DC transient fault current-limiting operation.

2. Operational Characteristics and Experimental Circuit

2.1. Operational Characteristics of Twice-Quench Trigger Type SFCL Using Transformer

The structure of a twice-quench trigger type SFCL using a transformer is shown in Figure 1. The primary winding (N₁) and the secondary winding (N₂) are wound on the same iron core to create the magnetic coupling between the two windings. The first high-temperature superconducting (HTSC) module (R_SC1) is connected in parallel with the primary winding, which is connected in series with CLR. The second HTSC module (R_sc2) is connected with the secondary winding. To maintain a superconducting state in normal time, two HTSC modules are immersed within a cryostat filled with liquid nitrogen.

Before a DC fault occurs, the DC current only flows in the first HTSC module of a twice-quench trigger type SFCL using a transformer because the CLR’s coil’s resistance is not ignored. However, in the event of a DC fault, if the DC fault current exceeds the critical current (I_C1) of the first HTSC module, the quench in the first HTSC module happens, and the DC fault current flows into both the first HTSC module and the N₁ winding connected in series with the CLR. The magnetic flux (ψ₁) made by the current flown into the primary winding (i_N1) is cancelled by the magnetic flux (ψ₂) made by the induced current in the secondary winding (i_N2), which is equal to the current in the second HTSC module (i_SC2). Therefore, the voltages in two windings are not induced, i.e., almost zero if the resistance of the winding is negligible.

If a larger DC fault current flows, the induced current in the secondary winding (i_N2) is also increased and exceeds the critical current (I_C2) of the second HTSC module, which can induce the quench in the second HTSC module. The resistance generation in the second HTSC module is suppressed by its quench, which suppresses the increase in current in the secondary winding. Therefore, the magnetic flux (ψ₂) made by the induced current in the secondary winding is not enough to offset the magnetic flux (ψ₁) made by the current in the primary winding. No offset magnetic flux between two windings induces the voltage in each winding, and the fault current-limiting operation for larger DC fault current is performed by the twice-quench occurrence of a twice-quench trigger type SFCL using a transformer. Additionally, after the quench occurrence in the first HTSC module due to larger DC fault current generation, the second DC fault current-limiting level of the twice-quench trigger type SFCL using a transformer can be easily adjusted by the primary and secondary windings’ turn ratios of the transformer.

Figure 2 shows the DC fault current-limiting curves of a twice-quench trigger type SFCL using a transformer according to the amplitude of the DC fault current. Two HTSC modules comprising a twice-quench trigger type SFCL using a transformer can be quenched once or twice due to whether the increased current in each HTSC module directly after DC fault occurrence exceeds each critical current (I_C1, I_C2) or not. The solid line and the dotted line in Figure 2 represent the lower DC fault current case (i_SC1¹, i_SC2¹, i_SFCL¹) and the larger DC fault current case (i_SC1², i_SC2², i_SFCL²), respectively. In the case of a lower DC fault current, as indicated by the solid line in Figure 2, the DC fault current (i_SFCL¹) can be displayed as limited as the current in only the first HTSC module, not the second HTSC module, exceeds its critical current (I_C1), i.e., the quench occurrence in the first HTSC module. However, in cases of larger DC fault current, as indicated by the dotted line in Figure 2, DC fault current (i_SFCL²) can be shown to be limited as the current in the second HTSC module exceeds its critical current (I_C2) shortly after the current in the first HTSC module exceeds its critical current (I_C1), i.e., through twice quench occurrence in the first and second HTSC modules.

2.2. Equivalent Circuit of Twice-Quench Trigger Type SFCL Using Transformer

The equivalent circuit of the twice-quench trigger type SFCL using a transformer is shown in Figure 3. N₁, N₂, and L_m express the primary and secondary winding’s numbers of the ideal transformer and the magnetization inductance of the transformer, respectively. R_SC1 and R_SC1 represent the resistances of the first and second HTSC modules. The current on the primary side (i_N1) of the transformer is equal to the sum of the converted current on the primary side from the secondary side (i′_N1) and the current in the magnetization inductance (i_m). During the transient period, in the case of the quench occurrence in the first HTSC module directly after a DC fault happens, the current in the primary side (i_N1) flows into both the primary winding (N₁) and the magnetization inductance (L_m), as shown in Figure 3. However, in the steady state after the transient period, the current on the primary side (i_N1) is expected to flow only into the magnetization inductance because the magnetization inductance is operated as the disturber for the fluctuation of the current.

Similar to the magnetization inductance, the CLR, if it is designed as the current-limiting reactor, is expected to suppress the variation of the current.

Figure 4 shows the charge and discharge characteristics of CLR according to its amplitude, comprising twice-quench trigger type SFCL using a transformer. In the case of CLR with lower inductance, as indicated by the solid line in Figure 4, the current in CLR (i_CLR1) starts to increase with a large slope at t₀ and decreases again with a large slope after it approaches the peak point at t₁, and then it returns to the normal value at t₂. The voltage across CLR (v_CLR1) has a positive constant value (A) when the current in CLR increases from t₀ to t₁ and a negative constant value (B) when the current in CLR decreases from t₁ to t₂. From the instantaneous power of CLR (p_CLR1), which is obtained from its voltage and current waveforms during the t₀–t₂ period, the charge and the discharge periods of the CLR can be analyzed. In addition, it is observed that the charge area in p_CLR1 from t₀ to t_1, as indicated with ‘C’ is equal to the discharge area of ‘D’ from t₁ to t₂. Therefore, the CLR with larger inductance, as indicated by the dotted line in Figure 4, can be expected to have a longer charge period from t₀ to t_1′ and a longer discharge period from t_1′ to t_2′, which leads the voltage across CLR (v_CLR2) to have a positive constant value (A + ΔA) and a negative constant value (B + ΔB). From these voltage and current waveforms during the t₀–t_2′ period, the instantaneous power with both larger charge area (C + ΔC) from t₀ to t_1’ and discharge area (D + ΔD) from t_1’ to t_2′ can be displayed, which is analyzed to affect its DC transient fault current-limiting characteristics.

2.3. Configuration of DC Fault Experimental Circuit

The schematic configuration of a DC fault experimental circuit to analyze the operational characteristics of a twice-quench trigger type SFCL using a transformer is shown in Figure 5. DC source voltage was obtained by rectifying three-phase AC voltage (E_a, E_b, and E_c) through a power diode bridge circuit. After SW₁ is closed, SW_L connected in series with R_L is closed, which allows normal DC current to flow through only R_L resistance. To generate DC fault current, another SW_F connected in series with R_F resistance is closed. If R_L and R_F resistances are designed to be 10 Ω and 2.5 Ω, respectively, DC fault current can be generated 5 times larger than the normal time because the equivalent resistance of R_L and R_F resistances with a parallel connection is 2 Ω. To simulate DC fault current for 100 [ms], SW_F was closed at 0.3 [s] and opened at 0.4 [s] after SW_L was closed.

The turn ratio of the primary and secondary windings for the second DC fault current-limiting level of a twice-quench trigger type SFCL using a transformer was designed to be 3. To analyze its charge and discharge characteristics during the transient DC fault period, the inductance of CLR comprising twice-quench trigger type SFCL using a transformer was designed to be 6.6 and 10.0 mH, respectively. As two HTSC modules, Y₁Ba₂Cu₃O_7−x (YBCO) thin films, which were applied into this SFCL, were cooled in a cryostat filled with liquid nitrogen to maintain their superconducting states [15,16,17,18,19]. Parameters for each component of the DC fault experimental circuit are shown in

Table 1. Parameters for components of DC fault experimental circuit.

Component	Parameter	Value	Unit
Source and Load/Fire Resistances	AC Voltage (Ea,b,c)	80	[Vrms]
	Load Resistance (RL)	10	[Ω]
	Fire Resistance (RF)	2.5	[Ω]
Twice-quench trigger type SFCL using transformer	Turns Ratio (N1/N2) of Primary and Secondary Windings	3	-
	CLR	6.6, 10	[mH]
	HTSC Modules (RSC1, RSC2)		-
	Fabrication Type	Thin Film
	Material	YBCO	-
	Total Meander Line Length	420	[mm]
	Line Width	2	[mm]
	Thin Film Thickness	0.3	[µm]
	Gold Layer Thickness	0.2	[µm]

.

3. Result and Discussion

Among two cases for different inductances of CLR, Figure 6 shows DC fault current-limiting operational waveforms of twice-quench trigger type SFCL using a transformer with CLR’s inductance of 6.6 [mH] during the initial fault period. For the transient analysis on the operational characteristics of twice-quench trigger type SFCL using transformer, nine points (0, 1, 2, …, 8) were indicated in Figure to identify the operational sequence.

In Figure 6a,b, ‘0’ point is 0.3 [s], which is the point at which the fault starts. As soon as the fault occurs, the currents of both the SFCL and the first HTSC module (I_SFCL, I_SC1) increase sharply and reach their peak value at point ‘1’. At the same time, the first HTSC module is partially quenched, and after point ‘1’, it is completely quenched, as seen in its resistance and voltage waveform (R_SC1, V_SC1). Simultaneously, the voltage across CLR (V_CLR) starts to rise rapidly after point ‘1’ and has a peak value at point ‘2’ where the current of the first HTSC module reaches its peak value. After point ‘2’, point ‘3’ represents the recovery point into its critical current after the current of the first HTSC module (I_SC1) exceeds its critical current (I_C). Additionally, point ‘3’ corresponds to the point at which the current of the second HTSC module (I_SC2) arrives at its critical current (I_C), as seen in Figure 6a.

After point ‘3’, the current of the first HTSC module (I_SC1) slowly decreases below its critical current (I_C), and the current of second HTSC module (I_SC2) continues to increase. At point ‘4’, the voltage of CLR (V_CLR), which decreased after it came to the peak value at point ‘2’, becomes zero. The instantaneous power of CLR (P_CLR), which was induced after point ‘0’, can be observed to come to zero from Figure 6b. From the instantaneous power waveform of CLR, the period from point ‘0’ to point ‘4’ can be analyzed to be the charge time of CLR, as described in Figure 4.

Shortly after point ‘4’, the voltage of the CLR (V_CLR) sharply decreases below zero, and it reaches the negative peak value at point ‘5’. At the same time, the voltages in primary and secondary windings (V_N1, V_N2) have peak values at point ‘5’ after they increased with a sharply rising slope. After point ‘4’, the second HTSC module is seen to be completely quenched from its resistance and voltage waveform (R_SC2, V_SC2).

At point ‘6’, the voltage of CLR (V_CLR) and the instantaneous power of CLR (P_CLR), which had the negative peak value at point ‘5’, again become zero. The period from point ‘4’ to point ‘6’ can be analyzed to correspond to the discharge time of CLR. Therefore, the charge and the discharge period of CLR for one cycle can be identified as being equal to ‘0’ to ‘6’ points from Figure 6.

After point ‘6’, the current of CLR (I_CLR) (or the current of the primary winding (I_N1)) seems to keep the constant amplitude due to the almost constant resistance of two HTSC modules. However, a little increase in resistance of the first HTSC module and a little decrease in resistance of the second HTSC module cause the current in the primary current (I_N1) to flow into magnetization inductance (I_m). Point ‘7’ represents the crossing point of both the voltage of the CLR (V_CLR) and the voltage of the secondary winding (V_N2) (or the voltage of the second HTSC module (V_SC2)) after the charge and discharge of the CLR. After point ‘7’, as the resistance of the second HTSC module decreases, the voltage in the second HTSC module also decreases and finally recovers to zero at point ‘8’, as seen in Figure 6a. After point ‘8’, the current of the primary winding is seen to be almost the same as the current of the magnetization inductance. It derives the second HTSC module to recover into the superconducting state, and thus, the resistance of the second HTSC module (R_SC2) again falls to a near zero after point ‘8’, as seen in Figure 6b. In addition, the instantaneous power of CLR (P_CLR) is seen to increase gradually since the ‘8’ point due to the slow increase in its current (I_N1).

As CLR with another inductance, Figure 7 shows DC fault current-limiting operational waveforms of twice-quench trigger type SFCL using a transformer with CLR’s inductance of 10.0 [mH] during the initial fault period. The tendency of the overall voltages and currents for CLR at 10.0 [mH] is similar to one in Figure 6, where CLR’s inductance is designed to be lower at 6.6 [mH]. However, in the case that CLR’s inductance is designed to be large, the overall current magnitude decreases and the overall voltage magnitude increases compared with the case of CLR with a low inductance value.

From comparative analysis of Figure 6 and Figure 7, the DC fault current-limiting effect during the initial fault period was confirmed to be better in cases where the inductance of the CLR was designed to be large. However, in the case of CLR with a larger inductance, the charge and discharge period from point ‘0’ to point ‘6’ increase together with its instantaneous power.

In the case that CLR’s inductance is 6.6 [mH], as shown in Figure 6, point ‘0’ starts at about 0.300 [s] and point ‘4’ ends at about 0.3075 [s]. Therefore, its charge period is about 7.5 [ms]. Additionally, its discharge period is about 3.5 [ms] because point ‘6’ ends in about 0.311 [s]. On the other hand, in the case that CLR’s inductance is 10.0 [mH], as shown in Figure 7, its point ‘4’ and point ‘6’ are about 0.310 [s] and 0.315 [s], respectively. Thus, its charge period is about 10.0 [ms], and its discharge period is about 5.0 [ms]. Furthermore, the instantaneous power in the case of CLR’s inductance with 10.0 [ms] is seen to increase more than CLR’s inductance with 6.6 [ms].

It was analyzed from the above comparative analysis for two cases with different inductances of CLR that the charge and discharge period of CLR could be increased, although DC fault current-limiting operation of a twice-quench trigger type SFCL using a transformer during the initial fault period could be effective by designing a large CLR’s inductance. The descriptions for each point number in the displayed voltage and current waveforms in each Figure are listed in

Table 2. Description for each point number to identify operational sequence of twice-quench trigger type SFCL using transformer.

Point Number	Description
0	DC fault starting point
1	First peak point of ISFCL
2	First peak point of VCLR
3	Recovery point into its critical current after current of first HTSC module (ISC1) exceeds its critical current (IC)
4	Falling point at zero value after VCLR has positive value
5	First peak negative point after VCLR arrives at zero value
6	Arrival point at zero value after VCLR becomes first peak negative point
7	Crossing point of VCLR and VN2 after charge and discharge of CLR
8	Arrival point at zero value of VN2 (=VSC2) after charge and discharge of CLR

.

During fault occurrence, including the period after fault removal, DC fault current-limiting operational characteristics were analyzed. The DC fault current-limiting operating waveforms of twice-quench trigger type SFCL using a transformer with a CLR’s inductance of 6.6 [mH] are shown in Figure 8. The area of the red dotted box in Figure 8 is the same as in Figure 6. The ‘a₁’ period shown in Figure 8 is the first charge and discharge period of CLR, and the ‘a₂’ period means the second charge and discharge period of CLR.

After the first charge and discharge period (‘a₁’ period), the current of CLR (I_CLR = I_N1) converges into the constant amplitude after the increase with the gentle slope as seen in Figure 8, which corresponds to the second charge period. As expected from the first discharge period, the current of CLR is observed to be almost the same as one of the magnetization inductance (I_m).

The second discharge period of CLR starts directly after the fault is removed. As soon as the second discharge starts, the voltage of the CLR (V_CLR) greatly decreases and approaches a negative peak. After the negative peak, it approaches zero with a gradual slope, which is the second discharge period of CLR. Additionally, the voltage of the first HTSC module (V_SC1) as well as its current (I_SC1) have a similar waveform to the voltage of the CLR during the second discharge period, as seen in Figure 8a. Furthermore, the instantaneous power energy in CLR, which is charged for the second charge period, is confirmed to be discharged for the second discharge period, as displayed with ‘a₂’ in Figure 8b.

Although the fault is removed, the recovery time of the first HTSC module into the superconductive state as well as the extinction of the magnetization inductance’s current are analyzed to be delayed due to the second discharge period of CLR. In the case of the CLR with an inductance of 6.6 [mH], as shown in Figure 8, it was confirmed that the discharge of the CLR ended at about 0.431 [s].

The DC fault current-limiting operating waveforms of twice-quench trigger type SFCL using a transformer with a CLR’s inductance of 10.0 [mH] during the entire fault period are shown in Figure 9. The tendency of the overall current and voltage waveforms in Figure 9 was observed to be similar to the case that CLR’s inductance was designed to be 6.6 [mH] in Figure 8. However, in the case that CLR’s inductance was designed to be 10.0 [mH], the second discharge period of CLR was seen to end at about 0.457 [s]. Therefore, the second charge and discharge period of CLR, as marked with ‘a₂’ in Figure 9, was longer than the case where CLR’s inductance was designed to be 6.6 [mH]. As a result, it is confirmed that the larger the CLR’s inductance is designed, the longer the second charge and discharge period is expected. The first and second charge and discharge periods according to two CLR’s inductances as analyzed above are shown in

Table 3. Charge and discharge periods according to inductance of CLR.

Inductance of CLR [mH]	First Charge and Discharge Period [ms]	Second Charge and Discharge Period [ms]
6.6	11	120
10.0	15	142

.

4. Conclusions

In this paper, the DC fault current-limiting operation of a twice-quench trigger type SFCL using a transformer, considering both the magnetizing current and the inductance of its CLR, was analyzed. With constructed DC fault current-limiting experiments, DC short-circuit tests of twice-quench trigger type SFCL using transformers were executed.

For the transient analysis of its operational characteristics, the operational sequence of a twice-quench trigger type SFCL using a transformer was described with nine points in its measured current and voltage waveforms. The charge and discharge characteristics of CLR comprising a twice-quench trigger type SFCL using a transformer were confirmed to affect its transient DC fault current-limiting operation as well as the recovery characteristics directly after the fault was removed.

Through comparative analysis of two cases with different inductances of CLR, the charge and discharge period of CLR were found to be increased in cases of large CLR’s inductance, although DC fault current-limiting operation of a twice-quench trigger type SFCL using a transformer during the initial fault period could be effective.

The countermeasure for the more effective DC fault current-limiting operation of twice-quench trigger type SFCL using a transformer in the stead state since the transient state directly after the fault occurrence is expected to be needed in future research.