Design of Robust Fuzzy Logic Controller Based on Gradient Descent Algorithm with Parallel-Resonance Type Fault Current Limiter for Grid-Tied PV System

Abstract

This article demonstrates a new topology for optimization of the electrical variables and enhancement of low-voltage-ride-through (LVRT) capacity of a grid-tied photovoltaic system (PS) during asymmetrical faults. The proposed topology comprises a fuzzy-logic controller (FLC) based on gradient descent (GD) optimization in association with parallel-resonance-type fault current limiter (PRFCL) as an LVRT circuitry. Gradient descent is an iterative process to minimize the objective function by updating the variable in the opposite direction of the gradient of the objective function. The PRFCL optimizes the fault variables, specifically preventing voltage sag without any transitional spikes. A 100-kW detailed model of grid-tied PS is used in MATLAB/Simulink to analyze the response of the proposed topology at the point of common coupling (PCC) and PV side variables. A keen comparative study of the conventionally adopted proportional-integral (PI) controller in association with crowbar circuitry is carried out for the justification of the proposed topology. The simulation findings of the proposed topology authenticate the optimal response of variables in terms of stability, robustness, smoothness, and fault tolerance at both the grid side and the PV side.

1. Introduction

Affinity for distributed energy sources (DES) has increased in the developed and developing parts of the world because of their abundance, pollution-free, and eco-friendly nature [1,2]. Another reason is the abrupt diminishing of fossil fuel reserves for conventional power generation, which compels the world to lean towards DES [3]. Over the last several years, the adoption of a photovoltaic system (PS) is rapidly increasing for domestic and commercial loads and will play an important role in the future of the mixed power utility grid [4]. According to the energy forecast 2020, solar power generation will lead wind generation, due to the increase in PV installation throughout the major regions of the world [5]. The popularity of photovoltaic systems is increasing due to their attractive and flexible application from low voltage to medium voltage [6].

The controllability and observability of the PV system is a complicated task because of its output dependency on variable irradiance and the temperature of the sun. A conventional PV system comprises two independently controlled levels, namely, a DC-to-DC converter and a DC-to-AC inverter [7]. The DC-to-DC boost converter is adopted for the regulation of PV voltage at maximum power point tracking (MPPT) before delivering it for inversion to the AC signal [8,9]. In most cases, voltage source inverters (VSI) are the preferred current source inverters (CSI) due to their simplicity, stable output, and dual control structure, i.e., voltage and current loops [10]. Previously, most of the work has been carried out for modeling and steady state analysis of grid-tied PV system [11,12,13]. However, a very limited study is carried out at transients and fault conditions [14,15].

According to the statical analysis of the last decade, the interconnection of solar power in the utility grid is rising abruptly. As long as the level of PV-generated power is increasing in the present high inertial grid the feasibility of its disconnection from the grid becomes no longer acceptable [16]. It dangerously affects the safe operation, stability, and reliability of the power system [17,18]. Therefore, most developed countries are continuously changing grid codes according to the level of insertion of PV power and the inertial status of their power grid [19,20,21]. However, the German national grid code “low voltage ride through (LVRT)” capacity for grid-tied PS presented by energy on (E.ON) is thought to be the most advanced code and is approved by the various states of the world [20]. A limit characteristic curve for voltage has been defined by E. ON during fault conditions at point of common coupling (PCC) of type 2 power generating units [22]. To achieve grid stability during fault events, reactive power injection is required to hold onto grid voltages, and it is also applicable for the low-voltage grid [23,24].

The LVRT capability of a grid-tied PS represents how strongly a PV power unit remains stable and connected to the utility grid during temporary fault conditions or transients [25,26]. DERs must insert reactive current for voltage support during unbalanced fault conditions, and its amount depends on the amount of voltage dip. This voltage support must be activated within twenty milli-seconds after the voltage dip detection, and after clearing the fault the DERs must insert a reactive current of 2% of rated current per 1% of voltage sag [27,28,29]. The effect of sag in voltage/rise in current on the inverter operation and life of PV array diodes can be severely dangerous due to an increase in magnitude of harmonics and transient spikes. Until now, various LVRT topologies have been presented to limit the DER operation under the constraints of German grid codes. Most of these topologies have effectively enhanced the voltage sag during short-term unbalance however the increase in harmonic distortions, ripples and power lose are compromised [30,31,32]. Considering the DC-link voltage, real and reactive current control, many control schemes have been carried out; however, most of them respond to the non-sinusoidal current waveform during abnormal conditions [33,34]. A control scheme for balancing negative and positive sequence is introduced, but harmonic oscillation in real/reactive current is compromised [33]. Conventionally tuned proportional-integral (PI) controllers with some resonance combinations are proposed in the above-illustrated studies for error compensation in DC-link voltage to be fed into the inverter.

The proportional–integral (PI) controller is the most popular in industrial applications because of its simplicity; however, it has some constraints for its non-linear behavior towards dynamic models i.e., unbalance conditions and sensitivity to parametric ambiguities [35]. Moreover, crowbar circuitry is being used conventionally as an FRT topology to limit the temporary short circuit current at the low voltage side, although it does not follow the grid interconnection standards and functionality to regain the normal operation after fault clearance [36].

To overcome the aforementioned limitations, this article presents a novel and optimal topology “FLC based on gradient descent algorithm in association with PRFCL”, which has the ability to efficiently control inverter input and enhance the LVRT capability with low harmonic distortion during unbalanced conditions. The GD algorithm is a fast convergent iterative process, and its direction is in the negative gradient, i.e., towards the minimum error. In addition, the PRFCL circuit consists of a resonance path having high reactive impedance, and its frequency is the same as the system frequency. For implementation and justification of the proposed topology, a detailed 100 kW grid-tied PS is used in MATLAB/Simulink.

The specific contributions of this paper are listed below as:

• The proposed topology is implemented during fault at the PCC of three-phase grid-tied PS. The simulation results under asymmetrical faults are analyzed at both grid side and the PV side.
• An efficient power electronic-based PRFCL circuitry is designed for the enhancement of LVRT capability. A detailed comparison is also carried out under study with conventionally used crowbar circuitry.
• FLC based on GD optimization is designed and implemented which is fast and always convergent. Furthermore, previously used conventional PI controller response is also carried out for the sake of comparison.
• The overall efficiency of the proposed topology GD algorithm in association with PRFCL is authenticated for the fault time of150ms with all possible combinations of two controllers and two LVRT circuitries.
• To justify the low harmonic distortions with the proposed topology, total harmonic distortion (THD) for voltage and current is calculated and compared.
• Performance evaluation analysis is also performed using performance indices such as integral square error (ISE), integral of time-weighted absolute error (ITAE), and integral absolute error (IAE) to verify minimum settling error throughout the simulation run-time for the proposed topology.

The remaining article is structured as follows: Section 2 presents the design of the controller along with the LVRT circuit of the proposed model, Section 3 provides results and discussion, and Section 4 concludes the present article with a brief proposal for future work.

2. Proposed Model

A 100 kW grid-tied PS platform is used for the implementation and justification of the proposed topology in MATLAB^®/Simulink^®/Simscape. The parameter values used for the inter-connected blocks of the model are taken from the system advisor model (SAM) of the national renewable-energy laboratory (NREL). The system comprises a PV array, DC-to-DC boost-converter, and VSI and L-C-L filter to deliver PV-generated power to the utility-grid, as shown by Figure 1. A PV cell is the basic unit of PV module made by the fabrication of p-n junction in a thin sheet of semiconductor. According to the phenomenon of PV effect, the radiation from solar energy can be directly converted to electric charge. As there is no PV cell having 100% efficiency, high- and low-value resistors are included in parallel and series with respect to the circuit of a practical PV cell [37]. The values of these inter-resistances can be estimated by using the slope of voltage-current characteristics (V-I curve) of the specific module [38,39].

$${\mathrm{I}}_{\mathrm{PV}}={\mathrm{I}}_{\mathrm{ph}}-\left({\mathrm{I}}_{\mathrm{d}}+{\mathrm{I}}_{\mathrm{pr}}\right),$$

(1)

$${\mathrm{I}}_{\mathrm{PV}}={\mathrm{I}}_{\mathrm{ph}}-\left[{\mathrm{I}}_{\mathrm{sat}}.\left\{\exp \left(\frac{\mathrm{V}+{\mathrm{I}}_{\mathrm{PV}}.{\mathrm{R}}_{\mathrm{ser}}}{{\mathrm{V}}_{\mathrm{T}}}\right)-1\right\}+\left\{\frac{\mathrm{V}+{\mathrm{I}}_{\mathrm{PV}}.{\mathrm{R}}_{\mathrm{ser}}}{{\mathrm{R}}_{\mathrm{par}}}\right\}\right].$$

(2)

The parameters of above equation are elaborated as:

${\mathrm{I}}_{\mathrm{PV}}$ is PV current, ${\mathrm{I}}_{\mathrm{sat}}$ is diode’s reverse current (5.262e^−09A), ${\mathrm{I}}_{\mathrm{ph}}$ is ultimate insulation level (5.96A), ${\mathrm{R}}_{\mathrm{ser}}=$0.0832 ohms and ${\mathrm{R}}_{\mathrm{par}}=$ 8191 ohms are series and parallel resistance, respectively.

${\mathrm{V}}_{\mathrm{T}}$: Thermal voltage, calculated by Equation (3) as

$${\mathrm{V}}_{\mathrm{T}}=\frac{\mathrm{KT}}{\mathrm{q}.\mathrm{Qd}.\mathrm{Npar}.\mathrm{Nser}}$$

(3)

Here, $\mathrm{K}$ is the Boltzmann constant =$1.3804*{10}^{-23}\left(j/K\right)$, $\mathrm{T}$:Temperature (absolute) = 25 (degree C).

${\mathrm{Q}}_{\mathrm{d}}:$ Quality factor of diode = 1.25, $\mathrm{q}:$ Charge of electron = $1.602*{10}^{-19} Coulomb \left(C\right)$.

The overall PV array consists of ${\mathrm{N}}_{\mathrm{par}}:$ 66 strings operating in parallel, ${\mathrm{N}}_{\mathrm{ser}}:5$ modules in series.

The overall PV array comprises 330 (SunPower SPR-305-WHT) modules connected in the form of 66 parallel strings, and each string consists of 5 modules in series [40]. However, the PV array is energized by the sun irradiance in Watts per square meter (W/m²) and temperature in centigrades ($℃$).

The voltage output of thePV generator (273V) is boosted by a dc-to-dc converter using 5 kHz switching frequency to 500 V, which is treated as a DC-link. By using double-stage topology, the low voltage output of PV array is optimally amplified before injection towards the inverter, which increases the overall efficiency and makes system more economical [41]. Maximum power point tracking (MPPT) is used to control the duty cycle of the power electronic switch (SW). The adopted DC-to-DC boost circuit comprises two energy-storage devices, i.e., boost inductor (L_boost) and capacitor (C), which delivers energy alternatively. To eliminate the switching surges and harmonics in frequency, a pre-storage capacitor (C_pv) is used before the DC-to-DC circuit, and its value is calculated using fundamental parameters, as indicated below [42].

$${\mathrm{C}}_{\mathrm{PV}}=\frac{{\mathrm{DV}}_{\mathrm{PV}}}{4\Delta {\mathrm{V}}_{\mathrm{PV}}{\mathrm{f}}_{\mathrm{sw}}{}^2{\mathrm{L}}_{\mathrm{boost}}}$$

(4)

whereas,

D is duty cycle of-of boost-converter, VPV the is input voltage for the boost converter (273 V), ${\mathrm{f}}_{\mathrm{sw}}$ switches the frequency of the boost converter (5 KHz) and ${\mathrm{L}}_{\mathrm{boost}}$ is the boost inductance (5 mH). The boost-inductor value can be calculated as,

$${\mathrm{L}}_{\mathrm{boost}}=\frac{{\mathrm{V}}_{\mathrm{in}}.\left({\mathrm{V}}_{\mathrm{out}}-{\mathrm{V}}_{\mathrm{in}}\right)}{\Delta {\mathrm{I}}_{\mathrm{L}}.{\mathrm{f}}_{\mathrm{sw}}.{\mathrm{V}}_{\mathrm{out}}}$$

(5)

Here,

$$\Delta {\mathrm{I}}_{\mathrm{L}}={\mathrm{I}}_{\mathrm{out}}\frac{{\mathrm{V}}_{\mathrm{out}}}{{\mathrm{V}}_{\mathrm{in}}}$$

(6)

${\mathrm{V}}_{\mathrm{out}}$ is the output voltage boost converter (500 v).The duty cycle can be controlled by controlling the DC-link voltage, as depicted below:

$$\mathrm{D}=1-\frac{{\mathrm{V}}_{\mathrm{PV}}}{{\mathrm{V}}_{\mathrm{dc}\mathrm{Link}}}$$

(7)

To track MPPT, the variable for perturbation is the duty cycle (D) of the boost converter. The incremental conductance technique is used by the boost converter; such an algorithm automatically varies the duty cycle to achieve the maximum power point by keeping the DC-link voltage constant [43].

The output DC-link voltage, i.e., 500 V, is then inverted by three-phase three-level VSI to 260 V alternating output using 2 kHz switching frequency. The overall parameters of the proposed model are mentioned in the

Table A1. Model rated parameters.

Parameters	Values
PV array output Power	100.7 kW
PV array output voltage	273.5 V
Phases	3
Current (PV)	368 A
Frequency (system)	50 Hz
Frequency (Boost converter)	5 kHz
Vdc	500 V
Voltage (Grid)	20 KV
Filter (L-C-L)	250e-6 H, 22.4e-6 F, 150e-6 H
Sun-Irradiance	1000 (W/m2)
Temperature	25 °C
MPPT	Incremental conductance
Current (Grid)	2.94 A
Frequency (Inverter)	2 kHz

of Appendix A. A 3-phase VSI is proposed by adopting six power electronic switches in MATLAB/Simulink; moreover, the control is carried out in the rotating reference frame(dq) for the purpose of simplification [44].

The mentioned below matrix transformation is used to convert voltage and current from the natural to rotating (d-q) frame as:

$$\left[\begin{array}{c}{\mathrm{v}}_{\mathrm{d}}\\ {\mathrm{v}}_{\mathrm{q}}\end{array}\right]=\frac{2}{3}\left[\begin{array}{ccc}\cos \mathsf{\omega }\mathsf{\tau }& \cos \left(\mathsf{\omega }\mathsf{\tau }-\frac{2\mathsf{\pi }}{3}\right)& \cos \left(\mathsf{\omega }\mathsf{\tau }+\frac{2\mathsf{\pi }}{3}\right)\\ -\sin \mathsf{\omega }\mathsf{\tau }& -\sin \left(\mathsf{\omega }\mathsf{\tau }-\frac{2\mathsf{\pi }}{3}\right)& -\sin \left(\mathsf{\omega }\mathsf{\tau }+\frac{2\mathsf{\pi }}{3}\right)\\ 1/2& 1/2& 1/2\end{array}\right]\left[\begin{array}{c}{\mathrm{V}}_{\mathrm{a}}\\ {\mathrm{V}}_{\mathrm{b}}\\ {\mathrm{V}}_{\mathrm{c}}\end{array}\right]$$

(8)

$$\left[\begin{array}{c}{\mathrm{i}}_{\mathrm{d}}\\ {\mathrm{i}}_{\mathrm{q}}\end{array}\right]=\frac{2}{3}\left[\begin{array}{ccc}\cos \mathsf{\omega }\mathsf{\tau }& \cos \left(\mathsf{\omega }\mathsf{\tau }-\frac{2\mathsf{\pi }}{3}\right)& \cos \left(\mathsf{\omega }\mathsf{\tau }+\frac{2\mathsf{\pi }}{3}\right)\\ -\sin \mathsf{\omega }\mathsf{\tau }& -\sin \left(\mathsf{\omega }\mathsf{\tau }-\frac{2\mathsf{\pi }}{3}\right)& -\sin \left(\mathsf{\omega }\mathsf{\tau }+\frac{2\mathsf{\pi }}{3}\right)\\ 1/2& 1/2& 1/2\end{array}\right]\left[\begin{array}{c}{\mathrm{i}}_{\mathrm{a}}\\ {\mathrm{i}}_{\mathrm{b}}\\ {\mathrm{i}}_{\mathrm{c}}\end{array}\right]$$

(9)

Once the parameters are transformed to the dq reference frame, then they are compared with the nominal values. The resulted error is fed to the current controller to further minimize it tendencies towards zero. The converted voltage signals obtained from the current controller are then used to trigger a pulse for VSI using a pure sine wave. The most important part in a grid-tied PS is the inverter control, which comprises dual control loops, i.e., current control and voltage-control loops. For error compensation, FLC based on the GD algorithm is used in the control section of inverter. However, during unbalanced fault conditions, the grid-tied PS variables are optimized on both the grid side and PV array side by the designed LVRT circuitry, i.e., PRFCL. Both the proposed algorithm and LVRT circuitry are simulated for the faults at PCC.

2.1. Design of Controller and LVRT Scheme

Various types of control and LVRT strategies have been presented to ensure the stable and reliable response of a grid-tied PS due to various topologies of the inverter. The proposed controller and LVRT circuitry design are demonstrated below, along with their conventionally used alternatives in subsections.

2.1.1. Controller Design

The basic control structure with conventionally adopted PI controller and FLC based on the GD algorithm is illustrated below as:

(A)

Control structure with (PI) Controller.

The control structure of VSI with PI controller as error compensator of the variables in rotating synchronous frame (d-q frame) is depicted in Figure 2. The advantage of using natural variables in the d-q frame is its simple control and convenient measurement and analysis due to the nature of dc behavior [45]. It is a double-loop structure of control which gives compensated current references using the PI controller by the outer loop, i.e., the voltage loop. The internal current control loop is used for the regulation of orthogonal components of the current, i.e., real (Id) and Reactive (Iq). However, the reference reactive element is put to zero to maximize the real power consumption, i.e., the unity power factor. Similarly, the external voltage control loop is employed for the regulation of DC-link voltage.

(B)

Fuzzy Logic Controller (FLC) based on Gradient-descent (GD) optimization

Various optimization strategies have been developed to control grid-tied inverters feed by non-linear input of PV, with their own characteristics. This is because the control of non-linear and real-world problems are highly complex and have a fuzzy nature. The proposed FLC based on the GD algorithm is carried out under investigation for inverter control. The proposed algorithm is applicable without a specific mathematical model as it is always convergent in nature [46]. Moreover, continuous alterations of the center of membership function can effectively handle the unpredictable behavior of non-linear input [47].

(I)

Output Equivalence of Controller

The intended optimization on the bases of GD algorithm is appropriate to minimize the output error for both linear and nonlinear functions. For the set of different input states {$x_1 ,{\mathrm{x}}_2,\dots ,{\mathrm{x}}_{\mathrm{n}}$}, if suitable training data exist that match well the reference output (${\mathrm{y}}_{\mathrm{r}})$, then the FLC can be well tuned to obtain the minimum averaged square error at output [48]. The minimum error between the FLC based on GD algorithm and the desired reference value can be achieved by minimizing the following cost function.

$${\mathrm{E}}_{\mathrm{m}}=\frac{1}{2}{\left[{\mathrm{f}}_{\mathrm{m}}-{\mathrm{y}}_{\mathrm{r}}\right]}^2$$

(10)

The output membership function (MF) can be achieved by adopting “central of gravity” as a defuzzification technique:

$${\mathrm{f}}_{\mathrm{m}}=\frac{\left({{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathrm{b}}_{\mathrm{i}}{\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)\right)}{\left({{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)\right)}$$

(11)

Here, GMF ${\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)={\displaystyle \prod }_{j=1}^m\exp \left(-\frac{1}{2}{\left(\frac{{\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}}-{\mathrm{c}}_{\mathrm{j}}^{\mathrm{i}}}{{\mathsf{\sigma }}_{\mathrm{j}}^{\mathrm{i}}}\right)}^2\right)$ The above Equation (11) is upgrading the output MF of the GD algorithm corresponding to the MF of the output response. Instead of a generic triangular or bell function, the MF relies on the Gaussian membership function (GMF). The GMF reacts quicker for continuous functions, having two of updating factors, i.e., Center ${\mathrm{c}}_{\mathrm{i}}$ and Variance ${\mathsf{\sigma }}_j$.

(II)

Jacobian Computation

The gradient descent (GD) algorithm tends to minimize the output of the cost function (Equation (10)) with each iteration. In our case, the cost function is dependent upon the membership function i.e., ${\mathrm{f}}_{\mathrm{m}}$. Therefore, we have to consider the input/dependent parameters such as output $b_i$, Center ${\mathrm{c}}_{\mathrm{i}}$ and Variance ${\mathsf{\sigma }}_j$ of MF (Equation (11)) to be continuously differentiated after each iteration. The Jacobian of the output of MF is computed by partial differentiation of the cost function with respect to $b_i$.

$$\frac{\partial {\mathrm{E}}_{\mathrm{m}}}{\partial {\mathrm{b}}_{\mathrm{i}}}=\left({\mathrm{f}}_{\mathrm{m}}-{\mathrm{y}}_{\mathrm{r}}\right)\frac{\partial \mathsf{\epsilon }}{\partial {\mathrm{b}}_{\mathrm{i}}}$$

(12)

Now, substituting GMF values, we have,

$$\frac{\partial {\mathrm{E}}_{\mathrm{m}}}{\partial {\mathrm{b}}_{\mathrm{i}}}=\mathsf{\epsilon }\frac{\partial }{\partial {\mathrm{b}}_{\mathrm{i}}}\left[\frac{\left({{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathrm{b}}_{\mathrm{i}}{\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)\right)}{\left({{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)\right)}\right]$$

(13)

$$\frac{\partial {\mathrm{E}}_{\mathrm{m}}}{\partial {\mathrm{b}}_{\mathrm{i}}}=\mathsf{\epsilon }\frac{\partial }{\partial {\mathrm{b}}_{\mathrm{i}}}\left[\frac{\left({{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathrm{b}}_{\mathrm{i}}\prod \exp \left(-\frac{1}{2}{\left(\frac{{\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}}-{\mathrm{c}}_{\mathrm{j}}^{\mathrm{i}}}{{\mathsf{\sigma }}_{\mathrm{j}}^{\mathrm{i}}}\right)}^2\right)\right)}{\left({{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}\prod \exp \left(-\frac{1}{2}{\left(\frac{{\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}}-{\mathrm{c}}_{\mathrm{j}}^{\mathrm{i}}}{{\mathsf{\sigma }}_{\mathrm{j}}^{\mathrm{i}}}\right)}^2\right)\right)}\right]$$

(14)

Equation (14) above depicts the Jacobian of Gaussian output MF ${\mathrm{b}}_{\mathrm{i}}$. Similarly, the Jacobian for the remaining two parameters, i.e., center and variance, can be obtained as a partial differentiation of the cost function of w.r.t ${\mathrm{c}}_{\mathrm{I}}$ and ${\mathsf{\sigma }}_{\mathrm{i}}$, respectively.

(III)

Final Iterative Equations

As proposed, FLC based on the GD algorithm adopts the first order partial derivative to minimize the error, which is also realized through the error back propagation (EBP) algorithm. The final optimization solving iterative equations after the partial derivative of MF w.r.t above mentioned three parameters, i.e.,${\mathrm{b}}_{\mathrm{I}}$, $I$, and ${\mathrm{c}}_{\mathrm{i}}$, which are given below with their gradient matrices.

• Iteration of Gaussian Membership Function (GMF)

$${\mathrm{b}}_{\mathrm{i}}\left(\mathrm{k}\right)={\mathrm{b}}_{\mathrm{i}}\left(\mathrm{k}-1\right)-\mathsf{\lambda }{\left[{\mathrm{J}}_{{\mathrm{b}}_{\mathrm{i}}\mathrm{k}}{\mathrm{J}}_{{\mathrm{b}}_{\mathrm{i}}\mathrm{k}}^{\mathrm{T}}+\mathsf{\mu }\mathrm{I}\right]}^{-1}{\mathrm{J}}_{{\mathrm{b}}_{\mathrm{i}}\mathrm{k}}\mathsf{\epsilon }$$

(15)

Here, ${\mathrm{J}}_{{\mathrm{b}}_{\mathrm{i}}\mathrm{k}}=\left[\mathsf{\epsilon }\left[\frac{{\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)}{{{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)}\right]\right]$

• Iteration of Variance

Equation (16) is employed to estimate Variance ${\sigma }_i$ which is the GMF that iteratively learns itself. Variance is in reverse relation to the magnitude of GMF.

$${\mathsf{\sigma }}_{\mathrm{i}}\left(\mathrm{k}\right)={\mathsf{\sigma }}_{\mathrm{i}}\left(\mathrm{k}-1\right)-\mathsf{\lambda } {\left[{\mathrm{J}}_{{\mathsf{\sigma }}_{\mathrm{i}}\mathrm{k}}{\mathrm{J}}_{{\mathsf{\sigma }}_{\mathrm{i}}\mathrm{k}}^{\mathrm{T}}+\mathsf{\mu }\mathrm{I}\right]}^{-1}{\mathrm{J}}_{{\mathsf{\sigma }}_{\mathrm{i}}\mathrm{k}}\mathsf{\epsilon }$$

(16)

where,${\mathrm{J}}_{{\mathsf{\sigma }}_{\mathrm{i}}\mathrm{k}}=\left[\mathsf{\epsilon }\left[\frac{\left({{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathrm{b}}_{\mathrm{i}}\right)-{\mathrm{f}}_{\mathrm{m}}}{{{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)}\right]\left(\frac{{\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}}-{\mathrm{c}}_{\mathrm{j}}^{\mathrm{i}}\right)}^2}{{\left({\mathsf{\sigma }}_{\mathrm{j}}^{\mathrm{i}}\right)}^3}\right){\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)\right]$

• Iteration of Center

Equation (17) below iterates the center of GMF that accomplish various estimates corresponding to the crisp input to the controller.

$${\mathrm{c}}_{\mathrm{i}}\left(\mathrm{k}\right)={\mathrm{c}}_{\mathrm{i}}\left(\mathrm{k}-1\right)-\mathsf{\lambda }{\left[{\mathrm{J}}_{{\mathrm{c}}_{\mathrm{i}}\mathrm{k}}{\mathrm{J}}_{{\mathrm{c}}_{\mathrm{i}}\mathrm{k}}^{\mathrm{T}}+\mathsf{\mu }\mathrm{I}\right]}^{-1}$$

(17)

where ${\mathrm{J}}_{{\mathrm{c}}_{\mathrm{i}}\mathrm{k}}=\left[\mathsf{\epsilon }\left[\frac{\left({{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathrm{b}}_{\mathrm{i}}\right)-{\mathrm{f}}_{\mathrm{m}}}{{{\displaystyle \sum }}_{\mathrm{i}=1}^{\mathrm{R}}{\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)}\right]\left(\frac{\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}}-{\mathrm{c}}_{\mathrm{j}}^{\mathrm{i}}\right)}{{\left({\mathsf{\sigma }}_{\mathrm{j}}^{\mathrm{i}}\right)}^2}\right){\mathsf{\mu }}_{\mathrm{i}}\left({\mathrm{x}}_{\mathrm{j}}^{\mathrm{m}},\mathrm{k}\right)\right]$ The factors $\mathsf{\lambda }$ and $\mathsf{\mu }$ are the terms for step-size and normalization to make the stability and non-singularity of the new-iterated equation certain.

Additionally, the control scheme constants are mentioned in the

Table A2. Control scheme constants.

Control Method	Parameters	Vdc	Id	Iq
PI	$k_p$	7	0.3	0.3
	$k_i$	800	20	20
FLC base on GD	Firing input $:{\mathsf{\lambda }}_1$	2.1	2.1	2.1
	Firing input $:{\mathsf{\lambda }}_2$	−4.1	−4.1	−4.1

of the Appendix A.

2.1.2. Low-Voltage Ride through (LVRT) Strategies

To prevent the grid instability by delivering high level of solar-generated electrical energy to the moderate grids, different LVRT standards have been introduced to be followed by the grid and power generating operators [49]. According to the German grid requirements, the PV plant with a temporary voltage dip, i.e., from 0 to 150ms, must keep connected to the network. Similarly, we must ensure that the plant enhances its voltage output to 90% of the rated voltage within 1500ms. Therefore, in this article, a new electronic-based LVRT enhancement circuitry, i.e., PRFCL, is introduced to keep the PV output and grid variables under the limits of grid requirements. Moreover, the smooth response of variables with the proposed circuitry is verified by comparing them with the conventionally used crowbar circuit. The parameters of the conventional and proposed LVRT circuitries are mentioned on the

Table A3. LVRT circuits parameters.

LVRT Circuit	Parameters	Value/Type
Crowbar	$Resistance\left(R\right)$	1800 Ω
	$Switch type$	$DIAC$
PRFCL	$L_{sh}$	$4H$
	$R_{sh}$	$600 \Omega$
	$L_{dc}$	$1\mathrm{e}-3 H$
	$L_{dc}$	$0.001H$

of Appendix A.

(A)

Crow-bar strategy

The previously used conventional crowbar circuit to limit fault current is consists of two alternatively operating switches according to the state of system. One switch at a time is conducting, decided by the fault-detection algorithm, i.e., the without fault switch or the with fault switch. During normal conditions, the current follows the path by the conduction of “without fault” switch. Conversely, during a short circuit fault the “fault switch” conducts to divert the fault current to the path with ohmic resistance. Each path comprises dual-directional switches for full-cycle AC waveform flow (Figure 3).

(B)

Parallel-Resonance Type Fault Current Limiters (PRFCL) strategy

Previously, different types of LVRT topologies have been introduced for the optimization of the RER-fed network variables [50,51]. However, the impedance of these topologies is dominated by ohmic resistance; thus, they result in high active power lose and oscillations. The proposed PRFCL circuitry induces reactive impedance in contribution with a small value of ohmic resistance to suppress the surges.

The proposed PRFCL circuitry consists of two paths of operation, i.e., the resonance path and the bridge path, as depicted by Figure 4. These two paths conduct alternatively i.e., at normal conditions; the current follows the bridge path, and during fault conditions it diverts toward the resonance path.

• Bridge path: this path comprises four diodes (D₁ to D₄) making a bridge along with a controlled power electronic switch and small valued current limiting reactor (${\mathrm{L}}_{\mathrm{dc}}$) in parallel with a free-wheeling diode D_f.
• Resonance path: comprises an inductor (${\mathrm{L}}_{\mathrm{sh}}$) and capacitor (${\mathrm{C}}_{\mathrm{sh}}$) in parallel which operates with the resonance frequency of system; in addition, a resistor (${\mathrm{R}}_{\mathrm{se}}$) is employed in series with the capacitor.

During fault conditions, the high-amplitude oscillations due to resonance are suppressed by involving the resistance (${\mathrm{R}}_{\mathrm{sh}}$) in series with capacitor [50]. However, during normal conditions, the current limiting reactor (${\mathrm{L}}_{\mathrm{dc}}$) in bridge path can cause a voltage drop due to current ripples. However, the drop due to the limiting reactor is negligible compared with the operating voltage and its mathematical analysis is carried out in [51].

As per design considerations, the current limiting reactor in the bridge path is employed to restrict the abrupt change, i.e., $\raisebox{1ex}{$\mathrm{di}$}\!\left/ \!\raisebox{-1ex}{$\mathrm{dt}$}\right.$ in the fault current for safe operation of the power electronic switch. That is why its value can be used to keep the current rating of the switch under consideration. However, the resonance path impedance can be matched with the load impedance to obtain the values of its parameters. The total impedance can be obtained as:

$${\mathrm{Z}}_{\mathrm{tot}}=({\mathrm{R}}_{\mathrm{sh}}-\mathrm{j}/\mathrm{\omega }{\mathrm{C}}_{\mathrm{sh}})\text{‖}\mathrm{j}\mathrm{\omega }{\mathrm{L}}_{\mathrm{sh}}={\mathrm{L}}_{\mathrm{sh}}/{\mathrm{C}}_{\mathrm{sh}}{\mathrm{R}}_{\mathrm{sh}}+\mathrm{j}\mathrm{\omega }{\mathrm{L}}_{\mathrm{sh}}$$

(18)

The overall mathematical analysis can be studied by [50]. As there are different possible values of impedance for which system can resonate, however the one with low real part i.e., resistance can be selected to avoid the heat generation during fault time.

3. Results and Discussion

The output response of the electrical variables of 3-phase grid-tied PS by adopting the proposed optimization topology are investigated using three different types of tools in MATLAB/Simulink. These three methods of investigation are simulated results, THD analysis and performance evaluation of integral indices calculation. The electrical variables are keenly analyzed at both the PV-side and the grid-side under asymmetrically abnormal conditions at PC, i.e., phase-to-ground (P-G), and double-phase (P-P) faults. Additionally, the results of conventional counterparts (PI-controller and Crowbar) are also carried out for comparative assessment to verify the high-power quality response of the proposed topology.

3.1. Response of Asymmetrical Faults at Grid Side

The comparative study for the proposed topology is presented during normal and abnormal conditions with the conventional scheme. The asymmetrical faults in grid-tied PS are inserted for 0.15s, and the performance of the proposed optimization topology for fundamental system variables is analyzed.

The most basic and important parameter having direct influence over other variables of grid-tied PS is dc-link voltage, and its response is shown in Figure 5 below. During the single-phase fault, time domain specifications such as the minimum magnitude of overshoot, low settling time and peak time with the proposed topology, i.e., GD+PRFCL, is achieved at the start of the simulation, as well as at fault entering and clearing time. Even so, the verse behavior of the dc-link voltage with a PI controller under highly dynamic conditions such as phase-to-phase faults is optimized to acceptable limits with the proposed algorithm, as depicted by Figure 5b.

Moreover, three different types of error calculation indices have been calculated for all the possible combinations of controllers and LVRT circuitries. These indices, i.e., IAE, ISE and ITAE, digitally verify the performance evaluation of the presented combinations, as shown in

Table 1. Performance indices of intended control schemes for Vdc.

Control Strategies	Single Phase-Ground			Phase-Phase
	IAE	ISE	ITAE	IAE	ISE	ITAE
PI	0.01337	0.00335	0.001125	0.0926	0.03004	0.0214
PI+CrBr	0.01068	0.00323	0.00061	0.0170	0.00373	0.0017
GD	0.01036	0.00322	0.00056	0.0158	0.00356	0.0015
GD+CrBr	0.01111	0.00256	0.00105	0.0186	0.00343	0.0024
PI+PRFCL	0.00895	0.002477	0.000625	0.0152	0.00298	0.0017
GD+PRFCL	0.00869	0.002467	0.00055	0.0142	0.00286	0.0015

. The minimum values of the indices authenticate the high performance/efficiency of the proposed topology as compared with the other combinations.

The real (Id) and reactive (Iq) parts of the inverter current within the control structure are set to be one per unit and zero, respectively, in rotating synchronous or dc frame for simple control and measurements.

The impact of proposed GD+PRFCL and convention scheme PI+Crowbar over dq-frame current parts is investigated for the P-G and P-P unbalance conditions. The real (Id) current response is approximatly the same during normal time; however, during fault time and fault clearing time, the magnitude of spikes is minimized with the proposed topology. The output behaviour during single-phase fault and double-phase can be analyzed by Figure 6a,b and Figure 6c,d, respectively. It is worth considering the reactive part of the current (Iq) stablized with with low-magnigute oscillations at the start of the simulation run with the proposed metodololy. Morover, during fault time and fault transition times, the disturnace and transients are minimized to a high extent compared with the other combinations of the schemes. Figure 6e,f clearly depicts the efficient response of the reactive (Id) current during both single and double-phase fault with the use of the proposed topology. In the single-phase fault, i.e., Figure 6e, the analysis is difficult due to low severity. However, the double-phase fault, i.e., Figure 6f, clearly justifies the smooth and optimal response of Iq by employing gradient–descent optimization and PRFCL circuitry instead of for the PI controller and crowbar.

Grid power quality has been improved to the rated 100 kW with the proposed topology. The drop in power during the double-phase fault with conventional PI controller is severe, amounting to approximately 25%, and with high transitional spikes; however, this loss of power is restricted to 13% with the proposed GD algorithm as in Figure 7b. However, by incorporating PRFCL, the power improved to the nominal value and with minimum surges during fault starting and eliminating time, compared with the other possible solutions. Considering the single-phase fault, the loss of power is not prominent, which is approximately 5% without LVRT circuitry; this is improved effectively with both LVRT circuitries. However, the surges caused by switching fault condition are minimized and give ripple-free responses with the proposed GD+PRFCL topology, which is zoomed out for clarification, as depicted in Figure 7a below.

The high fault current and possible voltage sag during steady state are the same for both PI and proposed GD optimization; however, the proposed optimization gives a better response during the change in state for double-phase faults. However, by involving LVRT schemes, the proposed algorithm responds prominently to the visualization of its efficient response. The overall fault current is limited near to the rated value with LVRT circuitries, and the dipped voltage has been regained to the rated value with 10% tolerance that is acceptable by all grid codes to be remained connected to the utility grid [33]. As in Figure 8, the proposed PRFCL in coordination with GD gives harmonic free and smooth responses for both voltage and current due to the reactive components of resonant part and small inductance in the bridge part of PRFCL. To clarify, the better response of the proposed topology THD analysis for voltage and current signals is carried out.

Due to the non-prominent response of fault current and voltage response for the proposed topology an additional fast-Fourier transform (FFT) analysis has been carried out to investigate the total-harmonic distortions (THD). This analysis authenticates the harmonic free behavior of voltage and current in deep for both controller to controller and LVRT to LVRT circuitry comparison. The robust and high tolerated response of the proposed control scheme (GD) and LVRT circuitry (PRFCL) is verified by the low-harmonic distortions in percentage, as shown in Figure 9, Figure 10, Figure 11 and Figure 12. In case of only controller response towards harmonic distortion in Figure 9 and Figure 10, the proposed GD optimization gives 8.44% and 343.45% distortions during fault time for current and voltage, respectively. On the other hand, conventional PI controller responds with high distortion comparatively, which is 11.28% for current and 350.53% for voltage.

Similarly, the THD case involving LVRT circuitries with their respective control schemes is analyzed by Figure 11 and Figure 12. In Figure 11, the THD of the conventional hybrid system, i.e., PI+CrBr, results in 20.96% and 14.93% for current and voltage sinusoidal signals, respectively. However, the proposed topology with the GD algorithm and PRFCL circuits gives 17.79% for current and 8.21% of harmonic distortions as depicted by Figure 12. The overall THD analysis for both grid voltage and current authenticates the efficient performance of proposed topology in terms of harmonic distortions.

The allowable limit to rate of change in frequency for PV power integration according to German grid requirement is 49.5–50.5 Hz for a rated system frequency of 50 Hz [52]. All the possible schemes followed the grid requirements during both cases of asymmetrical fault; however, the oscillations tend towards the critical limit with the use of crowbar circuit shown by Figure 13. The proposed topology restricts the frequency to vary within the safe limit of 49.9–50.1 Hz in both types of abnormalities.

3.2. Response of Asymmetrical Fault at PV Side

The impact of the proposed association of GD and PRFCL on the PV array output variables are shown in Figure 14 below. The high transients at fault occurring times are significantly decreased compared with other possible co-ordinations for PV array voltage and current. Similarly, the PV power also gives an efficient response for voltage and currents because it follows the power law, i.e., the product of voltage and current. Moreover, the fast nominal tracking for all the variables can be verified with proposed topology during the start of the simulation.

In addition, the response of proposed topology is also analyzed for 50% increase in PV power and load at a time. In this case, there is no significant variations in the response of variables as compared to the previous load and PV ratings. However, only the magnitude of the PV current and power increased by 50%; the voltage remains constant because the increased PV arrays are connected in parallel. The proposed topology authenticates the fast and optimized response for different power capacities and is depicted clearly by Figure 15 below.

4. Conclusions

This article successfully designed and improved the LVRT capability of two-stage grid-tied PS according to the German grid codes for asymmetrical faults at PCC. A new topology comprised of FLC based on the GD algorithm in association with PRFCL (GD+PRFCL) for grid-tied PS is effectively implemented and compared with the well-tuned PI controller and crowbar circuitry. The low harmonic distortion, fast recovery, minimum settling time, and robust and smooth response are accomplished by the proposed topology at the grid and PV side of the system. Additionally, THD analysis and performance indices calculation authenticates the smooth and low error, respectively, for the proposed topology at fault time. Moreover, it is observed that optimization of other variables of the grid-tied PS is mostly dependent on optimizing DC-link voltage.

In near future, advanced control schemes such as the feedback linearization technique, adaptive SMC, fuzzy neural network, and electronic-based LVRT schemes will be implemented. In addition, the switching efficiency of Gallium Arsenide (GaN) material-made switches will be used as an alternative to MOSFET and IGBT. Additionally, the simulation response of the proposed topology will be verified by using DSPACE or TMS320F28335 DSP boards with real-time hardware testing.