1. Introduction
The memristor, the new fourth basic circuit element, was mathematically proposed by L. O. Chua in 1971 [
1] and experimentally demonstrated by the HP lab in 2009 [
2]. Since then, memristors have been crucially used to demonstrate neuromorphic computing systems, which were conceptually proposed in 1990 by C. Mead [
3]. The nonlinear charge–flux relationship of the memristor, which can be used to simulate the behavior of human synapses [
4,
5], makes it a promising candidate for neuromorphic systems. Furthermore, the conductance of memristors could be modified and saved by applying programming pulse [
4,
6], which is the key characteristic of memristors for supporting neuromorphic system implementation.
Interestingly, memristors can be formed as a crossbar array, which is a fully connected mesh of crossing wires [
7,
8,
9]. Two crossing wires in the crossbar are connected by a memristor acting as a switch [
7,
9]. Memristor crossbars have opened opportunities to implement artificial neural networks on chips where the synaptic weights of network are stored in crossbar array [
10,
11,
12,
13]. These potential applications, however, require huge computational tasks and training processes. Recently, other approaches have been proposed where memristor arrays were used for neuromorphic pattern recognition, including speech recognition and image recognition [
14,
15]. The complementary architecture, in which one memristor crossbar is the inversion of the other, is used for the application of speech recognition [
14]. It is based on a logical Exclusive-NOR (XNOR) operation, which measures the similarity of two binary arrays [
14]. The twin crossbar architecture employing two identical crossbar arrays has been proven capable of measuring the similarity between an input pattern and the stored patterns as well [
15]. The twin crossbar architecture consumes less power than the complementary crossbar architecture for the application of image recognition. In complementary crossbar architecture, the number of ‘1′ bits is always equal to the number of ‘0′ bits, irrespective of the sparsity density of images stored in the crossbars, because the two crossbars are complementary to each other. By contrast, the number of ‘1′ bits in the twin crossbar architecture is dependent on the data density of the images. For this reason, the twin crossbar architecture consumes less power than the complementary crossbar architecture if and only if the images stored in the crossbar array have the number of ‘1′ bits less than the number of ‘0′ bits, for instance, in DCT compressed images [
15]. An up-to-date architecture, the single crossbar architecture, obtained by simplifying the Exclusive-NOR operation, needs only one memristor array for implementing the Exclusive-NOR function in pattern recognition tasks [
16]. The complementary and twin crossbar architectures accept unipolar inputs, but the single crossbar array accepts bipolar inputs instead. In term of power consumption and area occupation, each type of crossbar architecture has significant advantage as they are applied to the specific application. In particular, the power consumption can be saved in the twin crossbar architecture with DCT compressed images, in which the number of ‘1′ bits is much less than the number of ‘0′ bits [
15]. To save area, we can consider the single crossbar architecture, but the unipolar to bipolar circuit must be used in this case [
16].
All the above crossbar architectures require memristors to operate at a desired memristance value, which is either low resistance state (LRS) or high resistance state (HRS). However, the memristance value varies from device to device due to manufacturing variation or being programmed into an undesired state [
17,
18,
19,
20,
21]. Memristance variation is one of the factors that degrade the performance of the memristor crossbar circuit [
17,
18,
19]. All of the above crossbar architectures have been tested with clean images. However, the recognition rate of these crossbar architectures may be reduced with noisy images. In this work, we performed a comparative study on the Gaussian noise and memristance variation tolerance of the complementary crossbar architecture, the twin crossbar architecture, and the single crossbar architecture. Based on the results, we determined that the single crossbar architecture produced the best recognition rate among the three architectures for image recognition under the effect of Gaussian noise and memristance variation. We also performed an experiment on the single crossbar architecture with fabricated
memristor crossbar based on carbon fiber and aluminum film for storing and recognizing three simple patterns.
3. Simulations and Results
In this work, we first performed a comparative study on noise tolerance of the different crossbar architectures, namely the complementary crossbar, the twin crossbar, and the single crossbar. The 10 grayscale images shown in
Figure 4 were utilized for testing. The testing images had the size of
.
Each image was first converted from the size of
pixels to a vector with the size of
pixels. Each pixel was then digitized by 4 bits [
14,
15]. Each 4 bit pixel
of one image was stored to four cross-points in four columns that had the weights of 8, 4, 2, and 1 for output calculating. All 10 images were stored to 10 groups with four columns each in the arrays (
,
as patterns for recognizing an input vector. The block diagrams of the crossbar architectures for recognizing images are shown in
Figure 5.
For being recognized, each input image was converted to the vector
with the size of
pixels. Each pixel in the vector
was then digitized by 4 bits. In the complementary crossbar architecture, the input vector
was applied to the
array and
was applied to the
array to perform the XNOR function as shown in Equation (3). In the twin crossbar architecture, the input vector
was fed to the
array and
was fed to another
array for the XNOR function as in Equation (5). In the single crossbar architecture, the input vector
was bipolarized by the unipolar to bipolar convertor before applying to one
array for XNOR function as discussed in Equation (8). Here, each bit, the 4 bit
of a pixel was multiplied by weights of 1, 2, 4, and 8 before going to the summation block. The
output,
, contained the amount of the similarity between the input vector
and the
stored pattern. The winner-takes-all circuit was used to finally choose the maximum
, which showed that the input vector
matched the
prestored pattern, i.e.,
prestored image [
14,
15,
16].
In this study, the three crossbar architectures were tested with input images that had Gaussian noise added.
Figure 6 shows the input images after adding Gaussian noise with the signal-to-noise ratio (SNR) of −10 dB.
The Gaussian noise was added to the input images with the SNR varied from −10 to 4 dB. The original images were stored in the crossbar array, as conceptually explained above. The images with noise added were then digitized by 4 bits and applied to the complementary crossbar array, the twin crossbar array, and the single crossbar array for recognition.
Figure 7a shows the comparison of recognition rates among the three crossbar architectures where the SNR was varied form −10 to 4 dB.
As shown in
Figure 7a, the recognition rate of the complementary architecture declined dramatically when the SNR was −10 dB. However, the twin architecture and the single crossbar with bipolar input maintained a recognition rate as high as 89%. In complementary architecture, the column currents are the sum of the column current in the
crossbar and the column current in the
crossbar, as shown in Equation (3). Therefore, the variation of column currents caused by the input noise is increased. In contrast, the twin architecture uses the subtraction in Equation (5), so the current variation caused by the input noise can be compensated. The single crossbar is formulated from the twin architecture, as indicated in Equation (7), so the noise can be slightly compensated at the unipolar to bipolar module. As a result, the single crossbar with bipolar input shows slightly better recognition rate when compared to the twin architecture and complementary architecture. When the SNR was −10 dB, the recognition rate of the complementary architecture, the twin architecture, and the single crossbar with bipolar input were 4%, 89%, and 91%, respectively.
Memristance variation is one of the problems that degrade the performance of memristor crossbar-based applications [
17,
18,
19,
20,
21]. In this work, we also compared the performance of the complementary architecture, the twin architecture, and the single crossbar with bipolar input with respect to the variation of memristance. In this simulation, the percentage of memristance variation was varied from 0% to 40%.
Figure 7b compares the recognition rates of the complementary architecture, the twin architecture, and the single crossbar with bipolar input when the percentage of variation in memristance was increased from 0% to 40%. In the simulation, Gauss distribution was used for memristance variation, as shown in
Figure 7c,d. LRS and HRS were assumed to be 10 and 1 MΩ, respectively. As shown in
Figure 7c, for LRS, the percentage of variation was 40%, meaning the memristance value varied from (μ − σ) to 14 (μ + σ) kΩ with the probability of 68%. As shown in
Figure 7d, for HRS, the percentage of variation was 40%, meaning the memristance value varied from 600 to 1400 kΩ with the probability of 68%.
The twin architecture employs two identical crossbar arrays and is associated with the subtraction in Equation (5), so it can partly compensate the variation of column current caused by the variation in memristance. This explains why twin crossbar showed better recognition rate with variation in memristance as high as 40% when compared to the complementary architecture. The single crossbar with bipolar input had a recognition rate of 67.8%, which was better than the complementary architecture and twin architecture with recognition rates of 58% and 66%, respectively. When the percentage of variation increased higher than 40%, all crossbar architectures would produce very low recognition rate, as implied from
Figure 7b. In addition, the column-line currents strongly depend on inputs with LRS memristors rather than HRS memristors; therefore, the variation of LRS memristors degrades the recognition rate more seriously than the variation of HRS memristors.
The statistical simulations showed that the single crossbar array with bipolar input was better than the complementary architecture and the twin architecture for image recognition with input noisy images and variation in memristance. In particularly, for the input noisy images with SNR of −10 dB, the single crossbar showed higher recognition rate by 87% and 2% compared to the complementary architecture and the twin architecture, respectively. Furthermore, the recognition rate of the single crossbar was 9.8% and 1.8% higher than those of the complementary architecture and the twin architecture when the percentage of variation in memristance was as high as 40%.
The simulation results showed that the single crossbar array well tolerated input noise and memristance variation, in addition to saving area and power consumption. In the last part of this work, we carried out an experiment to study the performance of the single crossbar array for pattern recognition. The performance of the single crossbar array was tested on a fabricated
memristor crossbar in which each crossing point was formed by a single memristor made of carbon fiber and aluminum film, as shown in
Figure 8a [
22]. The carbon fiber was placed on top of the thermally evaporated aluminum film as in a stripe pattern. The fabrication process was as follows. First, aluminum (Al) wire with 100 nm thickness was evaporated on a glass substrate with a 1 mm thickness. Then, a carbon fiber with 5–10 µm diameter was placed on the patterned aluminum film. The carbon fiber and aluminum film acted as the top and bottom electrodes, respectively [
23].
Figure 8b shows the switching behavior of the fabricated memristor, where the applied voltage was swept from −2.5 to 2.5 V and vice versa. For the positive sweep, SET-to-RESET switching was found around 1.7 V, as shown in
Figure 8b. For the negative sweep, RESET-to-SET switching was observed around −1.8 V.
Figure 8c presents the measured memristance of the fabricated 3 × 3 memristor crossbar. The crossbar with measured memristance was used to store three patterns of [LHH], [HHL], and [HLH], as represented in
Figure 8d.
Figure 8e shows the conceptual diagram of the single crossbar for recognizing three patterns. The input was bipolar and was generated from the raw input and its inversion, as indicated in Equation (7). Here, the column lines
,
, and
represent the similarities between the input pattern and the patterns stored in the first, second, and third columns, respectively.
To experimentally demonstrate the capability of the single crossbar array for pattern recognition, we applied the bipolar vectors obtained from patterns 1, 2, and 3 to the crossbar and measured the column currents of
,
, and
, respectively.
Figure 9 shows the measured currents of the three columns when applying the bipolar input vectors of [HLL], [LLH], and [HLH].
When the bipolar vector of the [HLL] pattern was applied to the crossbar, the column current
was as high as 1.9 mA, whereas the column
and
produced negative column currents. The obtained column current, in which
was the maximum current, indicated that the first column was the best match to the input pattern. Similarly, when we applied the bipolar vector corresponding to the pattern of [HHL], the column current
was as high as 3.4 mA against the negative current of
, and
, as shown in
Figure 9. Moreover, the column
had the largest current when the bipolar vector of the pattern [HLH] was applied to the crossbar. The measurement results shown in
Figure 9 experimentally demonstrate that the single crossbar performed the task of pattern recognition well based on the operation of the XNOR as presented in Equation (7).