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Article

Characterization of Multilayer Coupling Based on Square Complementary Split Ring Resonator for Multiport Device Implementation

by
Eduardo Jarauta
1,
Juan Carlos Iriarte
1,2 and
Francisco Falcone
1,2,3,*
1
Electrical Engineering and Communications Department, Universidad Pública de Navarra, Campus Arrosadía, E-31006 Pamplona, Spain
2
Institute of Smart Cities, Universidad Pública de Navarra, Campus Arrosadía, E-31006 Pamplona, Spain
3
Tecnologico de Monterrey, School of Engineering and Sciences, Monterrey 64849, Mexico
*
Author to whom correspondence should be addressed.
Micromachines 2023, 14(1), 68; https://doi.org/10.3390/mi14010068
Submission received: 28 November 2022 / Revised: 17 December 2022 / Accepted: 22 December 2022 / Published: 27 December 2022
(This article belongs to the Special Issue Micro and Smart Devices and Systems, 2nd Edition)

Abstract

:
The advent of context-aware environments and related applications demands a high degree of connectivity, with new spectral bands and related radio resource management functionalities in the current 5G bands and foreseen in future 6G wireless communication systems. This, in turn, poses new challenges in the implementation of wireless transceivers and radiating systems, in terms of device integration, miniaturization and element isolation, among others. High-performance miniature devices are presented and studied in this work, aided by metamaterial-inspired complementary resonators. A single particle is used to build a single layer, double layer, double frequency resonators and power dividers. A complete characterization of each equivalent circuit is also analyzed, showing great agreement between analytical circuit models and full-wave electromagnetic simulations. By adding more particles, different diplexers and triplexers in the multi-layer configuration are proposed. The flexibility in the design is the key advantage, as all devices are easily tunable and the output lines can be built in different layers, enabling frequency scalability from RF to millimeter wave ranges. Nevertheless, they are only a sample of all possible combinations of devices that can be designed for integration in future wireless communication systems.

1. Introduction

The advances foreseen in the implementation of context-aware environments given by the Internet of Things (IoT) in multiple applications and domains within smart cities and smart regions are by great means supported by wireless communication systems. In this sense, there has been a sustained effort in the implementation of different solutions within the paradigm of heterogeneous wireless networks in order to provide adequate coverage/capacity relations whilst complying with increasing demands in terms of energy consumption reduction and optimization, decrease in size and form factor and more robust response in increasing interference environments, among others [1,2,3,4]. This has catalyzed the development of multiple devices integrated within wireless transceivers as well as in radiating systems. In this sense, metamaterials have been explored for multiple facets of device/system optimization, spanning from device miniaturization, isolation improvement or the proposal of novel radiating solutions, among others [5,6,7,8,9].
In this context, coupling in multilayer microstrip devices was studied deeply during the last century [10]. Many techniques were developed to build all kinds of multi-layer microstrip devices [11]. The singular interest of this study is the design of multilayer microstrip couplers [12,13]. Analysis of slot apertures in multilayer microstrip structures was also deeply studied [14]. The design by coupling through a slot was widely developed and analytically studied [15,16,17]. This knowledge was used in the design of directional couplers in the double substrate layers [18]. The result is directional couplers with similar characteristics to single-layer couplers. The coupling frequency can be also tuned by modifying slot dimensions. A theoretical extension for multilayer structures was also studied, with a practical implementation in a two-layers directional coupler [19]. Other configurations have been used to design multilayer couplers and power dividers in microstrip [20,21], or other approaches [22].
In this paper, slot coupling will be explored by employing Complementary Split Rings Resonators (CSRRs) in order to implement multiple planar technology devices. The key outcomes which are followed in this paper are two. The first one is to reduce the fingerprint with the miniaturization of devices, owing to the inherent subwavelength operation of CSRR elements. The second one, in addition to miniaturization, is the use of multilayer structures which provide flexibility in the design and subsequent integration of the proposed devices, reducing surface footprint as well as enabling multilevel connector settings. CSRRs were presented in 2004 [22], for the first time, as an evolution of Split Ring Resonator (SRR) particles [23] in which axial E-field excitation (e.g., microstrip transmission lines, substrate integrated waveguides, etc.) is adequate when contained in the normal plane [24]. Its properties include its small size and good resonance in its quasi-static resonant frequency. The different types of devices that are presented in this work are outlined in Table 1 and will be described in the different sections.

2. Complementary Split Ring Resonator

The CSRR’s have been intensively used for all kinds of devices, from filters [25,26,27,28] to couplers [29], and, in recent years, there has been growing interest in using them for sensors [30,31]. Its equivalent circuit, namely SRR’s, was characterized in [32] for the first time. This approach was enhanced in different configurations [33,34] and for different applications [35]. In this letter, a Square Complementary Split Ring Resonator (SCSRR) is used. In this article, the usage of a complementary resonator is considered more convenient than a metallic resonator SRR for two reasons. The excitation of the rings, in the case of the serial SSRR, is much better when it is excited by its electric field. The second motivation is that it also obtained better coupling between the resonator and the output lines on different layers, as we will demonstrate. In Figure 1a, the layout of a microstrip line with an SCSRR etched in the ground plane is displayed. To establish the dimensions of our device, we first set the resonance frequency. From the equations provided in [32], it is understood that the radius of the conventional SRR is resonant at that frequency. In this case, it has been adapted by equating the perimeter of our square resonator with the length of the circumference of the already calculated SRR. The dimensions for the Square Complementary Split Ring Resonator, displayed in Figure 1b, used in the first part of this paper are the following: length of the square side l = 5 mm. The thickness of the rings c = 0.2 mm. Distance between rings d = 0.2 mm. Finally, the microstrip line width w = 2.4 mm, which is the needed value to adapt the line to 50 Ω.
The equivalent circuit for the SCSRR contains the same components used to model the CSRR [32]. The inductance LSCSRR and capacitance CSCSRR are calculated by considering the perimeter of the square, the width of the SCSRR (c) and the separation between rings (d), and by applying the same electromagnetic calculations provided in [32]. The microstrip line is characterized by its T-model [36], with its lumped components LT and CT, where LT and CT are the per-section inductance and capacitance of the microstrip line. The circuit is painted in Figure 1c.
The circuit has been simulated using the commercial substrate RT Duroid 5880 with εr = 2.2 and substrate thickness h = 0.79 mm. This substrate will be used for all the devices throughout this paper. For a microstrip line with the dimensions detailed in the previous paragraph, the values of the elements of the equivalent circuit are LT = 1.16 nH, CT = 0.296 pF, CSCSRR = 0.38 pF and LSCSRR = 1.69 nH. The electromagnetic simulations in this paper were made with commercial software CST Microwave StudioTM, using both methods transient solver and frequency domain solver in order to validate the results. Simulation results and simulation of the equivalent circuit model are displayed in Figure 1d.
A good agreement between full wave simulation and the equivalent circuit model is displayed in the results. In both cases, the resonant frequency obtained at f0 = 4.71 GHz validates the approach of the square resonators that will be used in the paper. It is important to note that this resonator is tunable by modifying resonator dimensions as per the equations in [32].

3. Resonators

In this section, different topologies of resonators using the Square Split Ring Resonator (SSRR), or its complementary (SCSRR), will be analyzed and characterized with their equivalent circuit. The previous studies [32] and [34], will serve as a starting point in the analysis of the equivalent circuits presented in this paper.
A serial configuration of SRR in a single-layer microstrip line was presented [37]. This serial configuration is of particular interest because the SRR is excited by the electric field parallel to the resonator. This is due to the bi-anisotropy property of a single SRR, as it was described in [38]. As a consequence, one of the main features is that a high Q is obtained as the resonance occurs in the sub-lambda frequency of the ring, with low insertion losses.
The first device proposed in this article is a variant of the above-mentioned particle. The SRR used in the original paper will be replaced with a Square Complementary Split Ring Resonator (SCSRR) in the same serial configuration. The microstrip input line will be cut-off just above SCSRR. The output microstrip line is placed on the opposite side of the SCSRR, as shown in Figure 2a.
A relevant parameter in the design of the circuit is the distance between the geometric center of the SCSRR and the beginning of the input microstrip line (p1) and output microstrip line (p2). The values are represented in Figure 2b. The open microstrip line builds an open stub in both the input and output lines to make the lines adapted.
In this configuration, the SCSRR is excited in its quasi-static frequency by the axial electric field of a 50 Ω microstrip line. The signal is coupled again from the SCSRR to the output 50 Ω microstrip line. Figure 3a plots the vector E-field representation in a front view of the previous device. On the left side, the typical microstrip E-field distribution is appreciated. At the end of the microstrip line (a red line labeled as the metallization layer), a strong normal E-field is achieved on the ground plane. The main concentration of the E-field is observed in the region where SCSRR is etched on the ground plane. Finally, on the right side, it can be observed how the E-field is coupled with the output line again. In Figure 3b, the absolute values of the E-field are painted, which confirms all that was explained above, as the highest values were re-obtained in the regions between the SCSRR and the end of the microstrip lines.
The resonator in this device is characterized by its main LC components [32]. The energy coupled from the input line to the SCSRR is modeled as a capacitor, Cin, and it is calculated as a parallel plate between both metallization layers, microstrip feed line and metallization where SCSRR is placed. The width would be in this case the width of the line (w). The end of the input line as a single open stub, Lin [36], the output line, is characterized again with a capacitor, coupling from the resonator to the output, Cout and again an inductor represents the open stub, Lout, in the output microstrip line. The complete circuit is displayed in Figure 4a.
Using the aforementioned substrate and with the dimensions of the ring resonator defined previously, the values of the components are Lin = 1.16 nH. Cin = 0.296 pF, CSCSRR = 0.81 pF, LSCSRR = 0.87 nH. Cout = 0.296 pF and Lout = 1.16 nH. In Figure 4b, the simulation results are compared with the equivalent circuit model presented. Great resonance is achieved with a value of S21 = −0.92 dB at the resonant frequency f0 = 5.015 GHz.
Taking advantage of the excitation properties of both SSRR and SCSSR a novel device is presented in this paper. It is made in the combination of a square SSR micro-resonator already presented in [37] and the SCSRR resonator just presented above. Both resonators share input and output microstrip lines as it is represented in overlapped layers layout of Figure 5a. The main advantage of this device is that it obtained a tunable double-frequency resonator [32] and a really small single particle size. Only one design requirement is needed, namely the SSRR length side must be smaller than the SCSRR one. The equivalent circuit for this device is straightforward. It is characterized by a parallel design of the equivalent circuit model of the SRR micro-resonator [37] and the circuit presented for the SCSRR resonator validated in Figure 4. The equivalent circuit for the double-frequency resonator is drawn in Figure 5b.
The Square Split Ring Resonator on the top layer has a side length l1 = 3.4 mm, width of the rings c1 = 0.2 mm, separation between rings d1 = 0.1 mm and distance between microstrip input and output lines s1 = 0.1 mm. The SCSRR has a side length l2 = 5 mm, width of the rings c2 = 0.2 mm, and separation between rings d2 = 0.1 mm, considering the substrate, as in the previous case. The values for the equivalent circuit, considering the dimensions of the rings, and substrate described above are, firstly, the upper part which represents the Square Split Ring Resonator (SSRR): Cs = 0.091 pF, Cp = 0.0093 pF, Cgnd = 0.006 pF, LSSRR = 7.1 nH, and CSSRR = 0.062 pF. The lower part represents the SCSRR: Lin = 1.1 nH, Cin = 0.24 pF. CSCSRR = 1.12 pF and LSCSRR = 1 nH. Cout = 0.24 pF, and Lout = 1.1 nH. Simulation and equivalent circuit response are displayed in Figure 5c.
The agreement between the simulation and the equivalent circuit demonstrates the validity of the analysis proposed. A moderate deviation in the zero frequency is observed that can be caused by surface wave excitation or coupling derived from the presence of elements such as the corners of square resonators, which are not feasible to include in the model. Two resonances are achieved, the first one at f0 = 4.24 GHz, corresponding to the CSRR resonance. The second one at f1 = 5.51 GHz is the resonant frequency of the SSRR. The results show a high performance for both resonances. It also makes this particle a promising alternative in the design process for multiple applications. In a single particle, we observe both resonances, which improve the response of previous solutions [39]. It also reduces the effective area used to print the device.
In the next figure, the surface current distribution in the top metallization layer, and bottom metallization layer, in both resonant frequencies, are depicted. In Figure 6a,b, it can be seen that in the first resonant frequency f0 = 4.24 GHz, only the SCSRR is excited, while SSRR is almost transparent. In the second resonant frequency f1 = 5.51 GHz, most of the surface currents are cumulated around the SSRR while SCSRR has no influence on it.
A new device, based on a two microstrip layers composite, is proposed in this study. It is based on the SCSRR serial resonator presented in the previous chapter. In this case, the upper metallization layer contains a 50 Ω source line. The next metallization layer is the ground plane, which is shared by both microstrip lines. In this metallization layer, an SCSRR is etched. Finally, in the bottom layer, a new 50 Ω line is placed, acting as the output port. The overlapped layout is displayed in Figure 7. The design is made by assembling two microstrip plates. Both use the same dielectric substrate defined in Section 2. One of the plates has copper metallization on both sides. In one of them, the input line is grabbed. In the second metallization layer, which represents the ground plane, the SCSRR was etched. The second substrate plate has copper metallization only on one edge. In this metallization, the output microstrip line was drawn. It is represented as a lower metallization layer. The schematic front view with the layer distribution is depicted in Figure 7b.
For this device, the proposed equivalent circuit is depicted in Figure 8a. An input microstrip line is coupled to the SCSRR and from there, the currents are also coupled to the output line. Two inductances Lin and Lout represent the stubs made by the opened microstrip lines. Lin = 1.16 nH. Cin = 0.296 pF. CSCSRR = 0.81 pF and LSCSRR = 0.87 nH. Cout = 0.296 pF and Lout = 1.16 nH. The simulation results as well as the calculation of the equivalent circuit are plotted in Figure 8b. This resonator obtains a peak in the magnitude of the S21 value of −0.83 dB at its resonant frequency f0 = 5 GHz. This result is comparable to other multilayer resonators [40,41] with the advantage of low insertion loss, small size, and flexibility.
Good agreement is again achieved between the simulation and equivalent circuit at the working frequencies of the resonator. There is a small deviation in lower frequencies and also in higher frequencies that could be caused by surface wave coupling or higher modes that were not considered. It is important to highlight that insertion losses are also comparable to the previously presented device in which output lines are placed in the same layer, which provides additional flexibility.
The last resonator presented in this section is also a variant of the previous devices. The layout is shown in the next picture. The main difference in this device’s design is that the output is placed perpendicular to the input microstrip (in the bottom layer again). The overlapped top layout is shown in Figure 9a.
As demonstrated in [24], most surface currents are accumulated in gaps between rings in the CSRR. In Figure 9b,c, the surface current distribution at the resonant frequency is displayed. The beginning of the output line to Port 2 is selected just below the gap placed in the internal ring. In this device, the dimensions of the SCSRR are the same as in previous devices. The main difference is the values for adapting parameters p1 = 0.7 mm and p2 = 1.3 mm.
In this case, the components of the equivalent circuit are the same as the ones defined for the SCSSR resonator (Figure 4a). In this case, the input inductance Lin has a value of 1.16 nH. The capacitor coupled to the ground plane Cin has a value of 0.296 pF. The values for CSCSRR = 0.81 pF and the LSCSRR = 0.87 nH. Finally, the coupling from the resonator to the output line is characterized by Cout = 0.137 pF. The stub in the output line is characterized by inductance Lout = 1.16 nH. Figure 10 displays the simulation and equivalent circuit results of the previous device. Insertion loss at resonant frequency f0 = 4.74 GHz. has a value S21 = 0.71 dB. A similar deviation is observed at lower frequencies, owing to the effects previously stated. By comparing these results with the ones obtained for devices in Figure 4b and Figure 8b, comparable performance is achieved, giving additional flexibility in the design of new devices.
To summarize, the results in this chapter (see Table 2) collect key figures for the presented devices compared with previous studies on multi-layer microstrip resonators.
The results in the table summarize the benefits of this design. For a similar size, lower insertion losses are obtained in an effectively smaller area.

4. Power Dividers

SRRs have already been used in the design of power dividers. In the last years, some implementations based on Substrate Integrated Waveguide (SIW) [42,43] have been proposed. The balun power divider [44], the planar technology of the Bailey power divider [45] and the Wilkinson power dividers [46] have been implemented using SRR or CSRR as the resonant element. In this work, a comparison with different implementations of multilayer power dividers will be offered. The idea of building a multilayer power divider based on coupling energy through a slot was successfully implemented [47]. Composite right-handed and left-handed power dividers have also been used in the design of multilayer power dividers [48]. In this section, a new design for multilayer power dividers is presented. The idea is born from the knowledge of the surface current accumulation in the gaps of SCSRR at its resonant frequency. The first power divider can be seen in Figure 11. The base is the resonator proposed in Figure 2a. This resonator is converted to a power divider by adding an output microstrip line, which is perpendicular to the input-output axis, and the line starts over the SCSRR.
The end of the input line and the beginning of the output lines, to Ports 2 and 3, have been designed following an optimization process to obtain an adapted stub to the 50 Ω microstrip lines. To achieve the distances from the center of the ring to the beginning of the lines, labeled as p1, p2 and p3 were optimized (Figure 11b). The distance between the end of the input line and the center of the device is p1 = 0.7 mm. The distance between the device’s center to the beginning of the output line to Port 2 is p2 = 1.3 mm, and the distance between the center and the output line to Port 3 is p3 = 1.7 mm.
The results from the simulation are shown in Figure 12. Values of S21= −4.69 dB and S31 = −4.03 dB are obtained at the resonant frequency of f0 = 5 GHz.
The next device presented is a variant of the previous one. The input line is again a microstrip line that ends on the top of an SCSRR which is grabbed in the metallization layer. In a new microstrip line placed just below the metallization layer, two output microstrip lines are built, and they share the ground plane with the input line. Each output line starts just over each gap of the SCSRR, with a small adjustment in the position at the end of the line to achieve the best adaptation in both output lines, which are parameters p2 and p3, as previously explained. Finally, an angle is drawn on each corner of the device. This is drawn to facilitate the assembly of the two plates since accuracy is critical to obtain the best adaptation, which means the best response to the outputs. In Figure 13c, the surface current distribution at the resonant frequency is depicted. Most of the currents are cumulated in the gaps of the SCSRR, being the optimal position to couple energy to the output lines.
The equivalent circuit of this device is the same for the input, which means a microstrip entry is coupled to the SCSRR through a coupler Cin. The open stub is emulated with inductance Lin. The output differs from devices in the previous section because this is a power divider, but the idea is the same. The currents are coupled from the SCSRR to the output line of Port 2 through coupler Cout2 and the adaptation is achieved with the open stub of the line represented as inductance Lout2 (which is the same for Port 3). Coupling is characterized in Cout3 and adaptation with Lout3 inductance. The complete layout is plotted in Figure 14a.
With the dimensions of the prototype proposed, the values for the elements in the equivalent circuit are Lin = 1.16 nH and Cin = 0.296 pF. The value of SCSCRR elements is the same, namely CSCSRR = 0.81 pF and LSCSRR = 0.87 nH. The output components have the following values: Cout2 = 0.19 pF, Lout2 = 1.16 nH, Cout3 = 0.19 pF and Lout3 = 1.16 nH. The S-parameter response to the circuit is shown in Figure 14b. We observe a value of S21= −4.69 dB and S31 = −4.03 dB at the resonant frequency f0 = 5 GHz.
The results show a high-efficiency power divider, having output lines in a different layer than the input line, using a single particle SCSRR. This makes the device competitive because of its small size and good performance. It is also important that a completely symmetrical response is obtained in both output ports. As the equivalent circuit is completely symmetrical, the S21 and S31 lines for the equivalent circuit are overlapped because of that a different style is chosen for each data series. The equivalent circuit matches the simulation perfectly in working frequencies and shows a short deviation in lower and higher frequencies that can probably be caused by some coupling that is not considered because of the proximity of the input and output lines.
A variant of the previous power divider is presented now. It is built as a combination of the presented devices. This time, the power divider outputs are designed in different layers. Output in Port 2 is placed in the same layer as the input. Output in Port 3 is in a layer below the ground plane, following the same approach as the previous device. A layered top view is drawn in Figure 15a.
In Figure 15b, the S-parameters are shown. At the resonant frequency f0 = 4.7 GHz, insertion losses are S21 = −3.71 dB and S31 = −3.69 dB, giving an efficiency of this divider of 91%. In this case, S21 and S31 do not have a symmetrical response. In this case, a moderate deviation in the resonant frequencies is observed, owing to surface wave coupling, excitation of higher order modes and/or coupling effects between input/output lines that were not considered in the equivalent circuit.
A new variant is proposed in Figure 16. It is quite similar to the previous one. This time, the output in Port 2 is also placed in the layer below the ground plane, as it is placed in Port 3. The top layout is displayed in Figure 16a. For this device, the dimensions are exactly the same as the previous one. With the dimensions of the prototype designed, the values for the elements in the equivalent circuit are Lin = 1.16 nH, Cin = 0.296 pF, and the value of the SCSCRR elements are the same, namely CSCSRR = 0.81 pF and LSCSRR = 0.87 nH. Output components have the following values: Cout2 = 0.137 pF, Lout2 = 1.16 nH, Cout3 = 0.296 pF and Lout3 = 1.16 nH. A picture of the device is provided in Figure 16b.
The full wave simulation results, and equivalent circuit results, can be seen in Figure 16c. For this device, the resonant frequency is obtained at f0 = 4.7 GHz, with S21 = −3.89 dB and S31 = −3.54 db. There are two facts to highlight concerning the output. Complete symmetry in S21 and S31 is achieved for this device. The second important point is that the S21 response is quite different from the previous device’s response, although the top layout is the same.
To conclude this section, Table 3 shows a comparison between the new power dividers presented in this article and others with a similar design. The criteria for selecting the devices for the comparison are multi-layer devices through a slot in the ground plane or multi-layer power dividers based on ring resonators.
Two results can be highlighted. The first one is that in the proposed design in Figure 15, great efficiency is obtained with similar dimensions as the comparative ones. The second one, which is more relevant from the point of view of the design method, is that it obtained a great efficiency power divider where output lines are placed in different layers.

5. Duplexers and Triplexers

As summarized in Table 1, the latest set of devices presented in the article is based on the design of multilayer duplexers and triplexers. Microstrip diplexers have been designed in multiple ways by using composite RH/LH media [49,50]. The usage of resonant particles to achieve great performance duplexers is also common [51,52,53]. There have been also proposed analytical models for multi-stage resonator diplexers [54,55]. This study will focus on the comparison of duplexers in planar technologies such as [56], but it will also share characteristics of multilayer [57] or left/right-handed composites [58].
Again, the initial model is the serial resonator, sometimes in the upper layer and sometimes in the ground plane. It provides the first resonance to the device. The second resonance will be obtained by adding a second SCSRR on the ground plane. A new output line to Port 3 will be placed in the upper or lower layer. Some of the possible combinations will be exposed here.
The first device is a duplexer made with the combination of one SSRR in the serial configuration on the top layer, and one SCSRR grabbed in the metallization layer (see Figure 17a). Output microstrip line to Port 2 is also on the top layer. Output microstrip line to Port 3 is placed in the lower metallization layer (see Figure 17c).
The dimensions of the SSRR placed in the upper layer are square side length l = 3.6 mm, the width of rings c = 0.2 mm, and separation between rings d = 0.1 mm. For the SCSRR placed in the ground plane, dimensions are square side length l = 5 mm, the width of rings c = 0.2 mm, and separation between rings d = 0.1 mm. Finally, the distance between the center of the ring till the beginning of the output line to Port 3, labeled in the previous section as p3 = 2.7 mm. The distance between the centers of both resonators is labeled as zi. The only requirement is that no coupling between rings exists. The second parameter is the displacement of the second resonator from the input microstrip line di. Both are shown in Figure 17b.
For this device, the separation between centers is zi = 5.5 mm and the displacement of SCSRR from the center of the input line di = 3.1 mm. The equivalent circuit of diplexer build with one SSRR and one SCSRR is designed applying the knowledge acquired in previous sections. The upper microstrip layer with an SSRR is modeled with the initial inductance (Lin_up) and capacitance (Cin_up) per unit length. The coupling between the line and the SSRR is characterized by a π-model, with the components Cp and Cs. The SSRR is modeled with the LC tank LSSRR and CSSRR. The coupling between the resonator and the ground plane is established with a capacitor (Cgnd). The SSRR is coupled to the output line again characterized as a π-model, and, finally, the output line is modeled with the inductance (Lout_up) and capacitance (Cout_up) per unit length.
The bottom part is designed as follows: The microstrip line is adapted to the bottom ground plane with inductance (Lin). The line is coupled to the resonator with a capacitance Cin. The complete schema is depicted in Figure 18a.
The values of the equivalent circuit for the diplexer above are, for the upper part: Lin_up = 0.01 nH, Cin_up = 0.04 pF, Cp = 0.0093 pF, Cs = 0.091 pF, Cgnd = 0.006 pF, LSSRR = 7.1 nH, CSSRR = 0.062 pF, Lout_up = 0.01 nH and Cin_up = 0.04 pF. For the lower part the values are Lin = 2.2 nH, Cin = 0.24 pf, CSCSRR = 1.08 pF, LSCSRR =1.19 nH, Cout = 0.24 pF, and Lout = 1.6 nH. To calculate LSCSRR and CSCSRR the perimeter of the inner square is used. It is also used to obtain the radius of the equivalent circular complementary split ring resonator, and, in this way, to obtain the LC tank values. Finally, both LC components were replaced by two capacitors and two inductors in series. Thus, the value of each LSCSRR is half of the inductor L calculated in [32]. The value of each CSCSRR is double the capacitor (C) because it has a built-in serial configuration.
The simulation and measurement results are shown in Figure 18b. For this device, S21 = −2.2 dB is obtained at resonant frequency f0 = 5.57 GHz and S31 = 0.79 dB is observed in f1 = 4 GHz and return losses greater than 20 dB. There is an agreement between the simulation and equivalent circuit models. Deviations in the frequency response are observed in higher frequencies in S21. Although they are in different layers, both SSRR and SCSRR are quite close to each other and it could cause any coupling neglected in our model.
The next device is a small modification of the previous one. In this case, both resonators are placed on the ground plane (see Figure 19a). The dimensions for the smaller SCSRR are square side length l = 3.5 mm, the width of rings c = 0.2 mm, and the separation between rings d = 0.1 mm. Dimensions for the big SCSRR are square side length l2 = 4.2 mm, the width of the rings c = 0.2 mm, and the separation between rings d = 0.1 mm. The distance between the end of the input line and the center of the device is p1 = 1.9 mm. The distance between the device’s center to the beginning output line to Port 2 is p2 = 2.1 mm, and the distance between the center and output line to Port 3 is p3 = 1.9 mm. Finally, the displacement dimensions for the bigger SCSRR are di = 2.7 mm and zi = 5.6 mm.
The equivalent circuit for this device consists of two stages of resonators coupled to a microstrip line. The basis of this equivalent circuit is already represented in Figure 19b. The end of the input line is modeled as an inductor Lin, and the coupling between the line and resonators is Cin2, Cin3. The resonant particles for each SCSRR are labeled as LSCSRR2, CSCSRR2 and LSCSRR3, CSCSRR3. From the resonators, the energy is coupled to output lines, designed as Cout2 and Cout3, and finally, the adaptation of the output line with the resonator is represented as an open stub called Lout2 and Lout3, respectively, for each output line.
The values of the equivalent circuit above, for the circuit dimensions already enumerated are Lin = 3.8 nH, Cin2 = Cin3 = 0.102 pF, CSCSRR2 = 0.69 pF, LSCSRR2 = 0.74 nH, CSCSRR3 = 0.99 pF, LSCSRR3 = 1.06 nH, Cout2 = Cout3 = 0.102 pF, and Lout2 = Lout3 = 5.3 nH.
Simulation and measurement are shown in Figure 19c, exhibiting strong responses in both resonances. In f0 = 6.63 GHz, the insertion loss is S21 = −0.52 dB and the second resonant frequency to the Port 3, f1 = 4.74 GHz with insertion loss value S31 = −0.53 dB. An improvement in S21 insertion loss in comparison to the same device built with SSRR can be seen. Excellent agreement is obtained between the simulation and the equivalent circuit.
Continuing with duplexers, on this new device, output ports are designed in different layers. The output microstrip line to Port 2 is built in the upper metallization layer, while the output microstrip line to Port 3 is in the lower metallization layer, as shown in Figure 20a. All the dimensions on this device are exactly the same as the previous one. As previously stated, the only difference is the location of the output microstrip line to Port 2.
The output for this device is shown in Figure 20b. S21 peak is obtained at f0 = 6.34 GHz and a value of −0.71 dB, S31 resonant frequency occurs at f1 = 4.82 GHz with insertion loss value of −0.51 dB. The values obtained are similar to the previous device. This is relevant, because the design method provides two alternatives to build power dividers with output in different layers depending on the requirement.
And to finish the set of duplexers, the next device presented is a new variant of the previous ones. In this case, both SCSRRs are placed on the ground plane, while input and output microstrip lines are located in the upper microstrip layer, as plotted in Figure 21a. Again, the ring dimensions are the same as previous devices.
The output for this device is displayed in Figure 21b and the S21 peak is obtained at f0 = 6.37 GHz and a value of −0.67 dB, S31 resonant frequency occurs at f1 = 4.7 GHz with an insertion loss value of −0.52 dB.
With all the previous information, a comparison of the relevant figures is shown in the following Table 4. It can be highlighted that the devices presented in the article obtained similar insertion losses and return losses to the compared one but with a significantly lower effective area λg2. As mentioned, an almost identical response when designing the outputs in different layers is obtained. The resonant frequencies are tunable, providing great flexibility in the design process.
To conclude, an evolution of presented diplexers is proposed. A collection of different triplexers will be designed in multiple configurations. They will be compared with similar implementations of multilayer triplexers [59]. The first model, proposed in this article, is designed using both kinds of resonators: SSRR and SCSRR. On the upper layer, an SSRR is used in the serial configuration. The output resonance is in Port 2 also with a microstrip line in the upper metallization layer. Two SCSRRs are obtained in the metallization layer of the ground plane just below the input line (see the layout in Figure 22a). In the lower metallization layer, output lines for Ports 3 and 4 are designed. To better understand the layer distribution in Figure 22b, a perspective layout of the layers, separated from each other, is painted. To complete the visualization, Figure 22c shows a schematic front view of the different layers with the components on them.
The relevant dimensions of the SSRR placed in the upper layer are square side length l2 = 3.6 mm, the width of rings c = 0.2 mm, and the separation between rings d = 0.1 mm. For the SCSRR placed on the ground plane, closer to Port 3, the dimensions are square side length l3 = 5 mm, the width of rings c = 0.2 mm, and the separation between rings d = 0.1 mm (c and d are the same for all the rings in this device). The distance between the center of the ring until the beginning of the output line to Port 3 is labeled as p3 = 2.7 mm. For the SCSRR closer to Port 4, the square side length l4 = 4.1 mm. The distance until the beginning of the output line to Port 4, p4 = 3.3 mm. In these devices, we have also the design parameters zi and di for both resonators placed in the ground plane. To distinguish them, they will be labeled as zi3 and di3 for the distances relevant to Port 3. Relevant distances to Port 4 will be named zi4 and di4. In this device, values for these dimensions are zi3 = 5.05 mm, di3 = 2.65 mm, zi4 = 5.85 mm, and di4 = 2.95 mm.
The fundamentals for the equivalent circuit of the triplexer have already been outlined. In Figure 23a, we can see three stages, namely the one above which corresponds to the upper part of the SSRR, and two paths with the SCSRRs which direct to Ports 3 and 4, respectively. The values for this circuit, are the following: Lin_up = 0.01 nH, Cin_up = 0.04 pF, Cp = 0.093 pF, Cs = 0.091 pF, Cgnd = 0.006 pF, CSSRR = 0.39 pF, LSSRR =1.75 nH, Lout_up = 0.01 nH, Cout_up = 0.04 pF. Lin = 3.7 nH, Cin3 = 0.127 pF, CSCSRR3 = 1.05 pF, LSCSRR3 = 1.11 nH, Cout3 = 0.127 pF, Lout3 = 5.3 nH. Cin4 = 0.127 pF, CSCSRR3 = 0.88 pF, LSCSRR3 = 0.92 nH, Cout3 = 0.127 pF, Lout3 = 5.3 nH.
The results obtained in the full wave simulation compared with the S-parameters of the equivalent circuit are depicted in Figure 23b. The resonances are obtained at f0 = 5.63 GHz with insertion losses of S21 = −2.2 dB. The second resonance is f1 = 4.39 GHz with a value S31= −0.73 dB, and, finally, the third resonance is f2 =5.2 GHz with insertion losses of S41 = −0.86 dB.
A good response is obtained in SCSRR resonant frequencies, while SSRR exhibits lower performance. However, the relevant fact is that the three resonant frequencies are quite close to each other, with more than 18 dB of isolation between all the outputs.
The following device is similar to the previous one. In this case, the SSRR has been replaced by a third SCSRR. The Source port is placed in the upper metallization layer, and the output ports are placed in the lower metallization layer. Overlapped layers are shown in Figure 24a, and the schematic representation of the layers is shown in Figure 24b. The relevant dimensions of the rings are the width of rings c = 0.2 mm, and the separation between rings d = 0.1 mm for all of them. The square side length for the SCSRR close to Port 2 is l2 = 3.5 mm, for the SCSRR close to Port 3 is l3 = 4.2 mm, and finally, for the SCSRR near Port 4 is l4 = 3.8 mm. It has also adapted the rings’ location. Values are for SCSRR close to Port 3 and SCSRR closer to Port 4: zi3 = 5.6 mm, di3 = 2.7 mm and zi4 = 5.9 mm, di4 = 2.5 mm, respectively. Additionally, the parameters designed for the optimization in the output layer to attain the open stub adaptation are adjusted. In this device: p1 = 1.15 mm, p2 = 1.15 mm, p3 = 1.1 mm, and p4 = 0.9 mm.
The fundamentals of the equivalent circuit for this device have also been explained in the paper. Three stages, one for each resonator, are modeled as painted in Figure 25a. The input stub is modeled with the open stub modeled with inductor Lin, and the rest of the components are defined in the same way as the previous device.
The values for this circuit are the following: Cin2 = 0.127 pF, CSCSRR2 = 0.69 pF, LSCSRR2 = 0.73 nH, Cout2 = 0.127 pF, Lout2 = 5.3 nH. Lin = 3.8 nH, Cin3 = 0.127 pF, CSCSRR3 = 1.05 pF, LSCSRR3 = 1.11 nH, Cout3 = 0.127 pF, Lout3 = 5.3 nH. Cin4 = 0.127 pF, CSCSRR3 = 0.88 pF, LSCSRR3 = 0.92 nH, Cout3 = 0.127 pF, and Lout3 = 5.3 nH. Again, the values provided for the capacitors and inductances of the resonators are the series of the LC resonators calculated in [32].
S-parameters results in comparison with equivalent circuit model results are compared in Figure 25b. Great output with less than 1 dB insertion lost in each port is achieved. The resonant frequency for the output in Port 2, f0 = 6.44 GHz with a value of S21 = −0.67 dB. The resonant frequency on the resonator close to Port 3 is obtained at frequency f1 = 4.79 GHz with a value of S31 = −0.53 dB, and finally, the last resonant frequency is obtained in frequency f2 = 5.6 GHz with a value of S41 = −0.71 dB.
A good definition of the resonance peaks is obtained in all the resonant frequencies. Insertion losses are lower than 0.75 dB in the worst case, and good isolation between ports is obtained. There is good agreement between simulation and equivalent circuits. It can only be appreciated a short deviation in the frequencies, lower than 2% that can be caused by small coupling between SCSRRs not considered in our model. In Figure 26, the surface current distribution at the resonant frequencies of the different SCSRRs is displayed. Not only does most of the current flow through the designed output line but also no currents are coupled with the other ports, which makes the SCSRR transparent out of their resonant frequencies.
For the next triplexer, again three SCSRRs are used. In this device, the output lines are designed in different layers. The output layer to Port 2 is in the upper metallization layer, that is, in the same layer as the input line. Output lines towards ports 3 and 4 are placed in the lower metallization layer. For a better understanding of the layer distribution, the top layout together with a schematic front view of the layer distribution is provided in Figure 27a,b.
Design parameter values for this device are the width of rings c = 0.2 mm and the separation between rings d = 0.1 mm, which are common in the three resonators of this device. The distance between the center of the ring until the beginning of the output line to Port 2, labeled as p2 = 1.15 mm. The dimensions for the SCSRRs have the same dimensions as in the previous device. Only displacement parameters have been modified in order to avoid undesired couplings. For the resonator close to Port 3, the values are zi3 = 5.6 mm and di3 = 2.7 mm, and for the one close to Port 4, the values are zi4 = 4.9 mm and di4 = 2.5 mm. S-parameters values are plotted in Figure 27c.
A very good response in all three resonant frequencies is achieved, but the real advantage of this device is that the resonance frequencies are really close to each other. The ratio between the second resonance and the lower one is f 0 d 2 / f 0 d 1 = 1.1, while the ratio between the upper frequency to the lower one is f 0 d u / f 0 d 1 = 1.22.
Last but not least device, is quite similar to the previous ones but follows the same idea. In this device, all output lines are placed in the same upper metallization layer as the input line. All the ring dimensions are the same as in the previous device. There are only some changes in the location of the rings. The values are zi3 = 5.6 mm and di3 = 2.7 mm, and for the SCSRR closer to the port, the values are zi4 = 5.9 mm and di4 = 2.5 mm. Additionally, the parameters designed for the optimization in the output layer to attain the open stub adaptation are adjusted. In this device, p1 = 1.15 mm, p2 = 1.15 mm, p3 = 1.1 mm, and p4 = 0.9 mm are observed.
In Figure 28b, the S-parameters of the previous device are shown. A great output level and more than 20 dB isolation are achieved. Additionally, the proximity of each resonance makes this device very attractive in the design of many applications.
To conclude this section, a comparison of some key figures is presented. Not only the triplexers proposed in this paper are compared but also some research on microstrip multi-layer triplexers. The comparison is presented in Table 5.
In the comparison, we can see that the proposed devices obtain similar insertion losses and return losses, with two improvements. The first one is that the effective area is much smaller, and in the second one, the ratio between resonant frequencies is lower than the compared ones. Another advantage, already demonstrated in the duplexers section, is that similar performances are achieved when the outputs are designed in different layers.
The methodology used for diplexers and triplexers can be expanded in the design of multiplexers by simply adding more resonators and outputs, with the flexibility of building the outputs in the desired layer.

6. Equivalent Circuits Parameters Compilation and Summary of Main Results

This section has two objectives, namely to show the definition of the parameters and show the values of the equivalent circuits of the different devices in a grouped way. These objectives are completed to help the reader establish comparisons easily. The second objective presents a summary of the best results obtained from the different devices.
Starting with the first, Table 6 lists all the equivalent circuits with their associated parameters and their values. For those equivalent circuits with more than one component with a similar name in the picture, all the components will be listed in the same cell.
To finalize this section, a new Table 7 is provided with all the results obtained in the new devices proposed in the paper. In the table, the most relevant figures will be highlighted considering that one of the main advantages of the multilayer has nothing to do with the metrics but has everything to do with the flexibility provided in the design of outputs in different layers.

7. Conclusions

A complete characterization of the Complementary Split Ring Resonator in a multi-layer environment is developed in this article. High performance in miniaturized devices is presented and studied. Single-layer, double-layer, double-frequency resonators, power dividers, duplexers, and triplexers are analyzed, exhibiting multi-frequency resonances with well-defined port responses. A sample of all possible combinations is shown, but all others would be valid, that is, a combination of SSRR, CSSRR, and outputs in the same layer or different layers. The implementation is in three output devices, but the proposed designs can be increased by adding more rings along the input line. The proposed methodology and the corresponding devices can be readily adapted for their integration into transceivers and radiating systems for current wireless communication systems and future developments in 6G systems in the millimeter wave range and beyond. Future work is foreseen in relation to the experimental validation of the proposed prototypes with adequate fixtures in the frequency ranges of the operation of devices.

Author Contributions

Conceptualization, E.J. and F.F.; methodology, E.J.; software, E.J. and J.C.I.; validation, E.J. and F.F; formal analysis, E.J.; investigation, E.J.; resources, E.J., J.C.I. and F.F.; data curation, E.J.; writing—original draft preparation, E.J.; writing—review and editing, E.J.; visualization, E.J.; supervision, F.F.; project administration, F.F.; funding acquisition, F.F. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by Ministerio de Ciencia, Innovación y Universidades, Gobierno de España (Agencia Estatal de Investigación, Fondo Europeo de Desarrollo Regional -FEDER-, European Union) under the research grant of PID2021-127409OB-C31 CONDOR.

Conflicts of Interest

The authors declare no conflict of interest.

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  59. Aksoy, S.C.; Yıldı, İ. A multilayered triplexer based on interdigital filter topology with PCB technology. In Proceedings of the 2015 IEEE MTT-S International Microwave Symposium, Phoenix, AZ, USA, 17–22 May 2015; pp. 1–4. [Google Scholar] [CrossRef]
Figure 1. (a) Top layout SCSRR. (b) SCSRR main dimensions. (c) Equivalent circuit model for SCSRR. (d) Simulated S21 (solid black line) and simulated S21 for equivalent circuit model (dash-dotted line).
Figure 1. (a) Top layout SCSRR. (b) SCSRR main dimensions. (c) Equivalent circuit model for SCSRR. (d) Simulated S21 (solid black line) and simulated S21 for equivalent circuit model (dash-dotted line).
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Figure 2. (a) Layout of the SCSRR resonator. (b) Detailed parameters p1 and p2 to build the open stub.
Figure 2. (a) Layout of the SCSRR resonator. (b) Detailed parameters p1 and p2 to build the open stub.
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Figure 3. E-field SCSRR excitation. (a) Vector plot. (b) Absolute E-field values.
Figure 3. E-field SCSRR excitation. (a) Vector plot. (b) Absolute E-field values.
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Figure 4. (a) Equivalent circuit model for SCSRR Micro-Resonator. (b) Full wave simulation results for S21 (solid black line) compared to the simulated S21 obtained with the equivalent circuit model (dash-dotted line).
Figure 4. (a) Equivalent circuit model for SCSRR Micro-Resonator. (b) Full wave simulation results for S21 (solid black line) compared to the simulated S21 obtained with the equivalent circuit model (dash-dotted line).
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Figure 5. Double frequency resonator. (a) Top view overlapped layers. (b) Equivalent circuit model. (c) Simulated S21 (solid black line) and simulated S21 for equivalent circuit model (dash-dotted line).
Figure 5. Double frequency resonator. (a) Top view overlapped layers. (b) Equivalent circuit model. (c) Simulated S21 (solid black line) and simulated S21 for equivalent circuit model (dash-dotted line).
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Figure 6. Surface current distribution. (a) Surface current in upper metallization layer at f0 = 4.24 GHz. (b) Surface current in bottom metallization layer at f0 = 4.24 GHz. (c) Surface current in upper metallization layer at f1 = 5.51 GHz. (d) Surface current in bottom metallization layer at f1 = 5.51 GHz.
Figure 6. Surface current distribution. (a) Surface current in upper metallization layer at f0 = 4.24 GHz. (b) Surface current in bottom metallization layer at f0 = 4.24 GHz. (c) Surface current in upper metallization layer at f1 = 5.51 GHz. (d) Surface current in bottom metallization layer at f1 = 5.51 GHz.
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Figure 7. (a) Overlapped top view serial 2-layer resonator. (b) Schematic front view layer distribution.
Figure 7. (a) Overlapped top view serial 2-layer resonator. (b) Schematic front view layer distribution.
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Figure 8. (a) Equivalent circuit model 2-layer resonator previously depicted. (b) Simulated S21 (solid black line) and simulated S21 for equivalent circuit model (dash-dotted line).
Figure 8. (a) Equivalent circuit model 2-layer resonator previously depicted. (b) Simulated S21 (solid black line) and simulated S21 for equivalent circuit model (dash-dotted line).
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Figure 9. (a) Top view perpendicular two-layer resonator and surface current distribution. (b) Vector plot of surface current. (c) Magnitude plot within the CSRR region.
Figure 9. (a) Top view perpendicular two-layer resonator and surface current distribution. (b) Vector plot of surface current. (c) Magnitude plot within the CSRR region.
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Figure 10. Simulated S21 (solid black line) and simulated S21 for equivalent circuit model (dash-dotted line).
Figure 10. Simulated S21 (solid black line) and simulated S21 for equivalent circuit model (dash-dotted line).
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Figure 11. (a) Top view SCSRR single layer power divider. (b) Detail of microstrip lines position over the SCSRR.
Figure 11. (a) Top view SCSRR single layer power divider. (b) Detail of microstrip lines position over the SCSRR.
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Figure 12. Simulated S21 (solid blue line), simulated S31 (solid black line), and simulated S11 (solid red line).
Figure 12. Simulated S21 (solid blue line), simulated S31 (solid black line), and simulated S11 (solid red line).
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Figure 13. (a) Top view layer distribution of a 2-layer power divider. (b) Front view layer distribution. (c) Surface current distribution in SCSRR metallization layer at the resonant frequency.
Figure 13. (a) Top view layer distribution of a 2-layer power divider. (b) Front view layer distribution. (c) Surface current distribution in SCSRR metallization layer at the resonant frequency.
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Figure 14. (a) Equivalent circuit model 2-layer power divider. (b) Simulated S21 (dashed black line) and simulated S31 (dashed blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed blue line).
Figure 14. (a) Equivalent circuit model 2-layer power divider. (b) Simulated S21 (dashed black line) and simulated S31 (dashed blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed blue line).
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Figure 15. (a) Top view overlapped layer distribution of a 2-layer power divider. (b) Simulated S21 (solid black line) and simulated S31 (solid blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed-dotted blue line).
Figure 15. (a) Top view overlapped layer distribution of a 2-layer power divider. (b) Simulated S21 (solid black line) and simulated S31 (solid blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed-dotted blue line).
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Figure 16. (a) Top view layer distribution 2-layer power divider, with two outputs in second layer. (b) Equivalent circuit model 2-layer power divider. (c) Simulated S21 (solid black line) and simulated S31 (solid blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed-dotted blue line).
Figure 16. (a) Top view layer distribution 2-layer power divider, with two outputs in second layer. (b) Equivalent circuit model 2-layer power divider. (c) Simulated S21 (solid black line) and simulated S31 (solid blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed-dotted blue line).
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Figure 17. (a) Top view overlapped layer distribution of a 2-layer duplexer. (b) Relevant dimensions for the second resonator’s position. (c) Schematic representation of front view layer distribution.
Figure 17. (a) Top view overlapped layer distribution of a 2-layer duplexer. (b) Relevant dimensions for the second resonator’s position. (c) Schematic representation of front view layer distribution.
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Figure 18. (a) Equivalent circuit of diplexer with SSRR on top and SCSRR on ground plane. (b) Simulated S21 (dashed black line) and simulated S31 (dashed blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed-dotted blue line).
Figure 18. (a) Equivalent circuit of diplexer with SSRR on top and SCSRR on ground plane. (b) Simulated S21 (dashed black line) and simulated S31 (dashed blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed-dotted blue line).
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Figure 19. (a) Top view overlapped layer distribution of a 2-layer duplexer. (b) Equivalent circuit of diplexer made with two SCSRR on ground plane. (c) Simulated S21 (dashed black line) and simulated S31 (dashed blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed-dotted blue line).
Figure 19. (a) Top view overlapped layer distribution of a 2-layer duplexer. (b) Equivalent circuit of diplexer made with two SCSRR on ground plane. (c) Simulated S21 (dashed black line) and simulated S31 (dashed blue line). Equivalent circuit S21 (dashed-dotted black line) and equivalent circuit S31 (dashed-dotted blue line).
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Figure 20. (a) Top view overlapped layer distribution of a 2-layer duplexer. (b) Simulated S11 (dashed red line), simulated S21 (dashed black line), and simulated S31 (dashed blue line).
Figure 20. (a) Top view overlapped layer distribution of a 2-layer duplexer. (b) Simulated S11 (dashed red line), simulated S21 (dashed black line), and simulated S31 (dashed blue line).
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Figure 21. (a) Top view overlapped layer distribution of a 2-layer duplexer. (b) Simulated S11 (dashed red line) and simulated S21 (dashed black line) and simulated S31 (dashed blue line).
Figure 21. (a) Top view overlapped layer distribution of a 2-layer duplexer. (b) Simulated S11 (dashed red line) and simulated S21 (dashed black line) and simulated S31 (dashed blue line).
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Figure 22. (a) Top view overlapped layer distribution of 2-layer triplexer, which is SSRR and SCSRR based. (b) Perspective view of layers composition of 2-layer triplexer, which is SSRR and SCSRR based. (c) Front view layer distribution.
Figure 22. (a) Top view overlapped layer distribution of 2-layer triplexer, which is SSRR and SCSRR based. (b) Perspective view of layers composition of 2-layer triplexer, which is SSRR and SCSRR based. (c) Front view layer distribution.
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Figure 23. (a) Equivalent circuit of triplexer made with SSRR on top and two SCSRRs on ground plane. (b) Simulated S21 (dashed black line), equivalent circuit S21 (dashed-dotted black line), simulated S31 (dashed blue line), equivalent circuit S31 (dashed-dotted blue line), simulated S41 (dashed green line), and equivalent circuit S41 (dashed-dotted green line).
Figure 23. (a) Equivalent circuit of triplexer made with SSRR on top and two SCSRRs on ground plane. (b) Simulated S21 (dashed black line), equivalent circuit S21 (dashed-dotted black line), simulated S31 (dashed blue line), equivalent circuit S31 (dashed-dotted blue line), simulated S41 (dashed green line), and equivalent circuit S41 (dashed-dotted green line).
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Figure 24. (a) Top view overlapped layer distribution of 2-layer triplexer SCSRR based. All output ports in upper layer are designed. (b) Front view layer distribution.
Figure 24. (a) Top view overlapped layer distribution of 2-layer triplexer SCSRR based. All output ports in upper layer are designed. (b) Front view layer distribution.
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Figure 25. (a) Equivalent circuit of triplexer made with three SCSRR on ground plane. (b) Simulated S21 (dashed black line), equivalent circuit S21 (dashed-dotted black line), simulated S31 (dashed blue line), equivalent circuit S31 (dashed-dotted blue line), simulated S41 (dashed green line), and equivalent circuit S41 (dashed-dotted green line).
Figure 25. (a) Equivalent circuit of triplexer made with three SCSRR on ground plane. (b) Simulated S21 (dashed black line), equivalent circuit S21 (dashed-dotted black line), simulated S31 (dashed blue line), equivalent circuit S31 (dashed-dotted blue line), simulated S41 (dashed green line), and equivalent circuit S41 (dashed-dotted green line).
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Figure 26. Surface current at (a) f0 = 6.44 GHz, (b) f1 = 4.79 GHz, and (c) f2 = 5.6 GHz.
Figure 26. Surface current at (a) f0 = 6.44 GHz, (b) f1 = 4.79 GHz, and (c) f2 = 5.6 GHz.
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Figure 27. (a) Top view overlapped layer distribution of 2-layer triplexer, which is SCSRR based. Mixed output ports in upper and lower layer are designed. (b) Front view layer distribution. (c) Simulated S11 (dashed red line), simulated S21 (dashed black line), simulated S31 (dashed blue line), and simulated S41 (dashed green line).
Figure 27. (a) Top view overlapped layer distribution of 2-layer triplexer, which is SCSRR based. Mixed output ports in upper and lower layer are designed. (b) Front view layer distribution. (c) Simulated S11 (dashed red line), simulated S21 (dashed black line), simulated S31 (dashed blue line), and simulated S41 (dashed green line).
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Figure 28. (a) Top view overlapped layer distribution of 2-layer triplexer, which is SCSRR based. All output ports in upper layer are designed. (b) Simulated S11 (red line), simulated S21 (black line), simulated S31 (blue line), and simulated S41 (green line).
Figure 28. (a) Top view overlapped layer distribution of 2-layer triplexer, which is SCSRR based. All output ports in upper layer are designed. (b) Simulated S11 (red line), simulated S21 (black line), simulated S31 (blue line), and simulated S41 (green line).
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Table 1. Schema of the structure of this article.
Table 1. Schema of the structure of this article.
CSRR as Elementary Particle
Resonators
Serial SCSRR
Second layer output
Double frequency
Perpendicular output
Power dividers
Single layer
Outputs on top
Outputs on down
Mixed outputs
Duplexers
SSRR + SCSRR Outputs top and down
Outputs on top layer
Outputs on lower layer
Triplexers
SSRR + SCSRR
Outputs mixed layer
Outputs on top layer
Outputs on lower layer
Table 2. Comparison between different models of resonators.
Table 2. Comparison between different models of resonators.
Reff0 (GHz)Effect Size λg2Insertion Loss (dB)Return Loss (dB)
[25]50.005021
[39]1.950.021320
This work (Figure 4)5.010.00190.9118.8
This work (Figure 5)4.240.00271.1/1.215.4/19.3
This work (Figure 8)50.00190.8322.1
This work (Figure 10)4.740.00210.7122
Table 3. Comparison between different models of power dividers.
Table 3. Comparison between different models of power dividers.
Referencef0 (GHz)Effect Size λg2Insertion Loss (dB)Efficiency (%)
[21]2.450.00194.25/4.785
[40]6.30.0012N/AN/A
[47]5.000.00193.8/490
This work (Figure 11)5.240.00173.24/4.2975.5
This work (Figure 13)5.630.00194.03/4.6985.9
This work (Figure 15)4.720.00193.67/3.7099
This work (Figure 16)5.000.00213.53/3.8990.5
Table 4. Comparison between different models of diplexers.
Table 4. Comparison between different models of diplexers.
ReferenceEffect Size λg2 f 0 d 1 , u
(GHz)
f 0 d u / f 0 d 1 IL ( dB )   f 0 d 1 , u RL ( dB )   f 0 d 1 , u
[55]0.2182.49/2.981.191.15/1.5435/33
[56]0.1852.45/3.61.471.45/1.324/19
[57]0.00891/22N/A38.8/48.9
This work (Figure 17)0.0554/5.571.390.79/2.227.3/12.9
This work (Figure 19)0.00254.8/6.41.330.53/0.5217.2/29
This work (Figure 20)0.00244.7/6.11.30.51/0.7120/22
This work (Figure 21)0.00283.98/5.41.350.52/0.6719/20
Table 5. Comparison between different models of triplexers.
Table 5. Comparison between different models of triplexers.
ReferenceEffect Size λg2 f 0 d 1 , 2 , u
(GHz)
f 0 d 2 / f 0 d 1
f 0 d u / f 0 d 1
IL ( dB )   f 0 d 1 , 2 , u RL ( dB )   f 0 d 1 , 2 , u
[54] 1/2/2.42/2.40.9/1.8/2.4>10.8
[59]0.0750.8/1/1.21.25/1.52.2>10
This work (Figure 22)0.00214.4/5.1/5.51.16/1.250.7/0.9/2.225.9/21.9/16.1
This work (Figure 24)0.00304.9/5.5/6.51.12/1.320.56/0.71/0.6621.8/15.9/23.9
This work (Figure 27)0.00285.1/5.6/6.21.10/1.221.2/1.8/0.910.2/13.1/17.7
This work (Figure 28)0.00265/5.4/6.41.08/1.280.54/0.68/0.9121.1/17.2/14.8
Table 6. Equivalent circuits, parameters, and values.
Table 6. Equivalent circuits, parameters, and values.
DeviceFig.Lin
(nH)
Cin
(pF)
CSCSRR
(pF)
LSCSRR
(nH)
Lout
(nH)
Cout
(pF)
LSSRR
(nH)
CSSRR
(pF)
Cp
(pF)
Cs
(pF)
Cgnd
(pF)
Resonator. SCSRR in microstrip(Figure 1c)1.16 10.296 10.3801.690-------
Resonator. Serial resonator SCSRR
1 layer
(Figure 4a)1.160.2960.81 20.87 31.160.296-----
Resonator. Double frequency(Figure 5b)1.10.241.1211.10.247.10.0620.0090.0910.006
Resonator. Serial resonator SCSRR
2 layers
(Figure 8a)1.160.2960.81 20.87 31.160.296-----
Resonator. SCSRR
2 layer-cross outputs
(Figure 4a) 41.160.2960.81 20.87 31.160.137-----
Power divider.
Cross output both 2nd layer
(Figure 14a)1.160.2960.81 20.87 31.16
1.16
0.19
0.19
-----
Power divider. Serial + cross
Outputs both 2nd layer
(Figure 16b)1.160.2960.81 20.87 31.16
1.16
0.137
0.296
-----
Duplexer. SSRR + SCSRR.
Outputs in two layers
(Figure 18a)0.01 5
2.2
0.04 5
0.24
1.081.190.01 5
1.6
0.04 5
0.24
7.10.0620.0090.0910.006
Duplexer 2 SCSRRs
All outputs bottom layer
(Figure 19b)3.80.102
0.102
0.69
0.99
0.74
1.06
5.3
5.3
0.102
0.102
-----
Triplexer. SSRR + 2 SCSRRs(Figure 23a)0.01
3.7
0.04
0.127
0.127
1.05
0.88
1.11
0.92
0.01
5.3
5.3
0.01
0.127
0.127
1.750.390.0090.0910.006
Triplexer. 3 SCSRRs
All outputs bottom layer
(Figure 25a)3.80.127
0.127
0.127
0.69
1.05
0.88
0.73
1.11
0.92
5.3
5.3
5.3
0.127
0.127
0.127
-----
1 In Figure 1c, the elements are called LT and CT. 2 To consider this, there are two capacitors in serial configuration. 3 To consider this, there are two inductors in serial configuration. 4 It contains the same components, so the pictures are the same with different values. 5 The first value corresponds to Cxx_up or Lxx_up and the second Cin, Cout, Lin, and Lout, respectively.
Table 7. Main figure proposed devices.
Table 7. Main figure proposed devices.
DeviceFig. f 0 d 1 , u (GHz) Effect Size
λg2
Insertion
Loss (dB)
Return
Loss (dB)
Efficiency
(%)
f 0 d u / f 0 d 1
Resonator. SCSRR in microstrip(Figure 1d)4.71-38---
Resonator. Serial resonator SCSRR
1 layer
(Figure 4b)5.010.00190.9118.8--
Resonator. Double frequency(Figure 5b)4.24
5.51
0.00271.1
1.2
15.4
19.3
--
Resonator. Serial resonator SCSRR
2 layers
(Figure 8b)50.00190.8322.1--
Resonator. SCSRR
2 layer-cross outputs
(Figure 10)4.740.00210.7122--
Power divider
All outputs on the top layer
(Figure 12)5.240.00173.24
4.29
-75.5-
Power divider.
Cross output both 2nd layer
(Figure 14b)5.630.00194.03
4.69
-85.9-
Power divider. Serial + cross
Outputs in different layers
(Figure 15b)4.720.00193.67
3.70
-99-
Power divider. Serial + cross
Outputs both 2nd layer
(Figure 16c)5.000.00213.53
3.89
-90.5-
Duplexer. SSRR + SCSRR.
Outputs in different layers
(Figure 18b)4
5.57
0.0550.79
2.2
27.3
12.9
-1.39
Duplexer 2 SCSRRs
All outputs bottom layer
(Figure 19c)4.8
6.4
0.00250.53
0.52
17.2
29
-1.33
Duplexer 2 SCSRRs
Outputs in different layers
(Figure 20b)4.7
6.1
0.00240.51
0.71
20
22
-1.3
Duplexer 2 SCSRRs
All outputs on the top layer
(Figure 21b)3.98
5.4
0.00280.52
0.67
19
20
-1.35
Triplexer SSRR + 2 SCSRRs
Outputs in different layers
(Figure 23b)4.4
5.1
5.5
0.00210.7
0.9
2.2
25.9
21.9
16.1
-1.16
1.25
Triplexer 3 SCSRRs
All outputs bottom layer
(Figure 25a)4.9
5.5
6.5
0.00300.56
0.71
0.66
21.8
15.9
23.9
-1.12
1.32
Triplexer 3 SCSRRs
Outputs in different layers
(27c)5.1
5.6
6.2
0.00281.2
1.8
0.9
10.2
13.1
17.7
-1.10
1.22
Triplexer 3 SCSRRs
All outputs on the top layer
(Figure 28b)5
5.4
6.4
0.00260.54
0.68
0.91
21.1
17.2
14.8
-1.08
1.28
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Jarauta, E.; Iriarte, J.C.; Falcone, F. Characterization of Multilayer Coupling Based on Square Complementary Split Ring Resonator for Multiport Device Implementation. Micromachines 2023, 14, 68. https://doi.org/10.3390/mi14010068

AMA Style

Jarauta E, Iriarte JC, Falcone F. Characterization of Multilayer Coupling Based on Square Complementary Split Ring Resonator for Multiport Device Implementation. Micromachines. 2023; 14(1):68. https://doi.org/10.3390/mi14010068

Chicago/Turabian Style

Jarauta, Eduardo, Juan Carlos Iriarte, and Francisco Falcone. 2023. "Characterization of Multilayer Coupling Based on Square Complementary Split Ring Resonator for Multiport Device Implementation" Micromachines 14, no. 1: 68. https://doi.org/10.3390/mi14010068

APA Style

Jarauta, E., Iriarte, J. C., & Falcone, F. (2023). Characterization of Multilayer Coupling Based on Square Complementary Split Ring Resonator for Multiport Device Implementation. Micromachines, 14(1), 68. https://doi.org/10.3390/mi14010068

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