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Review

A Review of Homoepitaxy of III-Nitride Semiconductors by Metal Organic Chemical Vapor Deposition and the Effects on Vertical Devices

US Naval Research Laboratory, Washington, DC 20375, USA
Crystals 2023, 13(3), 387; https://doi.org/10.3390/cryst13030387
Submission received: 3 December 2022 / Revised: 5 January 2023 / Accepted: 18 February 2023 / Published: 24 February 2023
(This article belongs to the Special Issue Research in GaN-based Materials and Devices)

Abstract

:
This paper reviews some of the basic issues in homoepitaxial growth of III-nitrides to enable a vertical device technology. It focuses on the use of metal organic chemical vapor deposition (MOCVD) to grow GaN and explores the effects of the native substrate characteristics on material quality, interface composition, and device performance. A review of theoretical work understanding dopants in the ultra-wide III-nitride semiconductors, AlN and BN, is also included for future efforts expanding the technology into those materials.

1. Introduction

As a material system spanning both wide (GaN) and ultra-wide (AlN) bandgaps, III-nitride-based semiconductors are attractive for next-generation power devices, including radio-frequency (rf) amplifiers based on high electron mobility transistor (HEMT) structures, high voltage vertical diodes and power switches, resonant tunneling diodes, and optoelectronic devices. Despite significant device breakthroughs involving III-nitride semiconductors, such as high efficiency blue light emitting diodes [1,2] and HEMT-based monolithic microwave integrated circuits [3,4], there are still significant materials challenges that must be overcome to realize their full potential and enable widespread adoption and technology insertion.
Until recently, most nitride-based devices were limited to devices with lateral geometry, due to the lack of a native substrate which not only provides a lattice matched crystal surface, but also permits vertical conduction through the substrate. The use of non-native substrates, such as sapphire, silicon carbide, or silicon with large lattice mismatches to the III-nitride materials, results in high defect densities, especially threading dislocations, which impact device performance and application [5,6,7]. Additionally, the conduction path can be impacted by surface states and high fields at the gate edge, requiring extreme thermal engineering efforts [4,8]. These issues have prevented lateral GaN devices from reaching the high theoretical critical breakdown field of the material of >3 MV/cm [9,10]. The recent introduction, commercial availability, and improving quality of native III-nitride substrates will enable next-generation devices to be vertical in nature. A schematic of the difference between these devices is illustrated in Figure 1, with the direction of the conduction path marked in a red dotted line. By moving to a vertical conduction path, the device performance will be more reliant on the intrinsic properties of the material and enable device performance to approach the theoretical critical breakdown field.
The problem in creating GaN substrates lies with the phase diagram of GaN, where extremely high temperatures and pressures are needed to melt the material (>2200 °C and 6 GPa), which prevents the use of standard bulk crystal growth techniques like Czochralski or Bridgman methods [11,12]. Additionally, GaN decomposes rather than sublimes at high temperatures and lower pressure, making the physical vapor transport growth method used to produce SiC and AlN crystals impractical [13]. Currently, there are three techniques that produce grow bulk GaN substrates: hydride (or halide) vapor phase epitaxy (HVPE), ammonothermal growth, and sodium flux growth. Commercially, the first two techniques are the most prominent. Dislocation densities in these commercial substrates are approximately 106–107 cm−2 for HVPE and 104–105 cm−2 for ammonothermal substrates. All growth techniques are dependent on the quality of the starting material. Ammonothermal growth uses seed GaN crystals suspended within an autoclave in supercritical ammonia at high pressures with a thermal gradient to dissolve a GaN feedstock and deposit GaN on the seed crystals. With high quality seed crystals, single crystalline GaN can be produced, however the method is very slow (1–2 μm/h) [14]. HVPE growth for free-standing GaN wafers originally began with growth of GaN epitaxy on non-native substrates, which does result in the formation of dislocations. However, HVPE growth rates for GaN can be rapid (>100 μm/h), producing thick epitaxial layers, which can be sliced similar to crystal boules. Defect annihilation occurs with increasing thickness, reducing the total dislocations in these types of substrates. By using higher quality initial substrates, the dislocation density in free-standing substrates produced by HVPE has also been reduced. The defect level in the GaN wafers, regardless of the growth method is still higher than those in commercial SiC substrates (102–104 cm−2), but are much reduced in comparison to heteroepitaxial nitride growth on non-native substrates (up to 109–1010 cm−2 on sapphire). Additionally, some of the growth methods also result in large lattice bowing within the substrates [15]. The process of slicing wafers from such a boule with distorted crystal planes inherently leads to varying step density across the wafer, which will affect epitaxial growth.
Although these commercially available native substrates allow a vertical geometry, for the homoepitaxial material to reach its full potential, there are several fundamental materials issues that must be addressed, which are shown in the cross-section of a simple schematic of a vertical Schottky diode in Figure 2. These issues can be broken into three areas: substrate effects, interface effects, and epitaxy requirements for a vertical technology. From the substrate perspective, this includes understanding exactly what metrics are required for the substrate, the evolution or inclusion of new substrate-dependent defects, and impact of these on electrical performance. Preparing the regrowth interface is also highly important to produce a chemically clean, defect-free interface. The last piece of the puzzle is the epitaxy requirements. For a vertical power technology, thick layers with low un-compensated background carrier concentrations are required. This must be accomplished while maintaining a smooth surface morphology and preserving a high crystal quality. This paper will review the effects of the substrate and interface on material quality, including impurity incorporation, and vertical device performance. All results referenced in this review are from homoepitaxial GaN growth by metal organic chemical vapor deposition (MOCVD).

2. Understanding Native GaN Substrates

The foundational step in moving GaN technology to a vertical geometry lies in the introduction of native, commercial substrates. With the introduction of these substrates, the first step is to fully understand the characteristics of the incoming material. While the substrate technology was in its infancy, substrate sizes were small (10 × 10 mm2 in some cases). By evaluating multiple wafers from several vendors using Raman spectroscopy, photoluminescence (PL) spectroscopy, white light optical profilometry, and Nomarski imaging, it was found that the quality and characteristics of the incoming substrates varied considerably. A sampling of four 10 × 10 mm2 coupons from four wafers (A–D) from four different vendors from an early period in commercial substrate development is shown in Figure 3 and detailed in Ref. [16]. The first row contains optical profilometry images of a 1 × 1 mm section of a coupon—showing morphological differences between the wafers on a macro-scale. The cracks in sample D arose from dicing of the wafer. In these images, the differences in bow can also be observed, with sample C showing significant bow, while sample D had almost no bow. All incoming wafers showed smooth surface morphology on a small scale, with sub-nm rms roughness, but the variations on a larger scale were easily observed using large-scale characterization techniques [16]. The second row shows PL imaging of the substrates using an Xe lamp-passed monochromator set to 370 nm. The variations in color correspond to different impurities and defects in the substrates when imaged below band gap excitation. Sample B also showed a mottled appearance in PL imaging, meaning variations in impurities and defects within the wafers. Mapping of the Raman A1(LO) peak conveys information on carrier concentration in GaN [17]. This is shown in the third row for the four coupons. Substrate D was highly n-type, so had a carrier concentration that was too high to produce an A1(LO) peak. In this case the Raman spectrum is shown for comparison. Here, and in the PL imaging, the difference between uniform and non-uniform impurity incorporation is clearly visible. Samples like B were clearly non-uniform, while A and D were very uniform.
Throughout the maturing of the substrate technology, which also resulted in an increase in average wafer size to 2” diameter, incoming substrates were characterized using the long-range techniques previously mentioned. After examining multiple wafers from multiple vendors, the substrates could be categorized into two types by their uniformity with respect to defects and carrier concentration: Type I which were highly uniform and Type II which were not [18]. The difference between these two types is illustrated by mapping of the Raman A1(LO) peak in Figure 4. Type II were further divided into those with a regular, patterned non-uniformity (Type IIa) and those with a more random non-uniformity (Type IIb) [19]. This first group (Type IIa), although not as desirable as Type I substrates from a yield or mature substrate technology perspective, still allowed for further understanding of the effect of non-uniformities on the epitaxial layers and electrical performance. As the substrate technology progressed and these results were published, most manufacturers are now producing Type I substrates and wafers with up to 4” diameters are close to becoming available.

3. Substrate-Epitaxy Effects

The effects of the substrates on epitaxial layers have also been examined. It has been shown that the surface morphology of the substrate is replicated and exaggerated with increasing thickness in the epilayers [20]. This means that any surface defects, including polishing damage, at the substrate surface will continue into the epitaxial layers. As an example, Figure 5 shows optical profilometry images of samples before and after growth of merely 2 µm of homoepitaxial GaN. Additionally, samples with more surface morphology or polishing damage did not evidence step flow-growth.
As mentioned earlier, Type II substrates showed inhomogeneity in carrier concentration through characterization using Raman spectroscopy mapping. Surprisingly, that inhomogeneity carried into the epitaxial layers. This was shown both in Raman spectroscopy mapping and photoluminescence measurements [18]. Photoluminescence is extremely surface sensitive, and broadening of the near band edge emission from the GaN epitaxial layers grown on Type II substrates shows that this inhomogeneity in carrier concentration is present at the sample surface. Thus, changes in carrier concentration, if present in the substrate, continue to impact the epitaxial layers.

4. Homoepitaxial Interface

In general, a clean interface is highly desired at any regrowth interface—either substrate-epi or epi-epi, as impurities in the III-nitrides can lead to changes in carrier concentration, induce defects and dislocations, and inhibit thermal conductivity.

4.1. Composition

It had previously been reported that the homoepitaxial interface of GaN grown by another prominent epitaxial growth method, molecular beam epitaxy (MBE) shows a large concentration of oxygen, carbon, and silicon at the interface [21]. It was assumed that growing the homoepitaxial layers by MOCVD would reduce all of these contaminants, due to the use of hydrogen as a carrier gas at high temperatures during the ramp to growth temperatures. From MOCVD growth on three 2” GaN substrates within a single run, that assumption was found to be true for C and O at the regrowth interface using secondary ion mass spectroscopy (SIMS), shown in Figure 6 [20]. Each of these substrates was from a different manufacturer and the results confirm some results from PL imaging, where the substrates contained different levels of impurities from one another. For example, substrate C contained more Si and C than the other two, while substrates B and A had higher levels of O. It should be noted that sample A, although grown during the same run, had a lower growth rate and did show a tail of oxygen trailing into the epitaxial film. This might be due to different surface conditions on that wafer, which were not addressed by a solvent clean prior to growth, a difference in offcut, or possible defects in the characterization spot. However, regardless of the substrate vendor or substrate composition, a large, sharp peak in Si was observed in secondary ion mass spectroscopy data at the substrate-epi interface, as is clear in Figure 6. This has been reported by several groups [20,22,23,24,25]. This strong Si peak (>1018 cm−3) at the regrowth interface only appears when exposing the interface to atmosphere prior to growth. It has not been noticed when cooled in the chamber, kept under vacuum in the chamber load lock, or during high temperature growth interrupts [22,24]. The interfacial Si peak increases with exposure time to air and when exposed to atmosphere vs. storage in an N2 drybox [25]. By varying the Si dopant level of the GaN substrate, it was established that the Si at the interface increased with increasing Si levels in the substrate [26]. It was also shown that there were increased levels of interfacial Si on interfaces with etch damage [24]. This seems to indicate the large spike in Si at the regrowth interface is due to incorporation of residual Si impurities, from many possible sources, including etch-back, adsorption during air exposure, carrier gases as well as increases in dangling bonds at the surface due to processing steps. To remove some of these impurities from the surface, reduction of dangling bonds can be used [24]. Ex situ cleaning with UV-ozone and HF has shown a reduction of Si at the interface by 60% when using optimized conditions [25].

4.2. Thermal Conductivity

With large concentrations of Si at the regrowth interface, the effects on thermal conductivity needed to be understood. From time domain thermoreflectance and steady state thermoreflectance measurements of equivalent thicknesses of heteroepitaxial (GaN on SiC and sapphire) and homoepitaxial GaN films, it was shown that the homoepitaxial GaN films possessed much higher thermal conductivities than the heteroepitaxial material. The homoepitaxial films, even with layers as thin as 0.25 μm, agree with or are slightly higher than the first principles lattice dynamics predictions for thermal conductivity. This is illustrated in Figure 7. The mean thermal conductivities of the homoepitaxial films that are higher than the predictions may indicate scattering at the homoepitaxial interface in these calculations may not be as diffusive as assumed. In general, this means that at room temperature, the high concentration of Si at the GaN/GaN homoepitaxial interface is not impacting the thermal conductivity of the material. However, it was observed that below 200 K phonon-boundary scattering at the interface and defect scattering within the films begins to reduce the thermal conductivity [27,28]. In this study, some homoepitaxial MBE-grown GaN films that were Mg-doped were also investigated It was shown that adding Mg in the films reduced the thermal conductivity by half, providing evidence that in this case phonon-dopant scattering dominates.

5. Impurity Incorporation

There are many impurities incorporated into the III-nitride semiconductors during growth. In GaN, these include unintentional impurities (O, Si, C), those intentionally added to provide holes or electrons to certain epitaxial layers (Mg or Si, respectively), those added to compensate donors to produce semi-insulating layers (C, Fe, Mn, Be), and those used to alloy the materials to control the bandgap (In, Al, B) [29]. Controlling these is the key to semiconductor transistor technology. In this section, some additional insights in C doping of GaN, both unintentional and intentional, and theoretical efforts in understanding dopants in ultra-wide III-nitride materials, like AlN and BN will be reviewed.

5.1. Carbon in GaN

Carbon incorporation in GaN is extremely complex, as it can form states such as interstitials, self-compensating donors, deep acceptors, acceptor pairs, and other complexes [30]. In MOCVD-grown films, it is unintentionally incorporated from the metal-organic precursors used as a Group III source, such as trimethylgallium, trimethylaluminum, and trimethylindium. The level of carbon unintentionally incorporated into films can be somewhat controlled by varying or optimizing growth conditions. For example, C incorporation will increase with decreasing the V/III ratio, lowering the growth temperature, increasing the molar flow of the gallium source, and decreasing the chamber pressure [31]. However, C can also be intentionally introduced using several different precursors [32]. For that to be effective, though, the background carbon should be as low as possible. For homoepitaxial GaN films, it has been found that the unintentional incorporation of C changes with the substrate offcut, increasing with increasing offcut angle [20]. This effect is shown in Figure 6, where the SIMS data shows varying amounts of C in each of the three wafers grown during the same run. Figure 8 shows the direct dependence of the C in the homoepitaxial films as a function of offcut as measured by XRD on the SIMS samples. Theoretical efforts support this finding, as calculations showed the lowest energy barrier for C incorporation is at a step edge [33]. The higher offcut angle wafers have more steps, so, corresponding to theory, should incorporate more carbon into the homoepitaxial layers.
However, C can also be intentionally incorporated at high concentrations to produce semi-insulating GaN layers. The optical and electrical properties of heavily C-doped GaN have been studied using PL spectroscopy, optically-detected magnetic resonance and hybrid density functional theory (DFT) [34]. Previous work had established that carbon acceptors (CN) give rise to a yellow luminescence band near 2.2 eV [35]. Photoluminescence measurements showed this optical transition shifting as a function of carbon concentration, suggesting a change in the behavior of carbon dopants. Hybrid DFT was used to calculate the electrical and optical behavior of carbon species containing multiple carbon impurities and compared the behavior of these complexes to the isolated centers. From this, the CGa-CN complex is a good candidate to explain the shift in the YL peak. Furthermore, the local vibrational modes of carbon impurity centers were determined, with modes above 1500 cm−1 attributed to complexes containing carbon interstitials.

5.2. Doping in Ultra-Wide Bandgap III-Nitrides

With increasing interest in moving to wider and wider bandgap materials, the ability to control carriers within semiconductors by doping becomes increasing difficult, with the proclivity to doping type depending on the band structure and defects [36]. For example, p-type doping in GaN is difficult, with Mg having an ionization energy >140 meV and hydrogen (a carrier gas in MOCVD) forming a neutral complex with Mg that must be broken to achieve p-type conductivity. The situation is even more complicated for ultra-wide bandgap materials, like AlN and BN, both with bandgaps greater than 6.0 eV. For AlN, it has been experimentally determined the ionization energy for Mg is 640 meV [37].
In AlN, theoretical investigations in hole behavior show that there is a small energy difference between delocalized and trapped holes in AlN, so small permutations in the lattice structure can result in hole trapping—forming transition levels [38]. This work shows that most alloying elements (B, In, Sc) will trap holes, with the exception of Ga. With its small size, B appears to be the most effective hole trap. The transition levels formed may explain deep optical signals in some of these alloys, such as B, where a large Franck-Condon shift is projected at levels that might redshift PL signals. Acceptor impurities also strongly trap holes. In all but one case, though, the acceptors accomplish this by stabilizing two holes and forming two localized states. The exception is Be. The stability of the trapped holes increases with increasing size mismatch. Also, the ionization energy of all other acceptors investigated, including Be, are higher than Mg. So, theoretically, none should be easier to use as a dopant than Mg. However, ab initio studies of AlN show that Be might also be an efficient dopant in a hydrogen-assisted growth process to reduce interstitials and might be enhanced by co-doping with oxygen [39]. Very recently, p-type conductivity has been reported in Be-doped AlN grown by metal-modulated epitaxy [40].
For cubic boron nitride (c-BN), another ultra-wide bandgap III-nitride semiconductor, hybrid DFT has been used to address potential n-type dopants and compensating centers [41]. This work investigated Si, Ge, S, Se, C, O, F, and Li as dopants. Many of these candidates’ usefulness were impacted by self-compensation or high formation energies. However, potential candidate donors were found in SiB and ON. For all of these dopants, compensation by boron vacancies remains a concern.

6. Effects on Processing and Device Performance

6.1. Surface Roughness

To understand the effects of roughness on device performance, Schottky diodes were fabricated on an early-vintage single 2” diameter wafer. Across this single wafer, large differences in leakage current and breakdown voltage were observed. Investigating the morphology around individual diodes showed an immediate correlation between large-scale surface roughness and device performance, where rougher areas showed increased leakage current and reduced breakdown voltage [42]. While the small-scale roughness measurements (10 × 10 µm2 scans) showed smooth surfaces (sub-nm rms), large-scale measurements (250 × 250 µm2 scans) had variations in rms roughness from 10–100 nm. At the 100 nm rms roughness level, the breakdown voltage decreased by 95%, while at 50 nm rms, it decreased by 20% compared to diodes on the smoothest areas of the wafer. These same results were shown on a larger scale [43]. These findings establish the utility of using large-scale characterization techniques on both incoming substrates and epitaxy to establish metrics for wafer evaluation prior to further processing.

6.2. Inhomogeneity

Comparing p-i-n diodes fabricated on the previously discussed Type I vs. Type IIa substrates revealed some issues in device performance due to inhomogeneity in carrier concentration as well as defectivity in the Type IIa wafers [19]. The inhomogeneity in the Type II substrates was shown earlier to carry into the homoepitaxial films [18]. Due to the regular, patterned nature of the inhomogeneity in the Type IIa substrates, devices could be aligned with respect to the inhomogeneous pattern. In comparison, device yield and performance on p-i-n diodes on Type I substrates were more consistent with higher yield and lower leakage current. However, devices with Type IIa substrates showed the impact of locating devices over substrate defects—in this case, at stress centers (identified by Raman spectroscopy mapping of the E2 peak). The current-voltage sweeps in these devices were all consistently leaky. When not located directly above the E2 peak defect, the Type IIa results were inconsistent, most likely due to variations in both the homoepitaxy and substrate carrier concentration, but those correlations were not as direct. In this case, the effects of the stress center seem to have the largest influence on devices, impacting the rectification ratio and increasing leakage current on devices directly over these defects [19].

6.3. Metal-Assisted Chemical (MAC) Etching

In addition to understanding the influence of epitaxy and substrate on devices, novel processing will be necessary for several types of vertical devices, including a need for etching of deep trenches without incurring sidewall damage. One of the potential ways to do this is by using MAC etching, which is a metal-catalyzed and local (open-circuit) electrochemical etching method capable of producing semiconductor structures defined by a patterned metal film in a forward (etching below the metal) or inverse (etching outside the metal) process. By using this anisotropic technique to etch micropillars into homoepitaxial GaN layers, it was found that increasing the Si-doping levels in the films to increase n-type conductivity in the MOCVD epitaxial layers increases the etch rate, ranging from 150 nm/min at a doping level of 5 × 1017 cm−3 to 270 nm/min at a doping level of 5 × 1018 cm−3. Increasing the doping level also produced smoother etch surfaces. Additionally, increasing the oxidant to etchant ratio increased the etch rate. However, the substrates showed a different etch morphology as well as an accelerated etch rate especially at the regrowth interface. This is partially thought to be due to the high Si concentration at the GaN/GaN regrowth interface. Etching in this manner achieved etch rates similar to RIE etching, but without non-radiative sidewall damage [44].

7. Summary

Understanding the fundamental issues involved in homoepitaxial growth of III-nitride semiconductors is the necessary first step in enabling reliable and consistent applications for vertical GaN devices for high power and rf electronics. The incoming characteristics of the wafers are extremely important—with roughness, structural defects, degree of offcut, and inhomogeneity impacting homoepitaxial growth and electrical performance in p-i-n and Schottky diodes. Additionally, the utility of long-range characterization can be used to set metrics for incoming substrates and epitaxy. The regrowth interface was shown to be compositionally clean in MOCVD growth, except for high levels of Si at the interface, which can be reduced by several methods. However, this Si did not impact thermal conductivity of the boundary or epitaxial layers at room temperature. As for C impurities, unintentional C incorporation increases with offcut and the optical changes in intentionally C-doped GaN were explained. Further theoretical work on ultra-wide bandgap nitrides found that holes in AlN will be easily localized reducing the potential for p-type conductivity, but p-type conductivity has been reported with Be-doping. Investigations in c-BN found two potential n-type dopants. MAC etching showed a dependence of etch rate on the conductivity and type of material (substrate vs. epitaxial layers), but still shows potential in producing deep etching without causing non-radiative defects, which are observed with more conventional plasma-based processes. In general, foundational knowledge discussed herein sets a base for forming vertical device technologies in current GaN efforts as well as exploring aspects for ultra-wide bandgap nitride semiconductors.

Funding

Work at the US Naval Research Laboratory is supported by the Office of Naval Research.

Data Availability Statement

Not applicable.

Conflicts of Interest

The author declares no conflict of interest.

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Figure 1. Illustration of the difference in geometry and current path (red dotted line) on (a) a standard lateral device, in this case and AlGaN/GaN HEMT grown heteroepitaxially on a non-native substrate and (b) a homoepitaxial vertical p-i-n diode. In the lateral HEMT, the current path is at the surface of the wafer, traveling between the source and the drain. In the vertical, the path is from top to bottom, through both the epitaxy and the substrate.
Figure 1. Illustration of the difference in geometry and current path (red dotted line) on (a) a standard lateral device, in this case and AlGaN/GaN HEMT grown heteroepitaxially on a non-native substrate and (b) a homoepitaxial vertical p-i-n diode. In the lateral HEMT, the current path is at the surface of the wafer, traveling between the source and the drain. In the vertical, the path is from top to bottom, through both the epitaxy and the substrate.
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Figure 2. Cross-section of a simple Schottky diode where the layers consist of a highly doped native n-type substrate and a homoepitaxially grown n- drift layer, with metal contacts on both sides. The points of interest in each area are indicated.
Figure 2. Cross-section of a simple Schottky diode where the layers consist of a highly doped native n-type substrate and a homoepitaxially grown n- drift layer, with metal contacts on both sides. The points of interest in each area are indicated.
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Figure 3. Optical profilometry, PL imaging, and Raman A1(LO) mapping of four early substrates. Figure uses copyrighted images, reprinted from [16] with permission from Elsevier.
Figure 3. Optical profilometry, PL imaging, and Raman A1(LO) mapping of four early substrates. Figure uses copyrighted images, reprinted from [16] with permission from Elsevier.
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Figure 4. Raman mapping of the A1(LO) peak position in Type I (uniform), Type IIa (regularly patterned non-uniformity) and Type IIb (random non-uniformity) substrates. Figure reproduced from [19] with permission from SNCSC.
Figure 4. Raman mapping of the A1(LO) peak position in Type I (uniform), Type IIa (regularly patterned non-uniformity) and Type IIb (random non-uniformity) substrates. Figure reproduced from [19] with permission from SNCSC.
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Figure 5. Optical profilometry images of the surface of 3 substrates before (top row) and after (bottom row) 2.1 μm of homoepitaxial GaN grown by MOCVD. Reprinted from [20] with permission from Elsevier.
Figure 5. Optical profilometry images of the surface of 3 substrates before (top row) and after (bottom row) 2.1 μm of homoepitaxial GaN grown by MOCVD. Reprinted from [20] with permission from Elsevier.
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Figure 6. SIMS data from three consecutively grown wafers. The homoepitaxial growth shows no incorporation of C or O at the regrowth interface. Instead, there is a large peak in the Si incorporation at this interface. Reprinted from [20] with permission from Elsevier.
Figure 6. SIMS data from three consecutively grown wafers. The homoepitaxial growth shows no incorporation of C or O at the regrowth interface. Instead, there is a large peak in the Si incorporation at this interface. Reprinted from [20] with permission from Elsevier.
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Figure 7. Room temperature thermal conductivity of MBE (blue) and MOCVD (red) films as a function of thickness. Reprinted figure with permission from [27]. Copyright 2022 by the American Physical Society.
Figure 7. Room temperature thermal conductivity of MBE (blue) and MOCVD (red) films as a function of thickness. Reprinted figure with permission from [27]. Copyright 2022 by the American Physical Society.
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Figure 8. Dependence of C incorporation in homoepitaxial films as a function of offcut.
Figure 8. Dependence of C incorporation in homoepitaxial films as a function of offcut.
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Hite, J.K. A Review of Homoepitaxy of III-Nitride Semiconductors by Metal Organic Chemical Vapor Deposition and the Effects on Vertical Devices. Crystals 2023, 13, 387. https://doi.org/10.3390/cryst13030387

AMA Style

Hite JK. A Review of Homoepitaxy of III-Nitride Semiconductors by Metal Organic Chemical Vapor Deposition and the Effects on Vertical Devices. Crystals. 2023; 13(3):387. https://doi.org/10.3390/cryst13030387

Chicago/Turabian Style

Hite, Jennifer K. 2023. "A Review of Homoepitaxy of III-Nitride Semiconductors by Metal Organic Chemical Vapor Deposition and the Effects on Vertical Devices" Crystals 13, no. 3: 387. https://doi.org/10.3390/cryst13030387

APA Style

Hite, J. K. (2023). A Review of Homoepitaxy of III-Nitride Semiconductors by Metal Organic Chemical Vapor Deposition and the Effects on Vertical Devices. Crystals, 13(3), 387. https://doi.org/10.3390/cryst13030387

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