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Article

A Hybrid Optimization Strategy for Minimizing Conversion Losses in Semi-Series-Resonant Dual-Active-Bridge Converter

1
Department of Intelligent Manufacturing, Guangdong University of Education, Guangzhou 510303, China
2
Department of Computing and Artificial Intelligence, Suzhou City University, Suzhou 215104, China
*
Author to whom correspondence should be addressed.
Symmetry 2024, 16(11), 1547; https://doi.org/10.3390/sym16111547
Submission received: 23 October 2024 / Revised: 11 November 2024 / Accepted: 13 November 2024 / Published: 19 November 2024
(This article belongs to the Section Engineering and Materials)

Abstract

:
To enhance the performance of resonant DC–DC converters, particularly under low-load conditions, a semi-series-resonant dual-active-bridge (Semi-SRDAB) converter with a hybrid optimization strategy is proposed. This strategy aims to reduce conduction-related losses and is designed for applications requiring a wide voltage range. The proposed Semi-SRDAB converter comprises a full-bridge inverter on the primary side and a hybrid-output bridge rectifier on the secondary side. It adopts phase-shift modulation combined with frequency modulation for power control. The hybrid optimization strategy for the Semi-SRDAB converter is investigated, beginning with the deduction of resonant current minimization using phasor analysis. Based on these analysis results, zero reactive power operation and soft-switching operation are achieved for both buck and boost modes. Successful validation has been demonstrated through experimental testing on a 300 W laboratory prototype. Enhanced conversion performance is confirmed by comparing the results with those from previous works.

1. Introduction

The mass consumption of conventional fossil fuels has led to a significant increase in greenhouse gas emissions, which is now a major contemporary issue. Addressing climate change requires the replacement of conventional energy resources with renewable energy resources, which has become a societal consensus due to its ability to provide sustainable and affordable energy sources. DC–DC converters play a crucial role in modern renewable energy electronic systems, serving not only as standalone components but also as intermediate stages in multistage power conversion applications such as renewable energy harvesting, transportation electrification, and power compensation in electric grids [1]. Among power electronics systems, High-Frequency (HF) Isolated DC–DC (IDC) converters have gained considerable attention in the industrial field, providing competitive advantages such as galvanic isolation and high power density [2,3]. The Phase-Shifted Full-Bridge (PSFB) DC–DC converter is a typical IDC topology in which the leakage inductance of the isolation transformer is utilized for power transfer [4]. Although favorable performance can be achieved under soft-switching conditions, PSFB converters face problems such as conduction losses and voltage spike stress due to duty cycle loss of the full-bridge inverter [5]. The LLC resonant converter represents another significant topology of IDC [6]. The LLC resonant tank causes a quasi-sinusoidal voltage/current; magnetizing inductance is utilized to assist in soft-switching operation of switches. Frequency Modulation (FM) is commonly used for power regulation in LLC resonant converters [7]. High efficiency can be obtained when the switching frequency matches the resonant frequency; however, implementation of FM can be impractical, as the a wide range of potential switching frequency variations not only increases design complexity but can also lead to extra frequency-related losses.
In [8], the authors proposed a Semi Dual-Active-Bridge (Semi-DAB) converter with a hybrid diode-leg bridge rectifier. This converter is capable of employing phase-shift modulation (PSM) for power regulation. Scenarios that are particularly well suited for Semi-DAB converters include photovoltaic generation and electric vehicles, as Zero-Voltage Switching (ZVS) can be enabled for the switches and Zero-Current Switching (ZCS) for the diodes [9]. The main operation of Semi-DAB converters can be evaluated through analysis of the main operating waveforms, different intervals with current characteristics, and performance under varying input/output conditions [10]. In [11], a small-signal model of a Semi-DAB converter was investigated to derive a closed-form solution for dynamic adjustment based on analysis of the main power modes. To alleviate current stress, a dual-transformer Semi-DAB converter with a three-phase output rectifier was proposed in [12]. To accommodate higher voltages, a three-level topology can be adopted in the full-bridge inverter of the Semi-DAB converter, allowing for a wide voltage gain range [13]. By replacing the LC resonant tank for power transfer, the Semi-DAB converter can be transformed into a Semi-Series-Resonant Dual-Active-Bridge (Semi-SRDAB) converter [14]. The similarity in topology means that Semi-SRDAB converters retain most of the favorable features of Semi-DAB converters. In [15], an LLC-type resonant Semi-DAB converter with a discontinuous-current mode was proposed to enhance the light load performance of conventional LLC converters.
Both Semi-DAB and Semi-SRDAB converters typically operate in hard-switching mode with conventional Phase-Shift Modulation (PSM), particularly at low load levels; in addition, conduction-related losses tend to be high due to increased reactive power. Thus, it can be concluded that the commonly used PSMs have several apparent drawbacks, including hard switching, high current stress, reactive power, and circulating current. Numerous optimization strategies have been proposed to overcome these drawbacks, of which the majority focus on extending the soft-switching range or modifying the topology for specific applications [12,14,16,17]. Although soft-switching performance has been significantly improved, these converters still suffer from high conduction losses due to substantial reactive power and circulating current. Only a few have concentrated on advanced PSM strategies to reduce conduction losses. In [18], Critical Boundary Modulation (CBM) for Semi-DAB converters was proposed to reduce reactive power; however, this restricts the soft-switching region across the entire load range. A strategy that combines Frequency Modulation (FM) and CBM was investigated in [19], where the authors focused on full-range Zero-Voltage Switching (ZVS) operation and reducing the reactive power. By considering all possible steady states, the authors of [20] were able to obtain the minimized current trajectory using the Lagrangian multiplier method. In addition, an optimal operating condition for a Semi-SRDAB converter can be precisely selected to achieve the lowest loss for a wide-range voltage gain by adopting a tunable resonant tank topology [21,22]. However, these optimization solutions using the Lagrangian multiplier method are overly complex and lack detailed investigations.
Based on the above review, available solutions are either too complicated or suffer from extra current stress. In this paper, we propose a hybrid optimization strategy for a Semi-SRDAB converter that minimizes resonant current, eliminates reactive power and ensures ZVS operation. The typical operation of the Semi-SRDAB converter is analyzed in detail using the Fundamental Harmonics Approximation (FHA) approach, including the operating waveforms, equivalent circuit of each intervals, resonant current, and power characteristics. Then, the resonant current is optimized through phasor analysis for both buck and boost mode. Based on current minimization, the converter is designed to achieve zero reactive power with mode boundary conditions. The switching behavior is evaluated through a comprehensive consideration that includes dead-band intervals and current flows.FM and PSM are adopted for power regulation within a detailed design procedure. Verification based on a 300 W lab prototype converter is presented along with extensive experimental tests, followed by a comparison with related previous works. Finally, we discuss our conclusions and possibilities for future work.
The contributions of this paper are summarized as follows: (1) we propose a hybrid optimal strategy featuring minimum current levels, zero reactive power, and ZVS operation which reduces conduction-related losses for a wide range of operations; (2) based on this hybrid optimal strategy, we reduce the multidimensional problem solution to a one-dimensional analytic solution; and (3) we detail the typical steady-state operation of a Semi-SRDAB converter with TPS and FM, offering guidance for the selection of specific control strategies. These contributions significantly reduce economic cost and design complexity, resulting in high-efficiency performance in a cost-efficient manner.
The rest of this paper is organized as follows. First, the steady-state operations identified by their distinctive interval features are analyzed and a steady-state analysis is presented. A hybrid optimization strategy is proposed, then we analyze the phasor alleviation, reactive power, and soft-switching evaluation. Next, the detailed design and construction of our laboratory prototype is described for verification purposes. The verification section presents measurement results along with a comparison and loss breakdown. Finally, the conclusion and outlook are discussed in the last section of the paper.

2. Operating Principle of Semi-SRDAB Converter

The schematic diagram of the Semi-Series-Resonant Dual-Active-Bridge DC–DC (Semi-SRDAB) converter is shown in Figure 1. The primary-side inverters utilize full-bridge topologies, each featuring four active switches labeled S 1 through S 4 . The secondary side is a semi-active rectifier composed of two active switches S 5 , S 6 and two diodes D 1 , D 2 . The body diodes for these switches are denoted as D 1 D 6 . Additionally, C 1 C 6 and C D 1 C D 2 represent the eight junction capacitors for the switches and diodes, respectively. These parasitic diodes and junction capacitors are connected in parallel with the active switches. The input voltage is represented by V i n and the output voltage by V o u t , while C i n and C o u t are the high-frequency (HF) filter capacitors. The series-resonant tank, which acts as the main energy transfer component, includes a resonant inductor L r and resonant capacitor C r connected on the primary side. The resonant current and voltage across the resonant tank are denoted by i r and v r , respectively, while r k represents the sum of the equivalent resistance of L r and the winding resistance of the HF transformer. The HF voltages on the primary and secondary sides are v p and v s , respectively. The turn ratio of the HF transformer is defined as n t : 1 . Finally, the voltage gain of the Semi-SRDAB converter is defined as M = n t V o u t / V i n .
In the converter, each bridge leg consists of two switches controlled in complement with a 50% duty cycle and the necessary dead-band interval. The fixed switching frequency f s is set such that the high-frequency period T is 2 π f s . The primary side of converter can generate an HF square voltage v p between the midpoints A and B of each leg with an internal phase-shift α . The secondary-side duty cycle refers to the high-level voltage ( V o u t ) duration of v s with respect to the switching period T. The HF square voltage v s is generated between the midpoints C and D of each leg with PWM modulation. The phase shift β is the resonant current zero-crossing point. The phase-shift φ refers to the ratio of the time between the rising edge of v p from zero to high level and the rising edge of v s from zero to high level. In addition, the ranges of the phase-shifts are α , β , φ ( 0 , π ] ; hence, both v p and v s are quasi-square-wave HF voltages. Prior to performing detailed operational analysis, all assumptions regarding the switches, diodes, inductors, capacitors, and transformers are ideal. Optimizations were performed in the forward power mode (power flowing from V i n to V o u t ). Optimizations for the reverse power mode (power flowing from V o u t to V i n ) can be concluded following similar method.
Figure 2 presents the typical steady-state waveform of the Semi-SRDAB converter, which has garnered considerable attention due to its soft-switching capability and high conversion efficiency. This steady state encompasses eight distinctive time intervals within an HF switching period, during which v p , v s , and i r vary for each interval. At the onset of a new HF period, v p , v s , and i r are assumed to be negative, with v p equal to V i n and v s equal to V o u t . Power is transferred from the primary side to the secondary side. The equivalent circuits with current flow of the first four intervals are depicted in Figure 3, Figure 4, Figure 5 and Figure 6.
Interval 1 [ t 0 α ]: At t 0 , switch S 2 is turned off, indicating that the converter has entered Interval 1 as the equivalent circuit depicted in Figure 3. The body diode d 1 begins to conduct naturally as C 1 is discharged ( C 2 is charged). Hence, S 1 can turn on with zero voltage after the gating signal is applied. In this interval, v p changes to 0 and v s remains at V o u t . The conductive devices in interval 1 include d 1 , S 3 , D 2 , and d 5 .
Interval 2 [ α β ]: The second interval commences with the turn-on signal of switch S 4 , as shown in Figure 4; S 4 turns on with the ZVS operation. The current path in the input side flows through from S 1 to S 4 , causing v p to change to V i n . For the output side, v s remains at V o u t and D 2 and d 5 both continue to conduct.
Interval 3 [ β φ ]: This interval begins with the resonant current i r reaching its zero-crossing point, as illustrated in Figure 5; i r changes polarity from negative to positive, during which the conduction route of the input side remains unchanged ( v p = V i n ). Due to the unidirectional conductivity of the diodes, the resonant current i r charges C D 2 and discharges C 6 . Thus, diode d 6 begins to conduct, ensuring zero-voltage turn-on of switch S 6 . The secondary inverter voltage v s commutates to zero, as both S 5 and S 6 are conducting together. Electric energy is stored in the resonant tank during this interval.
Interval 4 [ φ π ]: As shown in Figure 6, Interval 4 starts when the gating signal of switch S 5 is removed. At t 3 , D 1 begins to conduct naturally, as C 5 is charged to V o u t and C D 1 is discharged to 0. Thus, v s is clamped to V o u t and the primary side current flow remains unchanged. The conductive devices in interval 4 include S 1 , S 4 , D 1 , and S 6 .
The subsequent four intervals (from π to 2 π ) are symmetric to the first four intervals with reversed polarities of v p , v s , and i r , and can be easily deduced by referring to Figure 2.

3. Steady-State Analysis of Semi-SRDAB Converter

In the steady-state analysis of a Semi-SRDAB converter, normalized variables are used in order to obtain generalized results that are applicable to all power levels. All quantities are normalized by the base values in (1):
V B = V i n ; Z B = R F ; I B = V B Z B ; ω B = ω r = 1 L k C k
where R F is the full-load output resistance and ω r is the resonant frequency. Hence, the normalized-voltage phasor expressions are obtained as (2) and (3):
v p ( t ) = n = 1 , 3 , 5 4 V i n n π cos n α 2 sin ( n ω s t )
v s ( t ) = n = 1 , 3 , 5 4 n t V o u t n π cos n ( ϕ α 2 β 2 ) sin ( n ω s t n ( ϕ α 2 + β 2 ) )
where ω s is switching angular frequency.The per-unit impedance of the resonance tank X p u is provided as follows (4):
X p u = ω s L r 1 ω s C r Z B = Q F Q F
where the normalized resonant tank impedance Q and F are provided as F = ω s ω r , Q = ω r L r R L .
Assuming that higher-order harmonics components of voltage and current are blocked by the resonant network, Fundamental Harmonics Analysis (FHA) is applied with acceptable accuracy. The time-domain equivalent circuit of the Semi-SRDAB converter with fundamental harmonics components is simplified as Figure 7. Then, the fundamental components of v p , v s are respectively represented in phasor form by U p , U s :
U p ( t ) = 2 2 π cos α 2 0
U s ( t ) = 2 2 M π cos ϕ α 2 β 2 ϕ α 2 + β 2
where the converter gain M = n t V o u t V i n .
With (5) and (6), the resonant current i r can be presented in phasor form I r as (7)
I r = 2 2 ( cos α 2 0 M cos ϕ α 2 β 2 ϕ α 2 + β 2 ) j X p u π .
When ω s t = β , i r ( β ) = 0 ; hence, the voltage gain can be further simplified as (8)
M = 2 cos α 2 cos β 1 + cos ( ϕ α 2 β ) .
From (7) and (8), β can be solved as follows (9):
β = arctan ( sin ( ϕ α 2 ) M cos ( ϕ α 2 ) 2 cos α 2 ) arccos ( M M cos ( ϕ α 2 ) 2 cos 2 α 2 + sin 2 ( ϕ α 2 ) ) .
Thus, the output power P o , p u is shown as (10)
P o , p u = 2 M sin ( ϕ α ) + sin ϕ + 2 sin β cos α 2 π 2 X p u .

4. Hybrid Optimization Strategy of Semi-SRDAB Converter

To reduce current stress, it is possible to opt for a lower conduction current in order to reduce the on-resistance. Thus, based on the aforementioned steady-state analysis, a hybrid optimization strategy for the Semi-SRDAB converter is proposed with the aim of achieving a lower conduction current through the three key objectives of minimizing resonant current, eliminating reactive power, and ensuring soft-switching operation.

4.1. Resonant Current Optimization with Phasor Analysis

As reported in previous works, a smaller conduction current leads to lower losses. Thus, the primary optimization objective of this work is to optimize the resonant tank current using phasor analysis with the aim of further improving efficiency by reducing conduction loss. With (10), the transmission power can be reformulated as (11)
C o , p u = 1 2 | v p | | v s | sin ( φ α ) .
Equation (11) establishes a proportional relationship between the phase shift ( φ α ) and HF transformer voltage v p , v s . For analysis, it is assumed that the low-voltage side and transmission power remain constant. Hence, (11) in different converter gain cases can be illustrated by a phasor diagram, as shown in Figure 8.
According to (11), it can be observed that as the phase-shift φ = ( φ α ) varies continuously, the RMS value of the resonant current also changes constantly. Due to the low-voltage side and transmission power remaining constant, the RMS value of the resonant current i r is minimized when the low-voltage-side phasor is perpendicular to the resonant tank voltage phasor, leading to the resonant current I r and low-voltage-side phasor overlapping. Because the current phasor is always perpendicular to the phasor of the resonant tank voltage, it can be naturally inferred that the minimized current phasor should align with that of the adjacent voltage phasor. Then, the optimization for the resonant current with phasor can be expressed as follows (12):
i r m s = 1 M 2 sin 2 α 2 sin 2 ( φ α ) f o r    M 1 i r m s = sin 2 φ α 2 β 2 sin 2 ( φ α ) f o r    M > 1 .
By substituting (12) back into (11), the following optimized expression can be obtained (13):
i r m s = π 3 C o , p u 32 M cos ( φ α 2 β 2 ) f o r    M 1 i r m s = π 3 C o , p u M 32 cos ( α 2 ) f o r    M > 1 .
According to (13), it can be seen that I r m s can reach its minimum value with the conditions in (14). For buck mode, the secondary-side HF voltage v s becomes a square waveform due to φ α 2 β = 0 . With α = 0 , the primary-side HF voltage v p becomes a square waveform in boost mode.
φ α 2 β = 0 f o r    M 1 α = 0 f o r    M > 1
Under the conditions for minimizing the RMS tank current, the phasor triangle forms a right-angle triangle in both buck mode and boost mode. In buck mode, the resonant current i r is in phase with U s . Due to the optimal condition α = ϕ , the magnitude of U s reaches its maximum, for which the pulse width is π ϕ . In boost mode, the resonant current i r overlaps with U p , which indicates that β = 0 . Consequently, the magnitude of U p reaches its maximum.

4.2. Reactive Power Minimization

As highlighted by the red-colored area in Figure 2, the converter with two phase shifts may induce a duration of reactive power within each period during which the resonant current i r has polarity opposite to that of v p . Consequently, the RMS value of the resonant current becomes higher and the associated extra conduction loss leads to degraded efficiency. Therefore, our second optimization objective is to eliminate the reactive power through a phase-shift strategy. By checking the waveform in Figure 2, it is straightforward to align the rising edge (from 0 to positive) between v p and v s , which eliminates the reactive power duration twice in each period. On the basis of resonant current minimization, the condition of zero reactive power is presented in (15). The waveform without reactive power can be viewed in Figure 9.
φ = α = 2 β f o r    M 1 α = 2 β = 0 f o r    M > 1
Referring to (15), the converter gain M can be represented using only φ as follows (16):
M = cos φ + 1 2 f o r    M 1 M = 2 cos φ + 1 f o r    M > 1 .
Thus, the analytical solution of the phase shift for buck mode can be reformatted as (17)
φ = arccos ( 2 M 1 ) α = φ .
Under buck mode optimization, the output power range can be determined as follows (18):
0 P o , p u 8 M M M 2 π 2 X p u .
The other analytical solution of the phase shift is applicable for boost mode, as shown in (19):
φ = arccos ( 2 M M ) α = 0 .
Under boost mode optimization, the output power range can be determined as follows (20):
0 P o , p u 8 M 1 π 2 X p u .

4.3. Switching Behavior Evaluation

Soft-switching operation can ensure lower switching losses. Under the aforementioned optimization operation, to evaluate soft-switching operation of all active switches, the necessary condition is that the anti-parallel diode of the switch should be turned on prior to the drain-to-source channel of the switch. In this work, the necessary soft-switching conditions can be solved as (21) and the ZVS conditions as (22).
i r ( α ω s ) = 4 π X p u ( M 2 ( cos 2 φ 1 ) cos 2 φ + M sin φ cos 2 φ M 2 cos 2 φ ) 0 f o r S 1 i r ( φ ω s ) = 4 π X p u ( M 2 ( cos 2 φ 1 ) cos 2 φ M sin φ cos 2 φ M 2 cos 2 φ ) 0 f o r S 4 i r ( 0 ) = 4 π X p u ( 1 M cos 2 φ 1 M + sin φ 1 1 M 2 cos 2 φ ) 0 f o r S 5
It can be seen from Figure 2 that in order to achieve soft-switching operation in the primary-side switches ( S 1 S 4 ), the resonant current i r should be negative at the turn on instances of S 1 and S 4 (i.e., at t 0 for S 1 and t 1 for S 4 ). A negative i r is required to discharge the parasitic capacitance C 1 and C 4 , as well as to charge C 2 and C 3 , which ensures that their body diodes will begin to conduct before the turn-on gating signals are applied to S 1 and S 4 . For the secondary-side switches S 5 and S 6 , the resonant current i r needs to be positive at the turn-on instances of S 5 (i.e., at t 2 for S 5 ) in order to realize ZVS operation. Similarly, it can be deduced that i r should be positive at the turn-on instances of S 2 and S 3 and should be negative for that of S 6 . Thus, under the hybrid optimization strategy, soft-switching operation is evaluated for the resonant current i r ( ω s t ) at ω s t = t 0 , t 1 , t 2 using (21), and the necessary soft-switching conditions are provided by (22).
i r , s 1 0 0 i r , s 4 φ 0 φ α > β 0 i r , s 5 π 0
Although the necessary soft-switching conditions can ensure soft-switching operation in general case, these conditions are not sufficient for ZVS during boundary cases. The dead-band duration should be large enough to ensure that the instantaneous resonant current charges the parasitic capacitor of the outgoing leg switch and discharges the parasitic capacitor of the incoming leg switch. In addition, the secondary side switches S 5 , S 6 can turn on during zero-voltage operation, as i r is forced to flow in diode D 1 , D 2 naturally. Thus, the sufficient soft-switching condition for all switches can be obtained as follows (23):
t t + T D B i r ( ω s t ) d t Q D B
where Q D B is the total switching charge, determined by the total switch output capacitance and switch voltage, and T D B is the dead-band duration of the gating signal.
The transient switching behavior of each switch can be drawn as shown in Figure 10. To ensure zero-voltage operation, the resonant current charges the parasitic capacitor during T D B . Thus, the resonant current i r is expected to remain negative for S 1 , S 4 and positive for S 2 , S 3 . The critical boundary case is that the resonant current reaches zero at the end of T D B , especially for boost mode optimization α = 0 . To extend T D B , the gating signal of switch can be removed early, as shown in Figure 10. However, when T D B is larger than the necessary value, the reactive power of converter becomes large, especially for light load operation. Thus, it is necessary to have T D B with suitable duration to ensure soft-switching operation.

4.4. Loss Analysis

In electronic equipment, particularly power converters, the total loss refers to the power consumption generated when devices are in the on-state. For simplicity, the general expression for calculating the total loss can be represented as follows (24):
P l o s s = P c o n d + P s w + P c o r e
where P c o n d , P s w , and P c o r e are the conduction loss, switching loss, and total core loss, respectively.
As discussed in the previous section, with (17) and (19), the hybrid optimization strategy contributes to reduce current stress in the proposed Semi-SRDAB converter, consequently reducing the conduction loss as well. To perform loss analysis and modeling of the proposed converter, the conduction loss is calculated using (25):
P c o n d = I r 2 ( R X + R T ) + ( I r 2 ) 2 ( R o n , p + R o n , s )
where R X , R T , R o n , p , and R o n , s are the parasitic resistances of the resonant tank X p u , HF transformer winding, and primary-/secondary-side MOSFETs, respectively. The phasor from I r is provided by (7).
With switching behavior, it can be concluded that the switching losses of S 1 , S 2 , S 5 , and S 6 are negligible due to soft-switching operation. Thus, the switching loss is only considered for S 3 or S 4 in the soft-switching boundary cases, for which the switching loss is obtained as follows (26):
P s w = ( i p V p + i s V s ) ( T r + T f ) f s
where T r and T f are the respective rise and fall times of the current and voltage of the MOSFETs on both sides. As Figure 10 shows, the sufficient conditions (boundary case conditions) of soft-switching operation with our proposed strategy are T r = T f = T D B .
The core loss is usually related to the materials, and is provided by (27) [23]:
P c o r e = K f A l m ( ( Δ B T n T ) b + ( Δ B X n X ) b )
where K f is the basic loss coefficient, A l m is the volume, b is the magnetic core loss exponent (found in Table 1 and Table 2), and Δ B T and Δ B X are the respective magnetic flux densities of the HF transformer magnetic core and resonant magnetic core with actual turns n t and n X .
The total power loss obtained by solving (24) is compared with previous works that include FM, PSM, and variable-frequency phase-shift modulation. These comparisons are plotted in Figure 11 for buck mode and boost mode. It can be observed that our proposed hybrid optimization strategy consistently maintains the lowest total loss level across cases with different converter gain M. Both the proposed strategy and variable-frequency phase-shift modulation maintain soft-switching operation across the entire load range, implying that the switching loss has a dominant effect on the total power loss over a wide range of operating conditions. As expected, the proposed strategy effectively downgrades the current level, resulting in total losses that are lower than those in previous works. Meanwhile, the improvement becomes more apparent for medium and high load levels.

5. Design Procedure and Experimental Verification

5.1. Design Procedure

In this section, approximate parameters of a prototype are designed, including the converter gain M, rated switching frequency F, and rated resonant quality factor Q. The detailed specifications of the designed converter are listed in Table 1.
Table 1. Detailed specifications of the prototype converter.
Table 1. Detailed specifications of the prototype converter.
Parameters
Input voltage V i n 80 V∼120 V
Fixed output voltage V o u t 96 V
Turn ratio of transformer n t 1.05:1
Voltage gain M0.83∼1.25
Rated switching frequency f s 50 kHz
Rated power P r a t e d 300 W
The input voltage V i n changes from 80 V to 120 V, and an output voltage V o u t is fixed at 96 V as the normal battery voltage. For better performance, the unity converter gain is set at V i n = 100 V ( M = 1 ). The turn ratio of the transformer is n t = 1.05:1. Hence, the range of the converter gain M is M = 0.83∼1.25. The converter has a rated power P r a t e d = 300 W with a fixed switching frequency at f s = 50 kHz. The dead-band T D B is determined in detail as Q D B = 75 nC.
From (7), the rated resonant quality factor Q has an apparent impact on the resonant current and tank peak voltage, as depicted in Figure 12. Referring to Figure 12, with a smaller Q = 1.05 , the resonant current and tank peak voltage reaches its relative minimum. Here, Q is directly determined using the magnetic component size and switching frequency with inverse proportionality. Therefore, Q tends to take smaller values to avoid excessive current/voltage stress. In this work, Q is selected at 1.05 as the design point.
Under the required optimal conditions for resonant current optimization, reactive power minimization, and soft-switching operation, we cannot vary α and φ arbitrarily. Referring to (10), X p u can regulate output power P o , p u when the converter gain M, α , and φ are fixed. Varying the switching frequency effects on F manipulates the P o , p u ; thus, frequency modulation can overcome the restrictions, allowing the switching frequency f s to become a control variable. The range of the switching frequency f s can be expressed as (28), which is limited to twice at most:
F M a x F = N M a x + N M a x 2 + 4 N + N 2 + 4 = 2
where the constant N = cos α 2 sin ( φ α 2 β ) 2 M Q .
Implementation might be impractical with a wide range of switching frequency variations. Moreover, when F is far away from unity it not only restricts the operation region but also causes waveform distortion. It is assumed in frequency design that the maximum switching frequency F m a x is limited to twice the normalized switching frequency and that F m a x occurs at light load of the minimum voltage gain M = 0.83 .
The relationship between the resonant current and tank peak voltage with different rated switching frequencies F for fixed Q is displayed in Figure 13. It can be noted that a smaller F reveals a smaller resonant current and tank peak voltage. Hence, the initial F is selected at 1.25 as the design point. Then, with F = 1.25 and Q = 1.05 , the resonant tank specifications L r and C r are calculated following (29).
L r = n t 2 V o u t 2 Q F 2 π f s P r a t e d = 69.63 μ H C r = F P r a t e d 2 π f s Q n t 2 V o u t 2 = 56.84 n F

5.2. Experimental Verification

According to design procedure, a lab prototype of the Semi-SRDAB converter was built for validation. The experimental prototype converter layout was set up as shown in Figure 14. An EP4CE115F23I7N FPGA board from Altera was applied as the PWM generator to generate the gating signals of the converter. The switches on the H-bridge ( S 1 S 6 ) were implemented with IPP320N20N (200 V, 34 A, R d s = 32 m Ω , Q C , m a x = 55 nC at V d s = 250 V) from Infineon. All the diodes on the secondary side utilized MBR40250 (250 V, V F = 0.86 V). The resonant tank was composed with L r (67 μ H, martial: RM14) and C r (55 nF, martial: MKP). The HF transformer was made from an ETD49 ferrite core with a material type of N97. The actual turn ratio of the windings was 21:20 ( n t = 1.05:1) and the resulted magnetizing inductance was 3.75 mH. An EA 8360-15T bench power supply was used as the input DC source, and the load was a BK 8510 programmable DC electronic load. The details of the prototype implementation are listed in Table 2.
Table 2. Implementation details of the prototype.
Table 2. Implementation details of the prototype.
ComponentsImplementations
Control broadAltera EP4CE115F23I7N, FPGA
MOSFETs ( S 1 S 6 )IPP320N20N, 200 V, R d s = 32 m Ω
Diode ( D 1 , D 2 )MBR40250, 250 V, V F = 0.86 V
Actual L k 70 μ H, RM14
Actual C r 57 nF, MKP
HF transformerActual turns ratio 21:20, ETD49, N97
The closed-form control block diagram is depicted in Figure 15. The output voltage and output current are dynamically adjusted by a PI compensator which balances the input and output power. Concurrently, based on the PI results, the optimization is solved online to determine the phase shifts φ and α . These optimal phase shifts are then fed to a PWM generator, which produces the appropriate gating signals for the Semi-SRDAB converter.
The experimental waveforms in the optimized steady-state for different mode are depicted in Figure 16 and Figure 17. The prototype Semi-SRDAB converter was verified under optimization operations for different input voltages V i n = 80 V, 90 V, 110 V, and 120 V, which correspond to voltage gains M = 1.25, 1.11, 0.91, and 0.83, respectively. For each input voltage V i n , full load condition and 20% load condition were selected. Figure 16 illustrates the optimal steady-state experiment waveforms during buck mode operation and Figure 17 depict the same for boost mode operation. From top to bottom, the recorded waveforms are the input side voltage v p , output side voltage v s , resonant tank voltage v c r , and resonant current i r . All waveforms match the predicted optimization discussed in last section. Thus, the reactive power and resonant current are successfully minimized and soft-switching operation is maintained over the whole load range. The measured operating waveforms (especially v p , v s ) for different loads are similar, as they share the phase shifts ϕ and α with the same converter gain M. The difference is that the switching frequency is the design point at full load, as opposed to leaps in the case of light loads.
Figure 18 and Figure 19 show the details of the operating conditions associated with the switches for buck mode and boost mode. Soft-switching operation of all switches was observed by comparing its gate-source voltage V g s and drain-source voltage V d s together. Synchronization of the voltage across D a and the resonant current indicates soft-switching operation. Due to the measured waveforms being consistent for a fixed input voltage, the switching behavior with different load levels are similar; therefore, all switches realize soft-switching operation over the whole designed voltage gain range.
Important parameters measured during our experimental tests are summarized and compared with theoretical calculations for both conventional PSM and the proposed hybrid optimization strategy in Table 3. As expected, because our proposed strategy is optimized to minimize conversion losses, the losses under the proposed strategy are lower than those under conventional PSM, and the improvement becomes more apparent under partial load conditions. Additionally, the measured efficiency under the hybrid optimization strategy shows advantages over PSM due to low resonant current, zero reactive power, and soft-switching operation, particularly at light load conditions. Further comparisons based on the experimental measurements are visualized in Figure 20, Figure 21 and Figure 22 for both buck mode and boost mode.
Figure 20 compares the experimental peak resonant currents for the proposed hybrid optimization strategy and conventional phase shift modulation for different input voltages. As expected, the apparent improvement brought about by the proposed modulation provides a lower peak resonant current, especially when the gain is far away from unity. This is apparent in both buck mode and boost mode. In buck mode, Figure 20a shows that with conventional PSM the current at first declines with the decrease in load level, then increases in the light load region. With the hybrid optimization strategy, the current deceases as the load level falls. In boost mode, Figure 20b shows that the current is always lower than the PSM with the hybrid optimization strategy.
A measured efficiency comparison between the proposed optimization and previous phase-shift modulations is plotted in Figure 21. It can be seen that the efficiency of the proposed optimization method outperforms previous modulation approaches in both buck mode and boost mode over a wide range of variations. The optimization maximum efficiency of 95.1% is achieved at V i n = 110 V, and is kept over 91% in the experimental test even at light load the efficiency. The proposed optimization provides better conversion performance due to soft-switching operation, minimum RMS current, and zero reactive power. It can be concluded that both the RMS resonant current and the conversion efficiency are improved under the proposed optimization and that the overall improvement is valid for a variation of converter gains.
The measured total loss breakdowns for both buck mode and boost mode are shown in Figure 22. For simplicity, only the conduction loss, gate loss, switching loss, resonant core loss, and transformer loss were considered in the measurement tests. The conduction loss is caused by the loss from switches parasitic resistance, which is proportional to the resonant current. The resonant core loss and transformer loss are related to the windings, magnetic flux, switching frequency, core size, and materials. It can be clearly seen from the Figure 19 that the loss is mainly contributed by the transformer loss over the whole load range, while the changes in switching loss and gate loss are not significant. As an example, the detailed loss breakdown at V i n = 120 V is illustrated in Table 4. Although there may admittedly be some measurement errors in the loss breakdown, these do not adversely affect the conclusion that the proposed converter optimization works efficiently.
Finally, the topology and control strategy proposed in this work was compared with previous research. The comparison results are presented in Table 5. It is evident from the table that our approach provides significant advantages in aspects such as computational complexity, current stress, converter properties, and efficiency. These results indicate that the Semi-SRDAB converter and proposed hybrid optimization modulation method discussed in this work are suitable for a wide range of applications, offering the lowest current levels, a broad soft-switching range, and minimal control complexity. It can be concluded that the conversion efficiency under the proposed hybrid optimization strategy is improved compared to prior control methods and that the overall improvement is valid for a variety of converter gains.

6. Conclusions

In this work, a Semi-SRDAB converter with hybrid optimization strategy is proposed to improve performance for a wide range of applications. The proposed Semi-SRDAB converter applies a full-bridge inverter on the primary side and a hybrid full-bridge rectifier on the secondary side. The typical steady state of the Semi-SRDAB converter is analyzed in detail, including its typical operating waveform, switching intervals, resonant current characteristics, and output power characteristics. Based on the resonant current phasor analysis, we first identify the steady-state conditions of the Semi-SRDAB converter with optimized resonant current. On the basis of the proposed optimization strategy for minimizing the current, the reactive power is then mathematically eliminated and analytical solutions are derived for both buck mode and boost mode. The resulting optimal strategy ensures soft-switching operation for all of the switches. We designed and built a 300 W lab prototype to validate the proposed converter and hybrid optimization strategy. A maximum efficiency of 95.1% was reached at buck mode, and the conversion efficiency has remained above 91% in our experimental tests even at low loads. When frequency modulation is applied instead, the efficiency declines at light load levels due to additional switching loss. Therefore, overcoming the drawbacks of frequency modulation is a significant topic for future research and warrants further investigation. Additionally, proposing a switching scheme aimed at minimizing power losses is another major area for future work.

Author Contributions

Conceptualization, S.Z.; methodology, S.Z.; software, S.Z., J.H. and J.W.; validation, S.Z., J.H. and J.T.; formal analysis, S.Z., J.H. and J.T.; investigation, S.Z. and J.W.; resources, S.Z., J.T. and J.W.; data curation, S.Z., J.H., J.T. and J.W.; writing—original draft, S.Z. and J.H.; writing—review and editing, J.T.; visualization, J.H., J.T. and J.W.; project administration, J.W.; funding acquisition, S.Z. and J.T. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the GuangDong Basic and Applied Basic Research Foundation (No. 2022A1515111037) and by Science and Technology Projects in Guangzhou (No. 2023A04J2019).

Data Availability Statement

All data analyzed during this study are included in the published article. Further details on the data analyzed during the current study are available from the corresponding author on reasonable request.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. Schematic diagram of Semi-SRDAB converter.
Figure 1. Schematic diagram of Semi-SRDAB converter.
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Figure 2. Typical steady-state waveform of the Semi-SRDAB converter.
Figure 2. Typical steady-state waveform of the Semi-SRDAB converter.
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Figure 3. Equivalent circuit of interval 1 [ t 0 α ].
Figure 3. Equivalent circuit of interval 1 [ t 0 α ].
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Figure 4. Equivalent circuit of interval 2 [ α β ].
Figure 4. Equivalent circuit of interval 2 [ α β ].
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Figure 5. Equivalent circuit of interval 3 [ β φ ].
Figure 5. Equivalent circuit of interval 3 [ β φ ].
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Figure 6. Equivalent circuit of interval 4 [ φ π ].
Figure 6. Equivalent circuit of interval 4 [ φ π ].
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Figure 7. Time-domain equivalent circuit of the Semi-SRDAB converter with fundamental harmonics components.
Figure 7. Time-domain equivalent circuit of the Semi-SRDAB converter with fundamental harmonics components.
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Figure 8. Phasor analysis diagram with different converter gain M: (a) buck mode 0 < M 1 and (b) boost mode M > 1 .
Figure 8. Phasor analysis diagram with different converter gain M: (a) buck mode 0 < M 1 and (b) boost mode M > 1 .
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Figure 9. Typical waveform with optimal operation: (a) buck mode M 1 and (b) boost mode M > 1 .
Figure 9. Typical waveform with optimal operation: (a) buck mode M 1 and (b) boost mode M > 1 .
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Figure 10. The transient switching behavior of each switch.
Figure 10. The transient switching behavior of each switch.
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Figure 11. Comparison between proposed optimization, frequency modulation, phase-shift modulation, and variable-frequency phase-shift modulation with different converter gains M: (a) buck mode M = 0.9 and (b) boost mode M = 1.1 .
Figure 11. Comparison between proposed optimization, frequency modulation, phase-shift modulation, and variable-frequency phase-shift modulation with different converter gains M: (a) buck mode M = 0.9 and (b) boost mode M = 1.1 .
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Figure 12. (a) Normalized resonant current with respect to the converter gain at different Q for F = 1.20 and (b) normalized tank peak voltage with respect to the converter gain at different Q for F = 1.20 .
Figure 12. (a) Normalized resonant current with respect to the converter gain at different Q for F = 1.20 and (b) normalized tank peak voltage with respect to the converter gain at different Q for F = 1.20 .
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Figure 13. (a) Normalized resonant current with respect to the converter gain at different F for Q = 1.1 and (b) normalized tank peak voltage with respect to the converter gain at different F for Q = 1.1 .
Figure 13. (a) Normalized resonant current with respect to the converter gain at different F for Q = 1.1 and (b) normalized tank peak voltage with respect to the converter gain at different F for Q = 1.1 .
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Figure 14. Layout of the experimental Semi-SRDAB converter prototype.
Figure 14. Layout of the experimental Semi-SRDAB converter prototype.
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Figure 15. Closed-form implementation of the experimental prototype.
Figure 15. Closed-form implementation of the experimental prototype.
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Figure 16. Experimental waveforms of buck operation in optimization steady-state: (a) V i n = 110 V, M = 0.91 , P o = 300 W; (b) V i n = 110 V, M = 0.91 , P o = 100 W; (c) V i n = 120 V, M = 0.83 , P o = 300 W; (d) V i n = 120 V, M = 0.83 , P o = 100 W.
Figure 16. Experimental waveforms of buck operation in optimization steady-state: (a) V i n = 110 V, M = 0.91 , P o = 300 W; (b) V i n = 110 V, M = 0.91 , P o = 100 W; (c) V i n = 120 V, M = 0.83 , P o = 300 W; (d) V i n = 120 V, M = 0.83 , P o = 100 W.
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Figure 17. Experimental waveforms of boost operation in optimization steady-state: (a) V i n = 900 V, M = 1.11 , P o = 300 W; (b ) V i n = 90 V, M = 1.11 , P o = 100 W; (c) V i n = 80 V, M = 1.25 , P o = 300 W; (d) V i n = 80 V, M = 1.25 , P o = 100 W.
Figure 17. Experimental waveforms of boost operation in optimization steady-state: (a) V i n = 900 V, M = 1.11 , P o = 300 W; (b ) V i n = 90 V, M = 1.11 , P o = 100 W; (c) V i n = 80 V, M = 1.25 , P o = 300 W; (d) V i n = 80 V, M = 1.25 , P o = 100 W.
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Figure 18. Experimental waveforms of buck operation in optimization switching conditions: (a) V i n = 110 V, M = 0.91 , P o = 100 W, primary side; (b) V i n = 110 V, M = 0.91 , P o = 100 W, secondary side; (c) V i n = 120 V, M = 0.83 , P o = 100 W, primary side; (d) V i n = 120 V, M = 0.83 , P o = 100 W, secondary side.
Figure 18. Experimental waveforms of buck operation in optimization switching conditions: (a) V i n = 110 V, M = 0.91 , P o = 100 W, primary side; (b) V i n = 110 V, M = 0.91 , P o = 100 W, secondary side; (c) V i n = 120 V, M = 0.83 , P o = 100 W, primary side; (d) V i n = 120 V, M = 0.83 , P o = 100 W, secondary side.
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Figure 19. Experimental waveforms of boost operation in optimization switching conditions: (a) V i n = 90 V, M = 1.11 , P o = 100 W, primary side; (b) V i n = 90 V, M = 1.11 , P o = 100 W, secondary side; (c) V i n = 80 V, M = 1.25 , P o = 100 W, primary side; (d) V i n = 80 V, M = 1.25 , P o = 100 W, secondary side.
Figure 19. Experimental waveforms of boost operation in optimization switching conditions: (a) V i n = 90 V, M = 1.11 , P o = 100 W, primary side; (b) V i n = 90 V, M = 1.11 , P o = 100 W, secondary side; (c) V i n = 80 V, M = 1.25 , P o = 100 W, primary side; (d) V i n = 80 V, M = 1.25 , P o = 100 W, secondary side.
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Figure 20. Measured peak current for various converter gains M and different load levels: (a) peak current in buck mode and (b) peak current in boost mode.
Figure 20. Measured peak current for various converter gains M and different load levels: (a) peak current in buck mode and (b) peak current in boost mode.
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Figure 21. Measured efficiency for various converter gains M and different load levels: (a) efficiency in buck mode and (b) efficiency in boost mode.
Figure 21. Measured efficiency for various converter gains M and different load levels: (a) efficiency in buck mode and (b) efficiency in boost mode.
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Figure 22. Measured loss breakdown with proposed optimization: (a) loss breakdown in buck mode and (b) loss breakdown in boost mode.
Figure 22. Measured loss breakdown with proposed optimization: (a) loss breakdown in buck mode and (b) loss breakdown in boost mode.
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Table 3. Comparison of steady-state operation at V i n = 110 V.
Table 3. Comparison of steady-state operation at V i n = 110 V.
Load LevelPSM ( f s = 50 kHz)Hybrid Optimization Strategy ( φ = 35.1 ° )
ϕ (°) I peak (A) P loss (W) η (%) f s ( kHz ) I peak (A) P loss (W) η (%)
100%theor.74.354.25--50.04.06--
exp.78.44.418.6993.77%50.54.214.7395.09%
75%theor.55.863.17--52.292.42--
exp.58.13.515.1793.26%53.82.811.9194.71%
50%theor.11.893.03--59.462.23--
exp.7.63.311.1892.55%62.632.48.6794.21%
25%theor.−27.383.91--84.121.13--
exp.−33.24.087.9889.36%89.271.34.4794.04%
Table 4. Measured losses at V i n = 110 V.
Table 4. Measured losses at V i n = 110 V.
Load Percentage25%50%75%100%
Conduction loss 1.2 2.1 3.5 4.1
Gate loss 0.4 0.4 0.4 0.5
Switching loss 0.3 0.3 0.3 0.4
Resonant core loss 1.6 3.1 4.5 5.2
Transformer core loss 1.0 2.8 3.2 4.6
Totoal Loss 4.5 8.7 11.9 14.8
Table 5. Comparison with previous works.
Table 5. Comparison with previous works.
Proposed Modulation[15][16][18][11][21][18]
Voltage gainWideNarrowNarrowNarrowWideNarrowWide
Control variables3212323
Computational complexityLowLowMediumMediumMediumMediumMedium
Analytical solutionYesNoNoYesNoYesNo
Current levelLowHighHighMediumMediumMediumMedium
Reactive PowerNoYesNoYesYesNoYes
Soft-switching rangeFullNarrowNarrowMediumWideWideFull
Conduction lossLowHighHighMediumMediumMediumMedium
Switching lossLowMediumHighMediumMediumMediumMedium
Core lossLowMediumHighMediumMediumMediumLow
EfficiencyHighMediumMediumMediumMediumMediumHigh
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Zhou, S.; Huang, J.; Tang, J.; Wang, J. A Hybrid Optimization Strategy for Minimizing Conversion Losses in Semi-Series-Resonant Dual-Active-Bridge Converter. Symmetry 2024, 16, 1547. https://doi.org/10.3390/sym16111547

AMA Style

Zhou S, Huang J, Tang J, Wang J. A Hybrid Optimization Strategy for Minimizing Conversion Losses in Semi-Series-Resonant Dual-Active-Bridge Converter. Symmetry. 2024; 16(11):1547. https://doi.org/10.3390/sym16111547

Chicago/Turabian Style

Zhou, Shengzhi, Jianheng Huang, Jiahua Tang, and Jihong Wang. 2024. "A Hybrid Optimization Strategy for Minimizing Conversion Losses in Semi-Series-Resonant Dual-Active-Bridge Converter" Symmetry 16, no. 11: 1547. https://doi.org/10.3390/sym16111547

APA Style

Zhou, S., Huang, J., Tang, J., & Wang, J. (2024). A Hybrid Optimization Strategy for Minimizing Conversion Losses in Semi-Series-Resonant Dual-Active-Bridge Converter. Symmetry, 16(11), 1547. https://doi.org/10.3390/sym16111547

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