Power Factor Correction Application Based on Independent Double-Boost Interleaved Converter (IDBIC)

Round 1

Reviewer 1 Report

The article describes a topology based on the use of two Boost converters called "Independent Double-Boost Interleaved Converter (IDBIC)". The article is based on previous work describing the topology while in this case it is used as a PFC. The paper is well structured with adequate analysis, simulations, and experimental tests. The description of the experimental tests could be improved. In my opinion, a comparison with equivalent topologies is necessary to better understand the advantages and possible disadvantages of the topology impact on the panorama of PFC circuits.

The following points need to be improved.

1.     Specify in the text and recall figures 7a and 7b

2.     Correct all the subscripts of the electrical quantities referred to in the text of the article (they are not subscripts but have the normal size of the text)

3.     In section 4, better to write "Experimental Implementation" than "Practical Implementation"

4.     In the experimental section specify the type of transistors used (MOSFET, IGBT, or other) by introducing the electrical characteristics such as rated current, breakdown voltage, etc.

 

5.     To understand the validity of the topology used as a PFC, make a comparison (introducing a  section at the end of the paper, before the conclusions) with some equivalent topology to show the advantages and disadvantages of the proposed solution. The comparison may be done in a qualitative way, i.e. number of components, quality of waveforms, stress on devices, efficiency, fields of application, etc.

Author Response

1. We have specified in the text the 7a and 7b figures (Page 8 , row 181)
2. We have corrected this issue
3. We have changed to Experimental implementation.
4. We have entered the transistor characteristics (Page 10, row 198)
5. A comparison with similar approaches has been done and inserted in the paper ( Page 13, Table 1)

Reviewer 2 Report

The publication is well structured and presented. Both mathematical and simulation models and a real prototype have been made to confirm the analytical results. As a small remark, I would like to note that there is not enough evidence for the uniqueness of the proposed concept and comparisons with the results of such competing products.

Author Response

The novelty of the paper is presented in the paper on Page 2, rows 68-77, but we also added some new information regarding a comparison with similar approaches  ( Page 13, Table 1). 

 

Reviewer 3 Report

Revision is needed

The paperr dealt with the Power Factor Correction (PFC) application, based on the novel power stage topology named Independent Double-Boost Interleaved Converter (IDBI). 

1. weak Introduction.

2. CCM- continuous conduction mode- is not clear.

3. Please comment on the current controller, and why is not dealt with.

4. Figure 7, and Figure 8 current has a lot of ripple right?. Is it recommended this much current !!!

5. Figure 3. Switching stages for the proposed PFC converter. Individual mode caption is needed 

6. Comparison is needed with Existing converters

7. proposed converter output side capacitor C1 and C2 - What is the valuation observed ?. any the balancing mechanism did?

 

Author Response

1. It is unclear to us regarding the “weak introduction” observation. If it is the case of no sufficient comparison with similar approaches, we have added new information in this regard on Page 13, Table 1.
2. Please provide us with more information regarding what is unclear with the CCM operation.
3. The converter controller is a classic boost type PFC controller (Page 7, rows 161-162) and is presented in Figure 4 and Figure 5 and updated with our switching strategy that is presented in Figure 6.
4. You are right, the ripple is quite high for these applications, but the main objective of the paper was to demonstrate the working principle of the converter in all modes (CCM, BCM, and DCM). To highlight all these modes, we had to sacrifice the high current ripple. Future work is foreseen in optimizing the current ripple, switching behavior, control algorithm, PCB design, and passive component design.
5. Because we have situations when overlapping on the currents (IL1 and IL2) is achieved (the interleaved capability of the converter), we believe that individual representation of these currents will not be representative for these situations, since the input current at the Vin source is composed by the 2 currents.
6. A comparison with similar approaches has been done and inserted in the paper (Page 13, Table 1)
7. Since the 2 integrated boost converters work independently, both regulate individually the C1 and C2 voltages. For the same duty cycles imposed on the 2 integrated boost converters, the voltages across C1 and C2 will be the same, thus naturally balanced. The converter is also capable of working in an asymmetrical matter but is not the objective of the paper.

Round 2

Reviewer 1 Report

The authors answered adequately to review requests

Author Response

Thank you for your review!

Reviewer 3 Report

Still paper need a minor revision.

1. Abstract needs to be rewrite . state the novelty and uniqueness of the proposed work and converter  

2. Kindly address the DC link capacitor Balancing - Need for this topology 

   

Author Response

1. We updated the abstract with the requested information.
2. The C1 and C2 output voltage balancing are discussed in the paper (Page 10, rows 197-210). We have added some new information (Rows: 203-204) regarding the fact that no balancing mechanism is further needed because the 2 integrated boost converters are using the same control signal (Fig. 5 and Fig. 6), thus the C1 (the output of the upper boost converter ) and C2 (the output of the lower boost converter ) voltages are independently regulated at the same value. 

Thank you for your valuable review!