A Reconfigurable Single-/Dual-Bandstop Filter with Controllable Equal-Ripple Performance

Abstract

Bandstop filters (BSFs) have many applications in suppressing interference signals and shielding specific bands. Among them, reconfigurable BSFs that cover more frequency bands by switching modes have great research value. In this paper, a novel synthesis approach for compact reconfigurable BSFs with controllable equal-ripple performance is proposed. By switching the ON/OFF state of the positive intrinsic negative (PIN) diode, the proposed reconfigurable BSF can be switched between single-BSF (S-BSF) and dual-BSF (D-BSF). Based on the synthesis approach, the equal-ripple levels of stopband and passband for S-BSF and D-BSF can be independently controlled. To verify, the equal-ripple levels of stopband and passband for S-BSF state and D-BSF state are independently controlled in four groups of examples. Finally, a reconfigurable BSF with a miniaturized size is designed and fabricated. The fabricated reconfigurable BSF behaves with 15 dB and 10 dB return loss (RL) in two different passbands of the D-BSF state, and 25 dB bandpass RL and controllable stopband rejection (SR) for the S-BSF state. The measured results are in good agreement with the electromagnetic (EM) simulation results.

1. Introduction

Microwave passive filters have been widely used in wireless communication systems to eliminate noise and interference signals. With the swift development of radio frequency (RF) microwave technology, RF components are expected to achieve multiple functionalities while exhibiting a limited circuit size. Consequently, reconfigurable filters [1,2,3] have become a research hotspot, which can be, respectively, designed by positive intrinsic negative (PIN) diodes [2,4,5], micro-electro-mechanical system (MEMS) switches [6,7,8], and iron electrical devices [9,10,11], etc.

Recently, PIN-based reconfigurable filters have been favored by researchers because of their strong reconfigurability, low cost, and easy integration. For instance, a novel reconfigurable bandpass-bandstop filter is presented based on varactor-loaded closed-ring resonators [12]. Moreover, a switchable microstrip bandpass filter (BPF) is designed based on two switchable delay lines [13]. This switchable BPF can switch between the Chebyshev response and the quasi-elliptic-function response. However, the circuit analyses of the abovementioned reconfigurable filters have not been conducted, and their performance indexes cannot be controlled specifically.

In [2], a compact reconfigurable with a wide tuning range is presented, which can be switched between bandstop filter (BSF) and BPF and achieves a wide tuning range of frequency. Based on the parallel-coupled lines, a multifunctional switchable filter is proposed in [14]. This multifunctional switchable filter can switch between three different filtering states: BPF, dual-BPF (D-BPF), and BSF. In [15], an electronically reconfigurable stub topology-based BSF is presented, and the response of the BSF filter can be switched from single to dual-band. A bandpass filter with four switchable configurations is proposed based on two parallel-connected dual-band bandpass filters [16]. Recently, a novel multifunctional frequency-selective surface-based switchable absorber/reflector was demonstrated [17]. In the absence of ground and air spacers, it works as a spatial BPF and BSF, respectively. In these studies, the reconfigurable filters have been simply analyzed. However, there is still a lack of analysis to achieve arbitrary control of the performance index, which is essential to the application of the filter.

To fulfill the arbitrary control of the circuit performance, ref. [18] presents a switchable BPF for broadband, dual-band, and tri-band operations, and the relationship between bandwidths (BWs) and return losses (RLs) is analyzed by the proposed algorithm. Moreover, in our previous work, a reconfigurable BSF based on ring structure is proposed and exhibits two filtering states: single-BSF (S-BSF) and dual-BSF (D-BSF) [19]. The control of RL and stopband rejection (SR) is realized initially. However, the controlling mechanism is not detailed and verified. However, the detailed analysis of the proposed reconfigurable BSF is not given and the design theory for equal-ripple is not clear.

Based on [19], a synthesis approach to the reconfigurable BSF is newly introduced in this paper. By switching the ON/OFF state of the PIN diodes, the proposed reconfigurable BSF can be switched between S-BSF and D-BSF. Regarding the number of design parameters, the proposed reconfigurable BSF consists of five types of transmission lines with different characteristic impedances, providing five design parameters. Based on the proposed synthesis approach, the RL and SR of the S-BSF and the RLs for the two different passbands of the D-BSF can be independently controlled, which consumes four design conditions. Moreover, to eliminate the unexpected resonance appearing in the S-parameter response, another design condition needs to be satisfied. Therefore, based on the above-restricted conditions, unique solutions for the characteristic impedances satisfying specific RLs and SRs can be obtained. For verification, a prototype reconfigurable BSF is simulated, fabricated, and measured. In addition, the size of the circuit is miniaturized by bending the short stubs.

2. Design and Analysis of the Proposed Reconfigurable BSF

The topology of the proposed reconfigurable BSF proposed in [19] is shown in Figure 1, in which all the PIN diodes are marked as “Switch”, and characteristic impedances (Z₁, Z₂, Z₃, Z₄, and Z₅), and electrical lengths (θ) are labeled; θ = 90° at the center frequency f₀. In the single topology of the proposed reconfigurable BSF, two different filtering states (State I: S-BSF and State II: D-BSF) can be implemented by switching the ON/OFF state of the PIN diodes.

To facilitate the understanding of State I (S-BSF state) and State II (D-BSF state) mentioned above, the scheme of the general responses for S-parameters is demonstrated in Figure 2. For State I, ${\theta }_S^{S_{11}}$ and ${\theta }_S^{S_{21}}$ are, respectively, defined as the poles of S₁₁ and S₂₁ of the S-BSF. RL_S and SR_S are the return loss and the SR of the S-BSF, respectively. For State II, ${\theta }_{D_1}^{S_{11}}$ and ${\theta }_{D_2}^{S_{11}}$ are defined as the poles in the low passband and the center passband of S₁₁ for the D-BSF. RL_D1 and RL_D2 are the return loss of two different passbands of the D-BSF, respectively. SR_D is the SR level of the D-BSF. In this paper, the realizable range for the normalized characteristic impedance is defined from 0.4 Ω to 3 Ω. In the following design, SR_D is usually better than 20 dB in the realization range of characteristic impedances. Therefore, the suppression performance of the stopband can be implemented without deliberately controlling SR_D.

2.1. State I: S-BSF

From Figure 1, the proposed reconfigurable BSF behaves as an S-BSF state, when the two switches are turned to OFF state.

2.1.1. Design Equation of State I

Figure 3 exhibits the topologies of the even-mode and odd-mode equivalent circuits for State I. The step-by-step input impedances and the total input impedances for even-mode and odd-mode are indicated in Figure 3 and can be calculated as follows:

For the even mode, the input impedances of two step-impedance open stubs are represented by Z_ine(1) and Z_ine(2). Z_ine1 is defined as the total input impedance of the even-mode equivalent circuits. The abovementioned input impedances can be obtained by the following:

$$Z_{ine\left(1\right)}=\frac{-j{Z}_2{Z}_3+j{Z}_2\left(Z_2+Z_3\right){\sin }^2\theta }{\cos \theta \sin \theta \left(Z_2+Z_3\right)}$$

(1)

$$Z_{ine\left(2\right)}=\frac{-2j{Z}_1{Z}_4+j{Z}_1\left(Z_1+2Z_4\right){\sin }^2\theta }{\cos \theta \sin \theta \left(Z_1+2Z_4\right)}$$

(2)

$$Z_{ine1}=\frac{1}{j\frac{\cos \theta \sin \theta \left(Z_1+2Z_4\right)}{2Z_1{Z}_4-Z_1\left(Z_1+2Z_4\right){\sin }^2\theta }+j\frac{\cos \theta \sin \theta \left(Z_2+Z_3\right)}{Z_2{Z}_3-Z_2\left(Z_2+Z_3\right){\sin }^2\theta }}$$

(3)

Similarly, for the odd mode, Z_ino(1) and Z_ino(2) are defined as the input impedances of the step-impedance open stub and the step impedance short stub. The total input impedance of the odd-mode equivalent circuits is represented by Z_ino1. The abovementioned input impedances are expressed by the following:

$$Z_{ino\left(1\right)}=\frac{-j{Z}_2{Z}_3+j{Z}_2\left(Z_2+Z_3\right){\sin }^2\theta }{\cos \theta \sin \theta \left(Z_2+Z_3\right)}$$

(4)

$$Z_{ino\left(2\right)}=j{Z}_1\tan \theta =j{Z}_1\frac{\sin \theta }{\cos \theta }$$

(5)

$$Z_{ino1}=\frac{1}{j\frac{\cos \theta }{-Z_1\cos \theta }+j\frac{\cos \theta \sin \theta \left(Z_2+Z_3\right)}{Z_2{Z}_3-Z_2\left(Z_2+Z_3\right){\sin }^2\theta }}$$

(6)

Based on (1)–(6), the reflection coefficients of the odd-mode equivalent circuit ${\Gamma }_o^S$ and even-mode equivalent circuit ${\Gamma }_e^S$ can be, respectively, expressed as follows:

$${\Gamma }_o^S=\frac{Z_{in\mathrm{o}1}-Z_0}{Z_{in\mathrm{o}1}+Z_0}$$

(7)

$${\Gamma }_e^S=\frac{Z_{in\mathrm{e}1}-Z_0}{Z_{in\mathrm{e}1}+Z_0}$$

(8)

Then, the reflection and transmission coefficients $S_{11}^S$ and $S_{21}^S$ for State I can be obtained by the following:

$$S_{11}^S=\frac{{\Gamma }_e^S+{\Gamma }_o^S}{2}$$

(9)

$$S_{21}^S=\frac{{\Gamma }_e^S-{\Gamma }_o^S}{2}$$

(10)

In order to facilitate the analysis, the transfer function for State I F_S is defined as follows:

$$F_S=\frac{S_{11}^S}{S_{21}^S}=\frac{Z_{in\mathrm{e}1}{Z}_{ino1}-Z_0^2}{Z_{in\mathrm{e}1}-Z_{ino1}}=\frac{j\sin \theta \left(A_0+A_2{\cos }^2\theta +A_4{\cos }^4\theta +A_6{\cos }^6\theta \right)}{\left(A_1\cos \theta +A_3{\cos }^3\theta +A_5{\cos }^5\theta \right)}$$

(11)

where, A_i (i = 0, 1, …, 6) are the coefficients of the power term of F_S, and can be derived as follows:

$$A_0=2Z_1{Z}_2^4{Z}_4$$

(12)

$$A_1=2Z_1{Z}_2^4{Z}_4$$

(13)

$$\begin{array}{cc}{A}_2& =\left(3Z_2^4+2Z_2^3{Z}^3-Z_2^2-2Z_2{Z}_3-Z_3^2\right)Z_1^3+\left(2Z_4{Z}_2^4-2Z_2^3-2Z_3{Z}_2^2\right)Z_1^2\\ & +\left(-Z_2^4-2Z_4{Z}_2^3-2Z_3{Z}_4{Z}_2^2\right)Z_1-2Z_2^4{Z}_4\end{array}$$

(14)

$$A_3=- 4Z_1{Z}_2^3{Z}^4\left(Z_2+Z_3\right)$$

(15)

$$A_4=\left(Z_2+Z_3\right)\left(\begin{array}{l}2Z_1{Z}_2^3+2Z_1^3{Z}_2+2Z_1^3{Z}_3+4Z_2^3{Z}_4+4Z_1^2{Z}_2^2\\ -3Z_1^3{Z}_2^3-Z_1^3{Z}_2^2{Z}_3-4Z_1^2{Z}_2^3{Z}_4+2Z_1^2{Z}_2{Z}_3\\ +6Z_1{Z}_2^2{Z}_4+2Z_1^2{Z}_2{Z}_4+2Z_1^2{Z}_3{Z}_4+2Z_1{Z}_2{Z}_3{Z}_4\end{array}\right)$$

(16)

$$A_5=2Z_1{Z}_2^2{Z}_4{\left(Z_2+Z_3\right)}^2$$

(17)

$$A_6={\left(Z_2+Z_3\right)}^2\left(Z_1{Z}_2-Z_2-Z_1\right)\left(Z_1{Z}_2+Z_2+Z_1\right)\left(Z_1+2Z_4\right)$$

(18)

2.1.2. Design Approach of State I

To implement the arbitrary control of the equal-ripple level of S₁₁ for State I, the following equations should be satisfied:

$$\frac{\mathsf{\partial }\left|F_S\right|}{\mathsf{\partial }\theta }{|}_{\theta ={\theta }_S^{S_{11}}}=0$$

(19)

$$\left|F_S\right|{|}_{\theta ={\theta }_S^{S_{11}}}=\frac{1}{\sqrt{{10}^{R{L}_S/10}-1}}$$

(20)

where (19) enables ${\theta }_S^{S_{11}}$ to be employed as the pole of S₁₁ and (20) is used to set the ripple level corresponding to ${\theta }_S^{S_{11}}$ to RL_S.

Similarly, the following equations should be maintained for arbitrarily controlling the equal-ripple level of S₂₁ for State I:

$$\frac{\mathsf{\partial }\left|F_S\right|}{\mathsf{\partial }\theta }{|}_{\theta ={\theta }_S^{S_{21}}}=0$$

(21)

$$\left|F_S\right|{|}_{\theta ={\theta }_S^{S_{21}}}=\frac{1}{\sqrt{{10}^{S{R}_S/10}-1}}$$

(22)

where (21) enables ${\theta }_S^{S_{21}}$ satisfy the condition of the pole of S₂₁, and (22) is employed to ensure the ripple level corresponding to ${\theta }_S^{S_{21}}$ equalling to SR_S.

In addition, in the conduct of the actual design, the S-parameter response exhibits an unexpected resonance. This resonance can be eliminated while the characteristic impedances for State I satisfy the following equation:

$$Z_1=\frac{2Z_2{Z}_4}{Z_3}$$

(23)

By substituting (23) into (11), the highest power of the numerator and denominator of F_S decreases by 2. In terms of the number of design parameters, the proposed S-BSF in State I has four variable parameters (Z₁, Z₂, Z₃, and Z₄). A unique solution satisfying the desired performance (RL_S and SR_S) can be acquired by combining (19)–(23) and fixing a variable parameter. In State I, Z₃ is selected to be fixed.

2.1.3. Design Examples of State I

To verify the proposed theory for controlling equal-ripple levels of SR_S and RL_S, SR_S, and RL_S are selected as 20 dB and 25 dB. The variation curves of Z₁, Z₂, and Z₄ versus Z₃ are exhibited in Figure 4. The realizable range is marked by the gray area in Figure 4. It can be seen that Z₁ and Z₂ decrease, and Z₄ increases, as Z₃ increases.

To verify that Z₃ can be given arbitrarily with SR_S and RL_S fixed at 20 dB and 25 dB, three design examples are selected from Figure 4. The detailed design parameters of three examples are summarized in

Table 1. The design parameters for three design examples of State I. (SR_S = 20 dB and RL_S = 25 dB).

	Z1 (Ω)	Z2 (Ω)	Z3 (Ω)	Z4 (Ω)
Example I	2.9314	1.9270	0.6000	0.4564
Example II	2.1529	0.8939	1.2000	1.4450
Example III	2.0803	0.6733	1.8000	2.7807

, which verifies the changing trend of Z₁, Z₂, and Z₄ mentioned above. Figure 5 exhibits the circuit simulated results for three design examples. It can be seen that SR_S and RL_S are fixed at 20 dB and 25 dB, and the BW of the stopband becomes narrower with the increase of Z₃.

2.2. State II: D-BSF

As shown in Figure 1, when the PIN diodes are switched to ON state, the proposed reconfigurable BSF exhibits the D-BSF performance.

2.2.1. Design Equation of State II

The topologies of the even-mode and odd-mode equivalent circuits for State II are shown in Figure 6.

For the even mode, the input impedances of three step-impedance open stubs are represented by Z_ine(3), Z_ine(4), and Z_ine(5), where Z_ine(5) is consistent with Z_ine(1) and can be obtained by (1). Z_ine2 is defined as the total input impedance of the even-mode equivalent circuits. These input impedances can be calculated by the following:

$$Z_{ine\left(3\right)}=-j{Z}_5\cot \theta$$

(24)

$$Z_{ine\left(4\right)}=\frac{-2j{Z}_1{Z}_4+j{Z}_1\left(Z_1+2Z_4\right){\sin }^2\theta }{\cos \theta \sin \theta \left(Z_1+2Z_4\right)}$$

(25)

$$Z_{ine\left(5\right)}=Z_{ine\left(1\right)}$$

(26)

$$Z_{ine2}=\frac{1}{j\frac{\sin \theta }{Z_5\cos \theta }+j\frac{\cos \theta \sin \theta \left(Z_1+2Z_4\right)}{2Z_1{Z}_4-Z_1\left(Z_1+2Z_4\right){\sin }^2\theta }+j\frac{\cos \theta \sin \theta \left(Z_2+Z_3\right)}{Z_2{Z}_3-Z_2\left(Z_2+Z_3\right){\sin }^2\theta }}$$

(27)

Similarly, for the odd mode, Z_ino(3) and Z_ino(4) are defined as the input impedances of the step-impedance short stub, while Z_ino(5) is defined as the input impedance of the step impedance open stub. The total input impedance of the odd-mode equivalent circuits is represented by Z_ino2. These input impedances are expressed by the following:

$$Z_{ino\left(3\right)}=j{Z}_5\tan \theta =j{Z}_5\frac{\sin \theta }{\cos \theta }$$

(28)

$$Z_{ino\left(4\right)}=j{Z}_1\tan \theta =j{Z}_1\frac{\sin \theta }{\cos \theta }$$

(29)

$$Z_{ino\left(5\right)}=\frac{-j{Z}_2{Z}_3+j{Z}_2\left(Z_2+Z_3\right){\sin }^2\theta }{\cos \theta \sin \theta \left(Z_2+Z_3\right)}$$

(30)

$$Z_{ino2}=\frac{1}{j\frac{\cos \theta }{-Z_5\sin \theta }+j\frac{\cos \theta }{-Z_1\sin \theta }+j\frac{\cos \theta \sin \theta \left(Z_2+Z_3\right)}{Z_2{Z}_3-Z_2\left(Z_2+Z_3\right){\sin }^2\theta }}$$

(31)

The reflection coefficients for the odd-mode equivalent circuit ${\Gamma }_o^D$ and even-mode equivalent circuit ${\Gamma }_e^D$ can be obtained as follows:

$${\Gamma }_o^D=\frac{Z_{ino2}-Z_0}{Z_{ino2}+Z_0}$$

(32)

$${\Gamma }_e^D=\frac{Z_{ine2}-Z_0}{Z_{ine2}+Z_0}$$

(33)

The reflection and the transmission coefficients of the DBSF mode $S_{11}^D$ and $S_{21}^D$ can be obtained as follows:

$$S_{11}^D=\frac{{\Gamma }_e^D+{\Gamma }_o^D}{2}$$

(34)

$$S_{21}^D=\frac{{\Gamma }_e^D-{\Gamma }_o^D}{2}$$

(35)

In order to analyze conveniently, the ratio of $S_{11}^D$ to $S_{21}^D$ is defined as the transfer function for State II F_D, which can be expressed as follows:

$$F_D=\frac{S_{11}^D}{S_{21}^D}=\frac{Z_{in\mathrm{e}2}{Z}_{ino2}-Z_0^2}{Z_{in\mathrm{e}2}-Z_{ino2}}=\frac{j\sin \theta \left(B_0\cos \theta +B_2{\cos }^3\theta +B_4{\cos }^5\theta +B_6{\cos }^7\theta \right)}{\left(B_1+B_3{\cos }^2\theta +B_5{\cos }^4\theta +B_7{\cos }^6\theta \right)}$$

(36)

where B_j (j = 0, 1, …, 7) are the coefficients for the power terms of F_D, and can be deduced by the following:

$$B_0=-Z_1^2{Z}_2^2\left(Z_1{Z}_2^2{Z}_5^2-Z_2^2{Z}_5-Z_1{Z}_2^2-Z_1{Z}_2{Z}_5-Z_1{Z}_3{Z}_5\right)$$

(37)

$$B_1=-Z_1^3{Z}_2^4{Z}_5$$

(38)

$$\begin{array}{cc}{B}_2& =\left(\begin{array}{l}3Z_2^4{Z}_5^2-3Z_2^4+2Z_2^3{Z}_3{Z}_5^2-2Z_2^3{Z}_3-4Z_2^3{Z}_5-5Z_2^2{Z}_3{Z}_5\\ -Z_2^2{Z}_5^2-Z_2{Z}_3^2{Z}_5-2Z_2{Z}_3{Z}_5^2-Z_3^2{Z}_5^2\end{array}\right)Z_1^3\\ & +\left(\begin{array}{l}2Z_2^4{Z}_4{Z}_5^2-4Z_2^4{Z}_5-2Z_2^3{Z}_5^2-2Z_2^2{Z}_3{Z}_5^2-2Z_2^4{Z}_4-2Z_2^3{Z}_3{Z}_5\\ -2Z_2^3{Z}_4{Z}_5-2Z_2^2{Z}_3{Z}_4{Z}_5\end{array}\right)Z_1^2\\ & +\left(-Z_2^4{Z}_5^2-4Z_2^4{Z}_4{Z}_5-2Z_2^3{Z}_4{Z}_5^2-2Z_2^2{Z}_3{Z}_4{Z}_5^2\right)Z_1-2Z_2^4{Z}_4{Z}_5^2\end{array}$$

(39)

$$B_3=Z_1{Z}_2^4{Z}_5\left(Z_1^2+2Z_1{Z}_4+2Z_4{Z}_5\right)+2Z_1^3{Z}_2^3{Z}_5\left(Z_2+Z_3\right)$$

(40)

$$B_4=\left(Z_2+Z_3\right)\left(\begin{array}{l}3Z_1^3{Z}_2^3+Z_1^3{Z}_2^2{Z}_3+4Z_1^2{Z}_2^3{Z}_4+2Z_1{Z}_2^3{Z}_5^2+5Z_1^2{Z}_2^3{Z}_5\\ +2Z_1^3{Z}_2{Z}_5^2+5Z_1^3{Z}_2^2{Z}_5+2Z_1^3{Z}_3{Z}_5^2+4Z_2^3{Z}_4{Z}_5^2\\ +4Z_1^2{Z}_2^2{Z}_5^2-3Z_1^3{Z}_2^3{Z}_5^2+3Z_1^3{Z}_2{Z}_3{Z}_5+8Z_1{Z}_2^3{Z}_4{Z}_5\\ +2Z_1^2{Z}_2{Z}_3{Z}_5^2+Z_1^2{Z}_2^2{Z}_3{Z}_5+6Z_1{Z}_2^2{Z}_4{Z}_5^2\\ +2Z_1^2{Z}_2{Z}_4{Z}_5^2+6Z_1^2{Z}_2^2{Z}_4{Z}_5+2Z_1^2{Z}_3{Z}_4^4{Z}_5^2\\ -Z_1^3{Z}_2^2{Z}_3{Z}_5^2-4Z_1^2{Z}_2^3{Z}_4{Z}_5^2+2Z_1{Z}_2{Z}_3{Z}_4{Z}_5^2\\ +2Z_1^2{Z}_2{Z}_3{Z}_4{Z}_5\end{array}\right)$$

(41)

$$B_5=-Z_1{Z}_2^2{Z}_5\left(Z_2+Z_3\right)\left(3Z_1^2{Z}_2+Z_1^2{Z}_3+4Z_1{Z}_2{Z}_4+4Z_2{Z}_4{Z}_5\right)$$

(42)

$$\begin{array}{c}{B}_6={\left(Z_2+Z_3\right)}^2\left(Z_1{Z}_2+Z_1{Z}_5+Z_2{Z}_5+Z_1{Z}_2{Z}_5\right)\\ \left(Z_1{Z}_2{Z}_5-Z_1{Z}_5-Z_2{Z}_5-Z_1{Z}_2\right)\left(Z_1+2Z_4\right)\end{array}$$

(43)

$$B_7=Z_1{Z}_2^2{Z}_5{\left(Z_2+Z_3\right)}^2\left(Z_1^2+2Z_1{Z}_4+2Z_4{Z}_5\right)$$

(44)

2.2.2. Design Approach of State II

To arbitrarily control the equal-ripple level of S₁₁ in the low-frequency passband of State II, the following equations should be maintained:

$$\frac{\mathsf{\partial }\left|F_D\right|}{\mathsf{\partial }\theta }{|}_{\theta ={\theta }_{D1}^{S_{11}}}=0$$

(45)

$$\left|F_D\right|{|}_{\theta ={\theta }_{D1}^{S_{11}}}=\frac{1}{\sqrt{{10}^{R{L}_{D1}/10}-1}}$$

(46)

where (45) enables ${\theta }_{D1}^{S_{11}}$ to satisfy the condition of the pole of S₁₁, and (46) is used to set the ripple level corresponding to ${\theta }_{D1}^{S_{11}}$ to RL_D1.

Similarly, the arbitrary control of the equal-ripple level for S₁₁ in the center passband of State II can be implemented by following equations:

$$\frac{\mathsf{\partial }\left|F_D\right|}{\mathsf{\partial }\theta }{|}_{\theta ={\theta }_{D2}^{S_{11}}}=0$$

(47)

$$\left|F_D\right|{|}_{\theta ={\theta }_{D2}^{S_{11}}}=\frac{1}{\sqrt{{10}^{R{L}_{D2}/10}-1}}$$

(48)

where (47) enables ${\theta }_{D2}^{S_{11}}$ to be employed as the pole of S₁₁, and (48) is used to set the ripple level corresponding to ${\theta }_{D2}^{S_{11}}$ to RL_D2.

In addition, the same as in State I, (23) also needs to be satisfied to eliminate the unexpected resonance in State II, and the highest power of the numerator and denominator of F_D decreases by 2. In light of the number of design parameters, the D-BSF for State II has five design parameters (Z₁, Z₂, Z₃, Z₄, and Z₅). A unique solution achieving the desired RL_D1 and RL_D2 can be obtained by combining (23) and (45)–(48) and fixing two design parameters. In the following design, Z₃ and Z₅ are chosen to be fixed.

2.2.3. Design Examples of State II

Figure 7 illustrates the altering curves of Z₁, Z₂, and Z₄ versus Z₃ with Z₅ fixed as 3.0 Ω, 2.5 Ω, and 2.0 Ω, respectively, under the condition of RL_D1 = 10 dB and RL_D2 = 15 dB. The realizable range is marked by the gray area. As exhibited in Figure 7, under the condition of fixed Z₅, as Z₃ increases, Z₁ and Z₂ decreases and increases, respectively, while Z₄ first decreases and then increases. In addition, the inflection point in the changing trend of Z₃ shifts to the right as Z₅ decreases. To verify the abovementioned designing theory, three design examples are selected from Figure 7. The corresponding design parameters and S-parameters are summarized in

Table 2. The design parameters for three examples of State II. (RL_D1 = 10 dB and RL_D2 = 15 dB).

	Z1 (Ω)	Z2 (Ω)	Z3 (Ω)	Z4 (Ω)	Z5 (Ω)
Example IV	1.6343	0.8807	3.0000	2.7834	3.000
Example V	1.8705	0.9323	2.500	2.5080	2.500
Example VI	2.3683	1.0213	2.0000	2.3189	2.000

and Figure 8, respectively.

2.3. Total Analysis of the Proposed Reconfigurable BSF

2.3.1. Design Approach of the Proposed Reconfigurable BSF

The proposed reconfigurable BSF has five variable parameters (Z₁, Z₂, Z₃, Z₄, and Z₅), and five restricted conditions (19)–(23) and (45)–(48) need to be maintained to implement the reconfigurable performance with specific SR_S, RL_S, RL_D1 and RL_D2. Therefore, a unique solution satisfying the specific performance can be obtained.

2.3.2. Design Examples of the Proposed Reconfigurable BSF

To further verify the proposed synthesis approach, SR_S, RL_S, RL_D1, and RL_D2 are independently controlled in the following examples, respectively.

• Example A With Controllable SR_S

Maintaining RL_D1 = 10 dB, RL_D2 = 15 dB, and RL_S = 25 dB, SR_S is selected as 16 dB, 18 dB, and 20 dB, respectively, and the corresponding variable parameters are ensured and summarized in

Table 3. The design parameters for Example A₁, Example A₂, and Example A₃. (RL_D1 = 10 dB, RL_D2 = 15 dB, and RL_S = 25 dB).

	SRS (dB)	Z1 (Ω)	Z2 (Ω)	Z3 (Ω)	Z4 (Ω)	Z5 (Ω)
Example A1	16.0000	1.7119	0.9313	2.8948	2.6605	2.7201
Example A2	18.0000	1.8881	0.8050	2.1564	2.5290	2.7899
Example A3	20.0000	2.0878	0.7025	1.6618	2.4695	2.8860

. The circuit simulation results of corresponding S-parameters for the three examples (Example A₁, Example A₂, and Example A₃) are demonstrated in Figure 9.

2.

Example B With Controllable RL_S

Maintaining RL_D1 = 10 dB, RL_D2 = 15 dB, and SR_S = 20 dB, RL_S is set as 25 dB, 27 dB, and 29 dB, respectively, and the corresponding variable parameters are ensured and summarized in

Table 4. The design parameters for Example B₁, Example B₂, and Example B₃. (RL_D1 = 10 dB, RL_D2 = 15 dB, and SR_S = 20 dB).

	RLS (dB)	Z1 (Ω)	Z2 (Ω)	Z3 (Ω)	Z4 (Ω)	Z5 (Ω)
Example B1	25.0000	2.0879	0.7025	1.6618	2.4695	2.8860
Example B2	27.0000	2.1326	0.7253	1.6540	2.4317	2.7571
Example B3	29.0000	2.1710	0.7447	1.6494	2.4041	2.6586

. The circuit simulation results of corresponding S-parameters for the three examples (Example B₁, Example B₂, and Example B₃) are demonstrated in Figure 10.

3.

Example C With Controllable RL_D1

Maintaining RL_D2 = 15 dB, RL_S = 25 dB, and SR_S = 20 dB, RL_D1 is set as 10 dB, 12 dB, and 14 dB, respectively, and the corresponding variable parameters are ensured and summarized in

Table 5. The specific circuit parameters for Example C₁, Example C₂, and Example C₃. (RL_D2 = 15 dB, RL_S = 25 dB, and SR_S = 20 dB).

	RLD1 (dB)	Z1 (Ω)	Z2 (Ω)	Z3 (Ω)	Z4 (Ω)	Z5 (Ω)
Example C1	10.0000	1.8881	0.8050	2.1564	2.5290	2.7900
Example C2	12.0000	1.8714	0.7233	2.7386	3.5428	3.754
Example C3	14.0000	1.8620	0.6676	3.5366	4.9323	5.1080

. The circuit simulation results of corresponding S-parameters for the three examples (Example C₁, Example C₂, and Example C₃) are demonstrated in Figure 11.

4.

Example D With Controllable RL_D2

Maintaining RL_D1 = 10 dB, RL_S = 25 dB, and SR_S = 20 dB, RL_D2 is set as 15 dB, 17 dB, and 19 dB, respectively, and the corresponding variable parameters are ensured and summarized in

Table 6. The specific circuit parameters for Example D₁, Example D₂, and Example D₃. (RL_D1 = 10 dB, RL_S = 25 dB, and SR_S = 20 dB).

	RLD2 (dB)	Z1 (Ω)	Z2 (Ω)	Z3 (Ω)	Z4 (Ω)	Z5 (Ω)
Example D1	15.0000	2.0879	0.7025	1.6618	2.4695	2.8860
Example D2	17.0000	2.0958	0.7308	1.5551	2.2299	2.9093
Example D3	19.0000	2.1036	0.7568	1.4745	2.0494	2.9312

. The circuit simulation results of corresponding S-parameters for the three examples (Example D₁, Example D₂, and Example D₃) are demonstrated in Figure 12.

2.3.3. Discussion for the Realization of the Proposed Reconfigurable BSF

From Figure 10, Figure 11, Figure 12 and Figure 13, it can be seen that the equal-ripple level for State I (RL_D1 and RL_D2) and State II (SR_S and RL_S) can be independently controlled. Furthermore, to discuss the specific realization of the proposed reconfigurable BSF, RL_D1, RL_D2, and RL_S are fixed as 10 dB, 15 dB, and 25 dB, respectively. The changing curves of variable parameters (Z₁, Z₂, Z₃, Z₄, and Z₅) and SR_D versus SR_S are shown in Figure 13. It can be seen that the Z₁, Z₃, and Z₅ increase with the increase of SR_S, and Z₂ and Z₄ decrease with the increase of SR_S. Under the condition id achievable range of characteristic impedance, SR_S can be set from 15 dB to 21.5 dB. A set of variable parameters in this range can be selected for the actual circuit fabrication.

3. Experimental Results

In the experiment, a prototype circuit (Example A₃) is selected to be fabricated on Rogers RT/5880 substrate by the printed circuit board (PCB) producing method. In order to implement the miniaturization, two short stubs, composed of Z₂ and Z_3, in series are bent. Figure 14 shows the layout and the photograph of the fabricated reconfigurable BSF. It can be seen that the size of the fabricated circuit is significantly reduced compared with the size of the previous work [19]. The measurement of the fabricated circuit is conducted by Keysight PNA N5227B, which is calibrated in the range of 0.010 to 3.000 GHz with a step frequency of 0.001 GHz. The corresponding circuit simulation, EM simulation, and measured results are summarized and compared in Figure 15 and

Table 7. The key performance of the circuit simulation, EM simulation, and measured results of S-parameters for the miniaturized reconfigurable BSF.

Key Performance	Circuit Simulation	EM Simulation	Measured
RLS (dB)	25.000	27.18	23.100
SRS (dB)	20.000	17.53	17.500
RLD1 (dB)	10.000	10.37	10.000
RLD2 (dB)	15.000	13.06	16.400
SRD (dB)	34.300	33.31	33.200
BW@RLS (GHz)	0.258	0.237	0.275
BW@SRS (GHz)	1.478	1.572	1.594
BW@RLD1 (GHz)	0.489	0.480	0.480
BW@RLD2 (GHz)	0.346	0.370	0.317
BW@SRD (GHz)	0.237	0.254	0.265

. BW@RL_S, BW@SR_S, BW@RL_D1, BW@RL_D2, and BW@SR_D are the absolute BW corresponding to each ripple level (RL_S, SR_S, RL_D1, RL_D2, and SR_D). The measured results meet well with the simulation results.

For State I, the proposed reconfigurable BSF has four transmission poles and three transmission zeros in the passband and stopband, and the SR_S and RL_S are better than 17.5 dB and 23.1 dB, respectively. For State II, the proposed reconfigurable BSF exhibits seven transmission poles and four transmission zeros in the passband and stopband, respectively. RL_D1 and RL_D2 are controlled below 10 dB with an SR_D better than 23.1 dB.

A comparison between the proposed reconfigurable BSF and recent studies is summarized in

Table 8. Comparison between the proposed reconfigurable BSF and recent studies.

Ref.	Reconfigurable Performance	Response	Number of Diodes	Synthesis Design of Equal-Ripples
[20]	No	BSF	-	No synthesis design approach of PB *
[21]	No	BSF	-	No synthesis design approach
[14]	Yes	BPF/DBPF */BSF	6	No synthesis design approach
[22]	Yes	NBPF */WBPF */BSF	6	No synthesis design approach
[23]	Yes	DBPF/DBSF *	7	No synthesis design approach
This work	Yes	SBSF */DBSF	2	Synthesis equal-ripple design of PB and SB *

* NBSF: Narrow BSF; WBSF: Wide BSF; DBPF: Dual BPF; DBSF: Dual BSF; SBSF: Single BSF; PB: Passband; SB: Stopband.

. It can be seen that the proposed reconfigurable BSF has the following advantages: (1) Based on the proposed synthesis approach, the equal-ripple levels for the passband and the stopband can be independently controlled for the S-BSF and D-BSF. (2) Two different states can be realized with fewer diodes.

4. Discussion

In this paper, a novel synthesis approach for compact reconfigurable BSF is proposed. The switch between two filtering states (S-BSF and D-BSF) is realized by switching the ON/OFF state of PIN diodes. The proposed reconfigurable BSF is composed of five types of characteristic impedances, providing five design parameters. Based on the proposed synthesis approach, independent control over the RL and SR of the S-BSF, and the RLs for the two different passbands of the D-BSF is realized, which consumes four restricted conditions. In addition, another restricted condition needs to be met to eliminate the unexpected resonance. Consequently, unique solutions for the characteristic impedances that simultaneously satisfy the specific RL and SR of S-BSF and the specific RLs of D-BSF can be obtained. To validate the proposed synthesis approach, a prototype reconfigurable BSF with a miniaturized size was fabricated and measured. The measured results met well with the simulation results, which verified the correction of the proposed theory. In our future works, we will focus on designing a modified topology to further implement the arbitrary control of the BW and more efficiently employ the limited spectrum resources.