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Review

Development Status of Key Technologies for Optoelectronic Integrated Circuit Manufacturing

by
Mengjie Liang
1,*,
Ji Fang
1,*,
Dunkui Chen
1,
Lang Chen
1,
Lingling Peng
1,
Chi Zhang
1,
Yingchun Chen
1 and
Xiang Lu
2,*
1
Library, Huazhong University of Science & Technology, Wuhan 430074, China
2
Hubei Engineering Research Center for Biomaterials and Medical Protective Materials, Huazhong University of Science & Technology, Wuhan 430074, China
*
Authors to whom correspondence should be addressed.
Appl. Sci. 2024, 14(17), 8073; https://doi.org/10.3390/app14178073
Submission received: 9 July 2024 / Revised: 19 August 2024 / Accepted: 21 August 2024 / Published: 9 September 2024
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Abstract

:
Optoelectronic integrated circuit (OEIC) technology has attracted considerable research attention. Studies have achieved numerous breakthroughs in the basic scientific problems, key technologies, demonstration applications, and industrial promotions of OEIC. This study details the technical process, development status, existing problems, and future research trends of the design, manufacturing, and packaging of OEIC to provide a systematic summary of OEIC technology.

1. Introduction

In 1972, the California Institute of Technology in the United States proposed optoelectronic integration [1]. With the continuous development of technology, optoelectronic integrated circuits are being considered for use in photonic technology and microelectronics technology to integrate photonic devices and electronic devices on the same substrate [2,3,4]. In 1979, Ury and Yariv achieved the monolithic integration of a semiconductor laser and a field-effect transistor (FET) drive device [5]. In 1980, Leheny from Bell Labs realized the monolithic integration of a PIN photodiode and FET [6]. In 1982, Carter et al. achieved the monolithic integration of light-emitting diodes (LEDs), detectors, waveguides, resistors, and FETs in the GaAlAs/GaAs multilayer structure [7]. Since then, optoelectronic integrated circuits have been developed rapidly, and their constituent materials, application processes, and integrated devices have changed frequently, leading to several extensive application fields (Figure 1) of national economic and social development, including network communication, computer, consumer electronics, automotive electronics, transportation, military, and medical industry [2,8,9,10,11,12,13,14,15]. With the increasing trend of optoelectronic integration, optoelectronic integrated circuits have attracted considerable research attention for extending Moore’s law [16,17,18].
Optoelectronic integrated circuit technology is based on optoelectronic technology and microelectronic technology and is used to control optoelectronic integrated circuits, which can control not only the direction of the current within each integrated component, but also the direction of photons to ensure that they flow in a certain direction [19]. Using GaAs, InP, and Si [20,21,22], novel materials and processes have been developed to fabricate light, stable, low-power-consumption, and fast-operation optoelectronic integrated circuits [23]. This study elaborates on the corresponding technological progress from the design, manufacturing, and packaging of the optoelectronic integrated circuit technology chain.

2. Design of Optoelectronic Integrated Circuits

Because the optoelectronic integrated circuit contains optoelectronic devices in addition to the macro-module circuit of the integrated circuit, the circuit transmits not only electrical signals but also optical signals, which render the design of optoelectronic integrated circuits complex, resulting in diversified design indicators and indistinct design levels and complex topology, among others [24]. Therefore, computer-aided software is necessary to help the design of optoelectronic integrated circuits. The design software of optoelectronic integrated circuits is categorized into three classes, namely, chip design aid software, programmable chip design aid software, and system design aid software, including Protel 99SE, PSPICE 17.2, multiSIM10, OrCAD 17.4, PCAD X4.6.2, LSILogic LSI2032, MicroSim V8.0, ISE14.7, and modelsim 2020.4 SE.
Functionally, optoelectronic integrated circuits can be categorized into the following classes: photoelectric conversion, electro-optical conversion, and optical control circuits [25]. Photoelectric conversion converts optical information to electrical information. The optical signal is converted into an electrical signal by a detector and is subsequently processed by amplifiers, consisting of a photodetector, a transistor amplifier, and a bias circuit. Photodetectors require high speed, high sensitivity, high responsiveness, low noise, small capacitance, and easy integration. Studies have focused on the development of transistor amplifiers with high transconductance, high transimpedance, high current gain cut-off frequency, and maximum oscillation frequency. Electro-optical conversion in a circuit converts electrical information to optical information. These circuits consist of an LED, a driving circuit, and a bias circuit. The optical transmitter device is composed of a laser diode (LD), LED, and driving circuit. Studies have focused on the integration of high-rate LD and driver circuits. Optical control circuits consist of guided wave optical circuits, optical isolators, optical modulators, optical switches, optical filters, and other active and passive optical devices connected with intelligent control circuits, such as modulation, amplifier, and temperature field control circuits to guide the optical signal in the optoelectronic integrated circuit for superior integration and interconnection with the optical transmitter module and optical receiver module.

3. Manufacturing of Optoelectronic Integrated Circuits

3.1. Manufacturing Process

Generally, the manufacturing process of optoelectronic integrated circuits is similar to the manufacturing process of integrated circuits and typically includes photomask and mask fabrication, wafer growth, slicing, grinding, oxidation, lithography, etching, diffusion, ion implantation, chemical vapor deposition, and electrode metal vaporization [26]. The following sections detail mask fabrication, imaging, and resistivity control. Mask fabrication through physical vapor deposition, chemical vapor deposition, and vapor phase epitaxy are used to fabricate silicon dioxide, polysilicon, silicon nitride, metal silicide, and metal films. Imaging formation is used in photolithography and etching technology, and the required patterns are formed on various thin-film materials through glue dumping (positive glue and negative glue), exposure, development, etching, and glue removal. Lithography is one of the most critical procedures in the manufacturing process of optoelectronic integrated circuits, requiring a highly technical process, and is one of the neck-locking technologies for optoelectronic integrated circuit manufacturing in China. Etching technology can be categorized into dry etching and wet etching. Of these methods, the wet etching process is simple, exhibits a high etching rate, and has high selectivity. Compared with the conventional wet etching degumming method, the dry etching degumming method exhibits a high etching rate and high reliability. However, because of the high etch rate, even small changes in process parameters can cause large fluctuations in the etch rate. Currently, the resistivity of the material or the local impurity type is typically changed through diffusion and ion implantation to control the resistivity of the material and to facilitate the next step of fabrication.

3.2. Integration Method

According to the integration method (technology), optoelectronic integrated circuits can be categorized into two types, namely, monolithic integration and hybrid integration [27,28]. Monolithic integration is the direct growth of specific materials on substrate materials to integrate multiple optical and electrical components. Hybrid integration involves transferring independent optoelectronic components to the substrate material for interconnection through a certain process. From the comparison in Table 1, monolithic integration and hybrid integration exhibit distinct advantages. Because hybrid integration technology was developed earlier, the process is more mature, and the combination is flexible. Monolithic integration incorporates processes, reduces volume, improves integration, and reduces the effect of component interconnection. Monolithic integration technology exhibits advantages in terms of performance, cost, and mass production and is critical for the development of optoelectronic integration [29].
Electrical integration technology should focus on the compatibility of manufacturing technology and the cross-integration with other disciplines. Existing optoelectronic integrated materials include lithium niobate (LiNbO3), silicon-on-insulator (Si), silicon dioxide (SiO2), silicon nitride (Si3N4), optical glass, polymers, and III–V semiconductor materials [30,31], which exhibit distinct properties (Table 2). Lithium niobate exhibits excellent electro-optical modulation properties, polymeric materials require simple processing, and silicon materials allow for large-scale integration. For the development of optoelectronic integrated circuits, various materials should be devised to complete the system integration. In 2017, Datta et al. [32] replaced the conventional optoelectronic integrated materials with materials mixed with graphene and silicon nitride and produced optoelectronic modulators with enhanced optical models, superior modulation efficiency, and considerably reduced functional consumption. Regardless of the materials in optoelectronic integrated circuits, they exhibit optical loss when integrated on a large scale. Therefore, in the future, the development of optoelectronic integrated circuits should focus on reducing the energy consumption required for optical transmission.

3.2.1. Monolithic Integration

Since Ury and Yariv realized monolithic integration in 1979 [5], monolithic integration has continued. Currently, monolithic integration solutions are heterogeneous epitaxial lasers on Si materials or III–V materials, and the integration processes are typically Butt-joint regrowth technology, bias quantum well technology, and quantum well mixing technology [32,33,34,35,36,37,38]. Among them, silicon-based monolithic integration incorporates Si CMOS manufacturing technology on the same silicon wafer to integrate multiple components for realizing the transmission and processing of multiple optical signals on the same chip. InP-based monolithic integration technology is mature. The energy band structure of quantum wells is changed on InP material substrates through quantum well mixing technology, docking growth technology, same active region method, and selected region epitaxy technology to realize the integration of optoelectronic components with various functions. In 1989, Kouping invented a monolithic integrated transceiver for III–V devices on silicon wafers through selective metal–organic chemical vapor deposition (MOCVD) on silicon substrates. The technology grows compound semiconductor materials, obtains high-quality GaAs epitaxial structures on Si substrates, and gradually fabricates light emitters and light receivers on the deposited epitaxial layers, realizing a Si-based monolithic integrated optical transceiver chip [39]. In 1997, Soref Richard et al. invented a laser array, with each laser having a SiGe-graded relaxation buffer layer and a highly doped stable strained SiGe or Ge collector layer grown sequentially on a Si wafer and emitted by SiGe. Extremely covered symmetric Ge–Si superlattices with many thin 8–15 atom monolayers of interleaved Ge and Si atoms enable high stacking heights [40]. Amber wave systems disclosed structures with optically active layers embedded in Si wafers such that the outermost epitaxial layer exposed to CMOS processing equipment is always Si or other CMOS-compatible material (SOI or SiO2), and optical signals can be transmitted between the embedded optoelectronic layer and the external waveguide using normal incidence (through the Si substrate or top Si cap layer) or in-plane incidence (edge coupling) [41]. Lestra announced a transceiver with a light pipe with an inclined reflective surface that generates a first light signal in the chip based on the light source signal, transmits the first light signal from the chip through the light pipe, receives the second light signal from the light pipe, and converts the second light signal through the electrical signal of the photodetector [42]. Huazhong University of Science and Technology used quantum well mixing technology to achieve on-chip photonic integration of passive and active optoelectronic devices. They subsequently prepared InP-based monolithic integrated optical phased arrays [43]. The U.S. Naval Laboratory provided building blocks for on-chip chemical sensors and other highly compact photonic integrated circuits that combine interband or quantum cascade lasers and detectors with passive waveguides integrated into III–V or other components on Si [44]. In 2019, Acacia Communications Co., Ltd., proposed a structure and the fabrication method of a monolithic Si coherent transceiver with integrated lasers and gain elements in which an InP chip was bonded to a Si chip in a notch formed in the Si chip [45]. Junbo Feng et al. [46] used Si-based CMOS technology to monolithically integrate Si-based optoelectronic modulators and a quadrature hybrid coupler to produce a monolithic integrated sideband modulator with a high sideband rejection ratio, simple driving, and large operating bandwidth. With the continuous development of monolithic integration technology, smaller size, lower power consumption, and lower cost are primary development directions. However, in submicron-scale etching technology, the connection between photonic and electronic devices, process compatibility, thermal isolation and electrical isolation, the integration of light sources, optical transmission loss and coupling efficiency, and optical logic devices remain challenging.

3.2.2. Hybrid Integration

Hybrid integration is the most widely studied optoelectronic integration technology in which optoelectronic components are integrated with various functions on the substrate material through direct placement or a bonding process [47,48,49,50]. Among them, the direct placement involves using flip-chip bonding or mounting process, placing the pre-fabricated III–V material laser on the surface of the Si photonic chip, and completing the electrical connection through solder balls to realize the hybrid integration of the light source and the Si optical waveguide device [51]. Tanaka et al. designed a silicon photonic transmitter chip without temperature control by integrating a III–V material semiconductor optical amplifier (SOA) on an SOI material substrate using flip-chip technology [52]. Flip-chip welding technology renders the design of Si optical components and SOA flexible and improves SOA thermal conductivity. End-face coupling requires flip-chip welding with a high degree of accuracy. The flip-chip welding technology is mature and can also be used effectively because of the optical gain characteristics of III–V materials. However, the high alignment accuracy requirements result in higher process costs. Bonding involves integrating the III–V material epitaxial layer with Si optical components. Because of the high alignment tolerance of the bonding process, compared with the direct placement process, this method exhibits a superior alignment accuracy advantage [29]. The bonding process is categorized into direct bonding and adhesive bonding. Direct bonding involves directly contacting two smooth, flat, and clean wafers without using bonding materials. Lasky and Shimbo et al. [53,54] proposed forming a bond between the two wafers under the action of the interface bond. Adhesive bonding integrates inter-wafer bonding using specific bonding materials. Benzocyclic (BCB) as a binder is mature, and BCB exhibits a strong bonding effect with excellent flatness and thermal stability. Compared with direct bonding, the thermal conductivity of the BCB material is poor, which results in poor heat dissipation of the integrated device and reduces light source performances. The “cold bonding” process proposed by Keyvaninia et al. [55] is similar to the developed mainstream “low temperature bonding” principle and can effectively address the aforementioned problems. The room-temperature bonding process should be used for future bonding technology development [56]. Ke et al. [57] developed a high-speed integrated tunable optical delay line using a novel preparation method. The substrate material of this delay line is silicon material, and the waveguide material is silicon nitride optical waveguide and lithium niobate optical waveguide. The lithium oxide material is a thin-film material, and the adopted BCB-based bonding process renders the process flexible and does not require a chemical mechanical polishing process. In 2019, Li et al. [58] used a hybrid integration scheme in which the chip and circuit were bonded by a gold wire to prepare a high-gain four-channel miniaturized optical receiver module device, which reduces the size and power consumption of the communication system and has numerous application areas.

3.3. Optical Interconnect

With the increasing demand and miniaturization of transistors, the data transmission between chips and within chips requires higher bandwidth and speed and lower power consumption. Optical interconnects with low power consumption and interference have numerous advantages [59]. In the future, optoelectronic integrated circuits will replace conventional electrical interconnects with optical interconnects. Studies have focused on optical interconnect [60,61,62,63]. In 1982, Fujitsu devised a silicon-based waveguide to simplify the device structure and reduce the device size and cost [64]. In 1984, Goodman et al. [65] proposed to replace conventional electrical interconnection with optical interconnection technology. In 1987, Richard Soref et al. [66] proposed an optical waveguide based on the SOI platform. The SOI material exhibits excellent core-cladding refractive index difference and mitigates loss. Subsequently, this method was used to develop silicon-based waveguides. In 1993, Berger et al. [67] prepared porous Si optical waveguides by varying the current intensity in the electrochemical etching process used to fabricate porous Si, which affects the porosity of the monolayer and the optical properties in a simple manner. In 2004, Sun Yat-Sen University [68] proposed an integrated optical waveguide device based on the principle of multi-mode interference, with a structural unit of 3 × 2 for optical power separation and optical cross-interconnection. By introducing the MMI region near the crossover point, the crosstalk characteristics of the crossover waveguide improved considerably. In 2015, IBM [69] used the effect of grain size on optical loss to propose a low-loss large-grain polysilicon waveguide with a high refractive index to integrate various small photonic components. Furthermore, the use of small optical components improves performance. In 2018, the University of Arizona [70] introduced a waveguide that includes a thin waveguide core and a tapered structure design that provides previously unachievable performance, including efficient coupling with considerably reduced footprint, loose alignment tolerances, and low polarization dependence. These features are critical for high-volume manufacturing using low-cost, low-accuracy assembly tools. Generally, the optical interconnection system consists of light sources, electro-optic modulators, optical waveguides, optical switches, filters, wavelength division multiplexing, and optical detectors. The interconnection process includes the light emitted by the light source being used as a data transmission carrier. The electro-optic modulator loads the electrical signal to be transmitted on the optical carrier, transmits it to the interconnection terminal through the optical waveguide, and, finally, receives and demodulates it into an electrical signal via the detector [71,72]. Structurally, optical interconnects include intra-chip interconnects, inter-chip interconnects, inter-module interconnects, inter-board interconnects, and interconnects between communication devices [39]. The optical interconnection technology is mature and has been commercialized. The optical interconnection technology between circuit boards, modules, and chips is developing, whereas the optical interconnection within the chip is in the application basic research stage, and the optical interconnection technology is accelerating to in-chip development. From the transmission channel, optical interconnection includes free space interconnection, waveguide interconnection, and optical fiber interconnection. Among them, free space interconnection exhibits optical path alignment, and waveguide interconnection provides high-density interconnection channels, which are suitable for interconnection within chips or between chips. They are crucial in optoelectronic integrated circuits and are a current research focus in optical interconnection. The chip-level optical interconnection technology of optical waveguides is typically focused on the improvement of the waveguide and the improvement of the fabrication process.

4. Packaging of Optoelectronic Integrated Circuits

The packaging of optoelectronic integrated circuits is the system integration of optoelectronic devices, electronic components, and functional application materials [73]. With the continuous development of optoelectronic integrated circuit technology, requirements for transmission speed, performance index, form factor, and packaging cost in terms of packaging have become stringent. Thus, promoting the progress and innovation of packaging technology is essential for the packaging technology to experience double-inline insertion, butterfly packaging, coaxial packaging, Mini-DL packaging, small form factor packaging, chip on board (COB), tape automated bonding (TAB), and flip-chip (FC) [74,75]. Based on the packaging form, packaging can be categorized into monolithic packaging and optoelectronic co-package (photoelectric hybrid packaging). Among these, optoelectronic co-packaging is a mixing package of microelectronic technology and photonic technology, which can not only give full play to the advantages of fast optical interconnection speed, large bandwidth, anti-interference, high density, and low power consumption, but also use the mature microelectronics technology, high-density integration, high yield, low cost, and other advantages, which is a critical topic of research.

4.1. Monolithic Package

Monolithic packaging is the packaging of monolithic integration formed by the simultaneous processing of optical and electrical devices on the same tape-out platform [76]. With the continued demand for smaller and superior optoelectronic integrated circuit devices causing manufacturers to increase component density and reduce component size wherever possible within the device, the development of package structures should be on the chip level, wafer level, and even quantum level to achieve minimal package occupancy area. In 1983, Eales et al. [77] of STC Company detailed a package scheme, based on a ceramic substrate. The heat sink is electrically connected to the top of the laser by wire bonding technology. In 1995, the Korea Institute of Electronics and Communications disclosed a butterfly packaging scheme [78], which can transmit high-speed signals to the micro pin lines of package pins installed on the micro pin lines and the front surface of the feedback optical interrupter, and fixed them through laser welding to minimize the optical fiber in heat transfer path to improve the reliability of module packaging. In 2005, Taiwan Semiconductor Manufacturing Company revealed a packaging structure for optical elements [79]. The chip has optical components and a plurality of pads arranged on its active surface; holes are formed through the chip and electrically connected with the pads. The cover is attached to the active surface through an adhesive ring, and a plurality of metal wires are arranged on the rear surface of the chip. This packaging structure can be used for wafer-level mass manufacturing, which not only reduces the packaging cost considerably but also improves the reliability of packaging. In 2016, Ma et al. [80] invented a monolithic packaging scheme to prepare an insulating film on the microchannel cooler to achieve water–electric separation, which can reduce the requirement for cooling water resistivity and incorporate the use of ordinary cooling water, which is conducive for improving the environmental adaptability of the laser and extending the lifetime of the laser. In 2018, Shi Zhe et al. invented a package structure design scheme for quantum cascade lasers [81], as depicted in Figure 2, which not only improves the collimated coupling efficiency and the flexibility of replacing the laser chip but also reduces the package cost and assembly difficulty and reduces the package volume. Monolithic packaging schemes are increasingly prioritizing higher reliability and smaller size, which are simple for monolithic packaging technology but also lead to a higher loss of optical waveguide and a lower response rate of photoelectric conversion, which results in the optoelectronic device becoming unable to perform optimally [82].

4.2. Optical Co-Package

Optical co-packaging encapsulates optical transceiver modules/chips and integrated circuit chips in one package [83]. The packaging structure is divided into 2D, 2.5D, and 3D packaging (Figure 3). The packaging process includes COB, TAB, and FC. Furthermore, 2D packaging is typically directly interconnected by wire bonding, which is realized through COB packaging technology. The COB packaging process is a packaging technology in which the chip is directly bound to the PCB board or metal-based printed circuit board through a COB solid-state machine, and the chip and the circuit board are electrically connected through wire bonding. Dozens or even hundreds of chips are packaged in the area. In 1987, Siemens disclosed a hybrid packaging structure for electro-optical components [84], which was the earliest patent involving hybrid packaging, using a 2D packaging structure to achieve a high-precision and correct assembly of optoelectronic component circuits in a metal housing containing optical components without the use of gluing and brazing. Although the assembly of 2D packaging is easy, the high-speed signal interconnection of optical and electrical devices is long, and the occupied area is relatively large, which considerably reduces the integration density and bandwidth. Here, 2.5D packaging includes co-packaging the optical transceiver module and the integrated circuit chip on a carrier board, with higher interconnection density and lower power consumption. In 1995, Canon Japan disclosed an optoelectronic hybrid packaging method using a TAB packaging process and 2.5D packaging structure [85], which can be applied to produce various types of equipment, suitable for mass production, low manufacturing cost, and easy-to-solder chips to the circuit board. TAB involves mounting and connecting the integrated circuit chip on a soft, film-like polymer carrier tape and automatically soldering the inner lead end of the carrier tape to the chip integrated circuit, whereas the outer lead end is connected to the conventional package or printed board PWB soldering, a highly automated surface mount technology, and provides numerous terminal interconnects, typically used for mass production greater than 500 pieces. In 2002, the Industrial Technology Research Institute of Taiwan, a consortium, disclosed a packaging method for optoelectronic components using a 2.5D packaging structure [86], consisting of an optical transceiver package, a driver circuit bonding, a microlens bonding package, and a plug-in connector, which enables the effective alignment of optical transceivers, reduces costs, improves yields, and is suitable for high-volume production. In 2014, China’s Huajin Semiconductor revealed an optical component packaging method using a 2.5D package combined with a stop-hole packaging method for optical communication devices [87], which can reduce the temperature of VCSEL arrays under normal operation by approximately 20 °C while maintaining a smaller size and lower manufacturing cost and can reduce space while directly coupling optical fibers and optoelectronic devices. In 2020, Infineon from Germany developed a semiconductor packaging method using the FC packaging process [88], which provides semiconductor packaging technology with component stacking arrangement that allows components to communicate over very short distances, reducing parasitic inductance, for applications requiring low-inductance electrical connections between package components, such as LIDAR systems and power semiconductor modules. Next, 3D packaging is a three-dimensional stacking of integrated circuit chips and optical chips to achieve the shortest electrical interconnection with low losses, the highest interconnection density, and lower power consumption than the 2.5D solution. Compared with 2D packaging methods, 2.5D and 3D packages incorporate the use of three-dimensional interconnects to allow spatial wiring in a 3D manner and improve integration, which reduces the length of on-chip connectivity, improves transmission speed, and reduces power consumption, providing a superior system integration solution for miniaturization, low power consumption, and broadband interconnect requirements. With the continuous development and maturation of packaging technology, package integration has evolved from 2.5D to 3D optoelectronic co-packaging [83]. Among many packaging processes, FC is both a chip interconnection technology and an ideal chip bonding technology, and FC has become the preferred packaging process in the packaging field.

5. Summary and Outlook

With the wide applications of the semiconductor industry in various fields and the continuous development of the integration process, optoelectronic integrated circuits will attract considerable research attention. Currently, for the field of optoelectronic integration, studies should focus on continuously optimizing the optoelectronic integration process, improving the efficiency of large-scale optoelectronic integration, and reducing the cost of preparation materials and the preparation process to realize low-cost preparation and mass production on a large scale. In the preparation process, monolithic integration gradually exhibits excellent performance, which is a critical topic of research in optoelectronic integrated circuits. The research on optical interconnect technology is typically focused on the modification of the optical waveguide and the preparation process. The optical waveguide and preparation process typically focus on reducing cost and loss and improving the transmission rate. Improved efficacy, reduction of cost and losses, and enhanced transmission rates are typically achieved through improvements in optical waveguides and fabrication processes. Along with the development of packaging technology, optoelectronic co-packaging can not only improve the interconnection density, but also reduce the size and weight of optoelectronic integrated circuits and reduce power consumption.

Author Contributions

Conceptualization, M.L. and Y.C.; methodology, X.L.; validation, L.P.; formal analysis, C.Z.; resources, D.C.; writing—original draft preparation, M.L., D.C. and L.C.; writing—review and editing, M.L. and J.F.; supervision, J.F.; funding acquisition, X.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Acknowledgments

This research was funded by the Patent Special Research Project of China National Intellectual Property Administration in 2021 [Grant number fx202102], and the project commissioned by the company COFCO (Jilin) Bio-Chemical Technology Co., Ltd.

Conflicts of Interest

The authors declare no conflicts of interest.

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Applsci 14 08073 g001
Figure 1. Application fields of optoelectronic integrated circuits.
Figure 1. Application fields of optoelectronic integrated circuits.
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Figure 2. Schematic of the quantum cascade laser packaging structure.
Figure 2. Schematic of the quantum cascade laser packaging structure.
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Figure 3. Schematic of (a) 2D, (b) 2.5D, and (c) 3D package structure.
Figure 3. Schematic of (a) 2D, (b) 2.5D, and (c) 3D package structure.
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Table 1. Comparison of the advantages and disadvantages of monolithic integration and hybrid integration.
Table 1. Comparison of the advantages and disadvantages of monolithic integration and hybrid integration.
Monolithic IntegrationHybrid Integration
FeaturesOptoelectronic components can grow on substrate materials directlyOptoelectronic components can transfer to substrate materials
Advantages
  • High integration
  • Small volume
  • Improve the integration
  • Small effect of component interconnection
  • High process maturity
  • High flexibility in combination
Disadvantages
  • Cannot be integrated with a single chip
  • Low integration degree
  • High cost
  • Poor connection between each component
  • Difficult to realize miniaturization
Table 2. Comparison of the advantages and disadvantages of matrix materials for OEIC.
Table 2. Comparison of the advantages and disadvantages of matrix materials for OEIC.
ItemAdvantagesDisadvantages
LiNbO3
  • Low optical transmission loss
  • Excellent optical modulation characteristics
  • Good piezoelectric, electro-optical, and acousto-optical effects
  • High processing cost
  • Unable to produce on a large scale
Silicon material on insulator
  • Excellent optical properties
  • Good material compatibility
  • Cannot emit light
  • Requires mixing and integration with other materials
SiO2
  • Low refractive index
  • Low optical transmission loss
  • High coupling efficiency with standard single-mode fiber, and mature process
  • Low integration
Si3N4
  • Refractive index difference is moderate
  • Good material compatibility
  • Can receive high optical power
  • Good temperature stability of waveguide
  • Cannot emit light
  • Require to be mixed and integrated with other materials
Polymeric materials
  • Large photoelectric and photothermal coefficients
  • Convenient material configuration
  • Low cost
  • Simple processing technology
  • Multiple types
  • Easy to age
  • Poor reliability
  • Poor stability
III–V semiconductor materials
  • Broad spectrum
  • Wide application range
  • Mature technology
  • Multiple product types
  • Small wafer size
  • High process cost
  • Low product productivity
  • Difficulty in large-scale production
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Liang, M.; Fang, J.; Chen, D.; Chen, L.; Peng, L.; Zhang, C.; Chen, Y.; Lu, X. Development Status of Key Technologies for Optoelectronic Integrated Circuit Manufacturing. Appl. Sci. 2024, 14, 8073. https://doi.org/10.3390/app14178073

AMA Style

Liang M, Fang J, Chen D, Chen L, Peng L, Zhang C, Chen Y, Lu X. Development Status of Key Technologies for Optoelectronic Integrated Circuit Manufacturing. Applied Sciences. 2024; 14(17):8073. https://doi.org/10.3390/app14178073

Chicago/Turabian Style

Liang, Mengjie, Ji Fang, Dunkui Chen, Lang Chen, Lingling Peng, Chi Zhang, Yingchun Chen, and Xiang Lu. 2024. "Development Status of Key Technologies for Optoelectronic Integrated Circuit Manufacturing" Applied Sciences 14, no. 17: 8073. https://doi.org/10.3390/app14178073

APA Style

Liang, M., Fang, J., Chen, D., Chen, L., Peng, L., Zhang, C., Chen, Y., & Lu, X. (2024). Development Status of Key Technologies for Optoelectronic Integrated Circuit Manufacturing. Applied Sciences, 14(17), 8073. https://doi.org/10.3390/app14178073

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