Fault Detection and VSC-HVDC Network Dynamics Analysis for the Faults in Its Host AC Networks

Abstract

High-voltage direct current (HVDC) transmission is preferred over high-voltage alternating current (HVAC) for long power lines for asynchronous power grid interconnection and high-level renewable energy integration. The control and protection functions associated with HVDC systems help with fast and secure clearance of faults. The control and protection challenges in the embedded HVDC network are of great concern for the stable and secure operation of an HVDC network. The DC fault current may reach an extremely high level in a rather short period because of the low impedance in a DC system, which is dangerous for converters, and disturbances in the AC network directly influence the performance of the HVDC system. Sometimes, faults on the AC side may lead to disconnection or failure of the DC link, causing reliability problems as well as huge economic losses. AC and DC protection solutions are being developed for HVDC systems to enhance their sustainability and reliability. As such, AC and DC faults should be detected and cleared at a faster rate. Therefore, in this article, the feasibility of the synchro-squeezed transform (SST) is analyzed for detection purposes. For more accurate and faster detection, the signal is first decomposed using the empirical mode decomposition (EMD) technique, and then the SST is applied. A discrete Teager energy (DTE) spectrum is obtained with the processed signal, which works as the detection index. The algorithm shows low sampling frequency requirements, with higher efficiency and reliability for the purpose. PSCAD/EMTDC version 4.6 software and MATLAB 2022a software is used for the modeling and simulation.

1. Introduction

An interconnected HVDC system requires protection at both sides of the network (i.e., the AC side as well as at DC side). The DC transmission system is expected to run smoothly, and it should prevent DC blocking during AC- and DC-side faults [1,2]. Any disturbance that occurs on the AC side may travel to the DC side and vice versa. The existing protection method available for AC system faults also needs to be revised and modified to make it faster and quicker to work in a handshake manner for overall HVDC interconnected network protection [3,4]. The potential fault detection techniques available in the literature are the Fourier transform (FT), fast Fourier transform (FFT), short-time Fourier transform (STFT), wavelet transform (WT), discrete wavelet transform (DWT), continuous wavelet transform (CWT), Hilbert transform (HT), Hilbert–Huang transform (HHT), etc. [5,6]. Their performance largely depends on one or other parameters mentioned in

Table 1. Comparison of different fault detection techniques.

Sl. No.	Detection Scheme	Strength	Drawback
1.	Overvoltage- or overcurrent-based	Provides backup protection, simple method	Venerable sensitivity to fault impedance, network configuration, active measurement
2.	Differential protection-based	Fast tripping, high precision, and sensitivity	Synchronized communication and measurements are required, higher cost constraint
3.	Data-driven; pattern recognition-based	Accurate and robust, intelligent fault diagnosis and localization	Large dataset required, complex structure, difficult real-time feasibility, longer time due to large amount of data
4.	FT-based	Fast detection, accurate, venerable sensitivity	Dependency on choice of window length
5.	ST-based	Fast detection and faster calculation, reliability	Less sensitive to fault condition
6.	STFT-based	Fast detection and calculation	Choice of window length, limited time–frequency resolution, blurry TFRs
7.	WT-based	Fast, accurate, resistant to noise	Depending on the choice of mother wavelet, blurry TFRs
8.	HHT-based	Fast and accurate, robust against noisy conditions	Large computational burden, blurry TFRs

, with the nomenclature mentioned in Nomenclature part. Though vast research is available for AC fault detection techniques, the available techniques may not be suitable for all applications. The techniques respond differently when they are employed in high-voltage networks, distribution systems, or two or multiterminal networks [7,8].

The drawbacks of the existing methods are mentioned in Table 1. With this motivation, a faster and reliable fault detection function is imperative for HVDC networks. To corroborate this, the synchro-squeezed transform (SST) is introduced in this paper. It provides a higher resolution and more accurate information about the transient events in comparison with the conventional integral transform techniques [9,10]. The SST provides the special feature of compressing the data, which saves a great amount of storage, lessens the computation burden, and makes the operation faster without compromising the information contained in the signal. The SST can compress data by up to 40% with a 99.99% signal reconstruction capability. Both the tasks (i.e., sensing the signal and compression) go hand in hand in the case of the SST. It first reallocates the energy distribution according to the time-scale plane, similar to the wavelet transform. Then, the SST projects the time-scale plane onto the time–frequency plane. In this way, the SST provides more accurate and more concentrated time–frequency curves. The SST’s orthogonality of data sensing and compression reduces the mode mixing effect, and the multi-component simulation exhibits better time–frequency characteristics. The concentrated energy distribution and sharper resolution makes the SST a powerful tool for condition monitoring and transient detection in a signal. The proposed SST algorithm suppresses the noise present in the signal accurately, traces the harmonic presence, and improves the frequency aliasing phenomenon [11,12,13].

In this study, a four-terminal HVDC network is analyzed for symmetrical and unsymmetrical faults in its host AC networks. The raw current signals are first decomposed using the EMD technique, and the obtained modes are passed to the improved SST for fault detection. EMD is applied to extract the different modes, which are relevant and provide the accurate information needed for the SST. A comparative study is also shown between the SST and the Hilbert–Huang transform (HHT).

The organization of the paper is as follows. Section 1 provides the introduction of the paper. Section 2 explains the discrete teaser energy concept, using the SST for the purpose of real-time application, and their modeling, with a detailed mathematical explanation. Section 3 shows the simulation performed and the obtained results. Section 4 gives the performance analysis of the proposed method. Section 5 concludes the work.

2. Proposed Methodology

This work presents the implementation of EMD to obtain the IMFs. Then, using the SST, the DTE is computed. The procedure for evaluating the DTE using the SST is presented. A brief discussion and mathematical formulation are presented with the subsequent steps in the following subsections.

2.1. Empirical Mode Decomposition (EMD)

EMD is a data-driven technique used to analyze signals which are nonlinear and non-stationary in nature:

• For transient analysis, EMD separates the signal into components of different resolutions.
• The signal is decomposed into various frequency components known as intrinsic mode functions (IMFs) and a residue.
• In a power system, the signals generated during transient conditions can be processed by using EMD to retrieve useful information from the signal. The developed components can be used in protection functions. The two rules applied to decompose a signal during transient conditions are given in [5,14].
• Rule 1: Only a single extremum is to be considered by the IMF between two subsequent zero crossings. This means that the number of counted local minima and maxima must differ at most by one.
• Rule 2: The mean value provided by the respective IMFs should be zero. The sifting process can be summarized in the following algorithm.

Following the above rules, a reconstructed data set u(t) decomposes into N number of IMFs C_i(t) and a residue r(t):

$$u(t)={\displaystyle \sum C_i(t)-r(t)}$$

(1)

When r(t) satisfies the stop criteria, that will be taken out as the final residual, and the process of EMD will be completed.

2.2. Synchro-Squeezed Transform (SST)

This is a mathematical tool used to analyze oscillatory signals. It is a compressed and squeezed sensing algorithm that works to obtain greater time–frequency plane information using the following features:

• The dogma of signal processing techniques maintains that a signal must be sampled at a rate at least twice its highest frequency to represent and reconstruct the signal without any error.
• But in general practice, the data are soon compressed after sensing to reduce the computational burden and signal representation complexity (bits). This is a waste of valuable sensing resources.
• Over the past few years, a new theory of compressive sensing has begun to emerge in this field. In this theory, the signal is sampled and simultaneously compressed at a greatly reduced rate.
• The SST can accurately map time domain signals into their time–frequency representations.
• Compressed sensing.
• Compressive sampling.
• It has a well-grounded mathematical foundation that facilitates theoretical analysis.

A clear time–frequency representation (TFR) makes signal characteristic extraction more accurate in comparison with the information provided by the algorithms that give time-scale plane representation [8,9,10]. By applying the SST on an oscillatory signal C_i, the signal is decomposed as follows:

$$C_i(t)={\displaystyle \sum _{n=1}^k{A}_k(t)}cos\left({\theta }_k(t)\right)+\eta (t)$$

(2)

where η (t) is the additive noise, The instantaneous amplitude and phase information of the k^th component are denoted as A_k (t) and ${\theta }_k(t)$, respectively. The instantaneous frequency $f_{ k}\left(t\right)$ can be estimated from the instantaneous phase as follows:

$$f_k(t)=\frac{1}{2\pi }\frac{d}{dt}{\theta }_k(t)$$

(3)

The next step is to construct the time-scale map using a continuous wavelet (CWT) transform of the signal. Morlet was chosen as the mother wavelet:

$$W_s(\alpha ,\beta )=\frac{1}{\sqrt{p}}{\displaystyle \int A_k(t)}{\xi }^{\ast }\left(\frac{t-\beta }{\alpha }\right)dt$$

(4)

where, ξ^* is the complex conjugate of the Morlet wavelet, α is the scaling factor, β is the time shift, and W_s (α, β) is the time–frequency graph. The derivative of Equation (4) at any point (α, β) with respect to β for all w_s (α, β) ≠ 0 can be written as W_s (α, β):

$$w_s(\alpha ,\beta )=\frac{-j}{2\pi W_s(\alpha ,\beta )}\frac{\partial W_s(\alpha ,\beta )}{\partial \beta }$$

(5)

The above obtained time-scale information is mapped into the time–frequency plane using the concept of synchro squeezing:

$$S_s({\omega }_l,\beta )=\frac{1}{\Delta \omega }{\displaystyle \sum _{{\alpha }_{k.\left|\omega \left({\alpha }_k,\beta \right)-{\omega }_l\right|}\le \Delta \omega /2}{W}_s({\alpha }_k,\beta ){\alpha }^{-3/2}\Delta {\alpha }_k}$$

(6)

For any value of α_k, α and β are discrete in nature for the scaling step $\Delta {\alpha }_k={\alpha }_{k+1}-{\alpha }_k$. The transform is obtained at the center frequency ${\omega }_l$ over the range of frequencies $[{\omega }_l-\Delta \omega /2,{\omega }_l,{\omega }_l-\Delta \omega /2]$, with ${\omega }_l$ as the center frequency.

The mapping from the time-scale plane to the time–frequency plane $\left(\beta ,\alpha \right)\to \left(\beta ,{\omega }_{\mathrm{ins}}\left(\beta ,\alpha \right)\right)$, mentioned in Equation (6), shows the synchro-squeezing process.

2.3. Discrete Teager Energy (DTE)

The DTE operator is basically an AM-FM modulation technique for estimating the energy of a processed signal. It is a valuable processing tool for analyzing time-, frequency-. and time–frequency-based signals [9,15]. To understand the mathematical background of this approach, let us assume a signal S_S (t). The DTE operator applied on the S_S (t) results in

$$\psi \left[S_s(t)\right]={\dot{S}}_s(t)-S_s(t) {\ddot{S}}_s(t)$$

(7)

where ${\dot{S}}_s(t)$ is the first derivative and ${\ddot{S}}_s(t)$ is the second derivative of $S_s(t)$. The DTE for a sinusoidal signal can be written as

$$\psi \left[A_m\cos \omega t\right]= A^2{\omega }^2$$

(8)

where A represents the magnitude of the signal, The real-valued AM signal can also be defined as

$$S_s(t)=a (t)\cos (\omega t)$$

(9)

where a (t) denotes the amplitude of the signal and ω is the carrier frequency of the signal

$$\psi \left[a(t)\cos \omega t\right]= a^2(t){\omega }^2+{\cos }^2(\omega t)\psi \left[a(t)\right]$$

(10)

Here, ψ is used to estimate the contained envelope. For a discrete signal, the DTE is written as

$$\psi \left[S_s(t)\right]= S_s{(t)}^2+S_s(t-1)S_s(t+1)$$

(11)

where $S_s(t)$ is the discrete signal and t is the sampling time. The expression of the DTE from the output obtained from the SST is presented as follows:

$${\psi }_i=DT{E}_K^{\mathrm{SST}}={\displaystyle \sum _{i=0}^{k+1}DTE{O}_m^{\mathrm{approx}}\left(i\right)={\displaystyle \sum _{i=1}^{k+1}{\left[A_{m.i}\right]}^2.{\omega }_{m.i}^2}}$$

(12)

where k + 1 represents significant modes obtained by applying the SST on the target signal.

The implementation of these algorithms is explained with the help of the flowchart shown in Figure 1.

The target signal is processed as mentioned in the flowchart. EMD is applied first to obtain the suitable IMF, which is further processed with the SST operation to find the DTE index, which acts as a fault detection indicator. Whenever the index crosses the threshold, the fault can be detected by the proposed method. The relaying algorithm then sends a trip signal to the circuit breaker. Selecting an appropriate threshold will always decide the security of a protection function. A standard threshold-setting mechanism is followed for choosing the optimal threshold value [14]. The steps are mentioned below:

a.

Extract the local maxima from one full cycle of data of ${\varphi }_{\mathrm{m}}$ for each cycle as follows:

$${\varphi }_{\max }={\varphi }_{\mathrm{m}}=\max \left({\varphi }_0,{\varphi }_1,...........{\varphi }_{n-1}\right)$$

(13)

where, i = 0, 1, ……, n − 1 and n is the number of samples per cycle.

b.

Set the threshold ${\varphi }_{\mathrm{t}\mathrm{h}}$ using Equation (13):

$${\varphi }_{\mathrm{t}\mathrm{h}}=\epsilon .{\varphi }_{\mathrm{m}}$$

(14)

The variable $\epsilon$ depends on the fault scenario considered for the fault case.

With the implementation of the algorithm, fault analysis is performed, and the obtained results are discussed in the next section.

3. Simulation Model and Results

A VSC technology-based MMC-structured HVDC network was used as shown in Figure 2 is used for analysis. Various symmetrical and asymmetrical faults with different conditions were simulated for the considered power system model.

3.1. Simulation Model

The HVDC network connecting four host AC systems is presented in Figure 2. For the higher voltage level of the converter, the modular multilevel converter (MMC) topology was preferred. For the high-voltage network, the VSC-based HVDC network proved its strength over the LCC-based HVDC network. The modular multilevel converter (MMC) topology was accepted over two- and three-level VSC topologies for the bulk amount of power transfer through HVDC network. The modeling was performed following the guidelines of the CIGRE B4 DC grid guide [16,17,18]. The control and protection of an HVDC network is still a challenging task. In the VSC-HVDC network, fast and indigenous control of the active power and reactive power was implemented using pulse width modulation. Different faults were analyzed at four different locations—F₁, F₂, F₃, and F₄—with different fault scenarios and conditions tested for the simulation model [19,20]. The HVDC network parameters are presented in Appendix A.

3.2. Simulation Results

Different faults such as single line-to-ground (AG), double line-to-ground (ABG), line-to-line (AB), and symmetrical faults (ABC) were simulated using the test system. The faults were created at different locations (F₁, F₂, F₃ and F₄) in Figure 2. The AG, ABG, AB, and ABC faults were created at location F₁, with variations in system parameters such as the fault resistance (R_f)_, load angle (δ), and fault inception instance (t_i) mentioned in

Table 2. Results for different fault cases for various load angle, fault resistance and inception isnatnce.

Sl. No.	Fault Type	Location (km)	δ (deg)	Rf (Ω)	ti (s)
1.	AG	F1	30	100	2.25
2.	ABG		45	50	2.5
3.	AB		60	20	2.75
4.	ABC		80	5	3.0

to evaluate the performance of the proposed method.

Various faults were created at location F₁, and the current signals were collected at the PCC end. The phase A currents were chosen for analysis, as shown in Figure 3.

The signals obtained for the AG, ABG, AB, and ABC faults denoised the signal and decomposed the signal into various modes based on the frequency components present in the signal. The SST was further used to avoid the mode mixing issue of the EMD technique. The obtained modes were further utilized for analysis. The modes obtained for the ABC faults after applying the EMD-SST on the phase A current signal are shown in Figure 4. Similar to the other fault cases, the same decomposition procedure was applied. From the analysis, and by applying kurtosis analysis, it was observed that IMF-1 was more suitable to be applied for fault analysis compared with the other IMFs. The main reason for this is the information that resides in IMF-1 being more useful for fault analysis, as it contained the maximum frequency component. The variations observed in IMF-1 during normal and fault conditions provided a clear discrimination between the pre-fault and post-fault events. Thus, IMF-1 was further considered for fault identification by the proposed method. For the AG, ABG, and AB fault cases, EMD was applied in a similar manner.

The target signals for all fault cases were processed using EMD. Various IMFs were obtained based on the decomposition level. After the decomposition, IMF-1 came out as the most because it holds the useful information related to fault-generated transients. The instantaneous amplitude and instantaneous frequency information of the first IMF was obtained using the SST with the help of Equations (2) and (3). The energy index for each fault case was calculated using the DTE with the help of Equation (12). The DTE for the AG, ABG, AB, and ABC faults are shown in Figure 5a–d, respectively.

Before the fault inception instant, the DTE index was below the threshold value. However, the DTE index crossed the threshold value after fault initiation. For the AG fault, the index crossed the threshold value after 4.25 ms of the fault’s inception. However, for the ABG, AB, and ABC faults, the index took 3.85 ms, 1.65 ms, and 1.3 ms, respectfully. Similar fault studies were carried out at locations F₂, F₃, and F₄. The results obtained for all symmetrical and asymmetrical faults were computed, and they are presented in

Table 3. Tested fault conditions.

Location	Fault Type	Rf (Ω)	δ (deg)	ti (s)	DTE (p.u.)	Time Taken SST (ms)
F2	AG	90	85	2.28	10.25	3.25
	ABG	45	65	2.55	18.52	3.0
	AB	20	35	2.65	35.5	2.5
	ABC	8	70	3.15	40.253	1.8
F3	AG	90	80	2.32	9.152	3.5
	ABG	65	60	2.65	16.50	3.0
	AB	25	45	2.75	30.05	2.8
	ABC	10	80	3.32	36.83	1.5
F4	AG	100	75	2.45	8.212	3.80
	ABG	75	55	2.65	15.50	2.75
	AB	45	40	2.75	28.83	2.9
	ABC	10	90	3.25	35.35	1.35

.

4. Performance Analysis

The performance of the proposed algorithm was analyzed for the conditions mentioned in the following subsections.

4.1. Comparative Assessment with Existing Techniques

The HHT was applied to find the frequency, energy attenuation coefficient details, and energy of the high-frequency components for the different modes. The comparison study is presented in terms of the time–frequency representations (TFR) obtained by implementing the HHT and SST [17,18].

The TFRs when using the HHT and SST were obtained for the fault scenarios mentioned in Table 2. The response of both HHT and SST methods are compared for AG, AB, ABG and ABC fault cases and results are shown in Figure 6, Figure 7, Figure 8 and Figure 9 respectively.

From the obtained results through TFRs for symmetrical and asymmetrical faults, it is noticed that SST provides better TFRs information as compared to HHT. The DTE was computed further, and the detection time computation is presented in

Table 4. Detection time computation.

Fault Type		HHT		SST
	Location	DTE (p.u.)	Time (ms)	DTE (p.u.)	Time (ms)
AG	F1	19.7	8.62	9.7	4.25
ABG		26.0	7.57	16.5	3.28
AB		38.23	5.32	32.5	1.25
ABC		44.0	4.95	42.0	1.30

.

For each fault, the time taken by the SST was quite lower compared with the time taken by the HHT algorithm to detect the fault because the SST squeezes the obtained scalogram, and only the filtered components are present through the SST to extract the most relevant and accurate information from the signals.

Upon computing the computation burden from EMD and the SST algorithm on the relaying algorithm, the decision regarding fault detection can be accomplished within one cycle time period. Thus, with the proposed integrated logic, an accurate, fast, and reliable decision can be made for the distance relay.

4.2. Effect of Fault Inception

The performance of many power system protection algorithms is affected due to changes in the fault inception time. When a fault was at the zero-crossing point, then it was observed that it introduced more transients in the current signal in comparison with the fault at a peak crossing fault. The validation of this statement was tested using the proposed method. To conduct this study, a three-phase (ABC) fault was first created at a zero-crossing instant (2.530 s) for an R_f value of 10 Ω and then created at location F₁. Similarly, the ABC fault was created at (2.546 s) with a 20 Ω fault resistance at location F₁. The load angles were set to 120° and 130° for zero and peak crossing, respectively. Figure 10 shows the current and its corresponding energy indices for both cases. From the DTE index, a gradual increase in the DTE for the peak crossing fault was observed, while for the zero crossing, there was an immediate rise in the DTE. The DTE index crossed the threshold in 2 ms for the peak crossing fault, while it took 1.3 ms to cross the threshold for the zero-crossing fault. Therefore, the results provided by the proposed method abided by the previous statement. Thus, a reliable decision can be made for the relay.

4.3. Effect of Sampling Frequency

Higher sampling frequencies are selected during the analog-to-digital conversion process so that the high-range frequency components generated during the fault conditions can be extracted and applied for better analysis of the condition. But choosing a higher sampling frequency may lead to a higher burden on the relay memory, and the overall decision process may become delayed. To see the impact of various sampling frequencies on the response of the HHT and proposed methods, 2, 5, and 8 kHz sampling frequencies were considered. A detailed comparison is presented in

Table 5. Effect of sampling frequency.

Sampling Frequency (kHz)	HHT		SST
	DTE (p.u.)	Time (ms)	DTE (p.u.)	Time (ms)
2	38.05	1.52	42.82	1.28
5	41.75	1.45	46.50	1.25
8	44.25	1.31	48.95	1.20

. From the results, it can be observed that the DTE values estimated using the HHT and SST were almost the same, but the response time of the proposed method for various sampling frequencies was lower compared with the HHT. Thus, the proposed method has high immunity to the sampling frequency. It was also observed that the response time of the proposed method was almost the same for different sampling frequency conditions.

4.4. Effect of Sudden Load Switching (SLS)

Sudden load variations in the line may possess detection-related challenges for the protective relay. The relay may maloperate due to such a condition. To further analyze these conditions, a sudden load switching condition was tested for 100% and 125% base loads. The load connected to the PCC was switched on at 2.5 s. The load had a 0.8 lagging power factor. The response of the method for this condition is shown in Figure 11. The DTE index, although changing, remained below the threshold, and thus the proposed method would detect this condition as a non-fault condition. Therefore, the load switching condition is not a problem for the proposed method, and it remains dependable for this condition.

4.5. Robustness against Noise

The performance of the proposed method was tested with the noise condition. The target signal was contaminated by white Gaussian noise. The test was performed for three different signal-to-noise (SNR) values: 40 dB, 50 dB, and 60 dB. The phase A current obtained during the three-phase fault created at t = 2.5 s and at location F₁ was considered at t = 2.5 s. The fault resistance was 20 Ω. The results are shown in Figure 12a,b. Figure 12a shows the signal condition for various SNRs.

The DTE surpassed the threshold only for the fault conditions and remained below it during no-fault situations. A fault was detected within 2 ms, which means the impact of noise on the detection time was negligible. With the results, it was found that the proposed method worked satisfactorily with the presence of noise in the signal.

To compare the method with the existing and conventional solutions, different methods like TMF, V&I THD, ROCOC and ROCOV, ROCOF, the FFT, ST, STFT, WT, VMD-HT, and HHT were considered, and the analysis obtained after the comparison is depicted in

Table 6. Comparison of the proposed method with the existing techniques.

Detection Technique	Fault	SLS	SNR	Detection Time	Computational Burden
TMF	$\surd$	-	-	From 200 ms to 2 s	Low
V&I THD	$\surd$	-	-	800 ms	High
ROCOC and ROCOV	$\surd$	-	$\surd$	200–300 ms	High
ROCOF	$\surd$	˟	-	100 ms	Low
ROCORP	$\surd$	˟	˟	100 ms	Low
FFT	$\surd$	$\surd$	˟	50 ms	High
ST	$\surd$	$\surd$	˟	<2 s	High
STFT	$\surd$	˟	$\surd$	<2 cycles	High
WT	$\surd$	-	$\surd$	30 ms	High
VMD-HT	$\surd$	-	$\surd$	10 ms	Low
HHT	$\surd$	˟	˟	10 ms	Low
SST (Proposed)	$\surd$	$\surd$	$\surd$	<5 ms	Very Low

$\surd$ = condition verified, ˟ = not considered, SLS = sudden load switching, and SNR = signal-to-noise ratio.

. From the comparative analysis, it can be observed that the presence of noise and different sampling frequency on the response of the proposed method is negligile. The detection time offered by the proposed solution was also much lower (i.e., less than 5 ms), which is commendable.

5. Conclusions

Protecting HVDC transmission systems against both AC and DC faults is a challenging task. An SST-based detection algorithm was proposed in this work, where the DTE index is computed using the output obtained from the EMD-SST. The proposed method was tested, and the results were validated for different conditions such as symmetrical and asymmetrical fault conditions, fault locations, load angles, and fault inception times. The algorithm was applied to an HVDC network connected with AC host networks. The simulation results indicate the performance of the proposed method during every stage of the disturbance. It was also found that the method was robust enough for the selected sampling frequencies, load switching conditions, and noisy conditions. For the different AC faults (i.e., AG, ABG, AB, and ABC faults) in the host AC network-1, the proposed method took 4.24, 3.85, 1.65, and 1.30 ms, respectively. For various AC faults in the other three host networks (i.e., at T₂, T₃, and T₄), the time taken by the algorithm is mentioned in Table 3. A set of comparative studies was performed between the existing HHT and the proposed SST methods. For the AG, ABG, AB, and ABC fault cases, it was observed that the TFRs obtained using the SST were more suitable and concentrated, giving more accurate information about the faults, and the obtained analysis can be observed in Table 4. For all types of symmetrical and asymmetrical fault scenarios, the proposed algorithm could detect the fault within 5 ms. which was quite lower than the time taken by the other techniques mentioned in Table 6. From the analysis, it was observed that the proposed integrated approach had a higher accuracy rate with a faster response and was reliable for the relay application.