1. Introduction
Traditional state estimation was introduced to the power system by Fred Schweppe in 1970 in [
1,
2,
3] to process available imperfect information (noise, bad data, or false data) [
4,
5] and produces the best possible estimates for the state variables in consideration. However, the traditional static state estimation is inefficient in estimating state variables in modern power systems. The modern bulk power system is increasingly integrated with inverter-based resources such as solar photovoltaic and wind. The electric power system distribution system is becoming more active with the effect of distributed energy sources, microgrid operations, electric vehicle inclusion, spot loads, and demand response programs, which aggregate at substations, thereby influencing the transmission network. Furthermore, the modern world is moving towards an integrated energy system, where other critical energy infrastructures, including natural gas and transportation, are corporately operated with the electrical power system for improved energy efficiency [
6], and the modern power system is influenced by factors outside the energy control centers’ operation. State estimation is foundational for applications such as security-constrained optimal power flow [
7], economic dispatch [
8], contingency analysis [
9], and security assessment [
10]. Thus, an efficient approach for state estimation is favorable over the traditional state estimation in the modern power system.
State-of-the-art (SOTA) linear state estimation (LSE) has improved the estimation capabilities [
11], where efficient measurements are used to establish a linear relationship with the state variables. LSE can accurately estimate bus node voltage phasors utilizing measurements such as available the noisy voltage phasor and current phasor measurements. LSE can be implemented solely based on the phasor measurement units (PMUs) [
12] and the network model. The network model of the SOTA LSE is derived from the SOTA transmission network topology processing (TNTP) approach, which is based on the asynchronous supervisory control and data acquisition (SCADA) monitoring of relay signals (SMRS), where the reliability can be challenged [
13,
14] and only updates the topology from 2 s to 5 s [
15]. Furthermore, the SOTA LSE is not scalable for large power systems, because computation time increases rapidly with the size of the network. The power system transmission network is a large, geographically distributed network. Thus, a distributed architecture is favorable to ensure the efficient process of the LSE with PMU measurements.
A comprehensive analysis of the state estimation has been conducted in [
16], where shortcomings of the literature and existing operational state estimations have been identified, including accuracy and security. In [
17], a robust hybrid state estimator was built against the non-Gaussian noise in PMU measurements; the filtration process utilized SCADA-based state estimation, which still limits the efficiency achieved by the PMU-only state estimation. Distributed state estimation architectures for multiarea power systems have been proposed in [
8,
18,
19,
20]. The different architectures utilize the least squares estimation techniques and information exchange between the control areas. Although distributed architecture improves computational efficiency, the approaches are based on traditional iterative estimation methods, where the efficiency is compromised. A semidefinite programming formulation based on distributed state estimation utilizing synchrophasor measurements was studied in [
21]. Both proposed approaches in [
21] involve the legacy SE and the PMU-based linear estimation, which increase the computational burden. The incorporation of linear and nonlinear models for state estimation has been investigated in [
22]. The system is divided into multiple linear and nonlinear areas, which define the distributed architecture of the study. The procedure is expected to be completed based on sequential flow, where the efficiency achieved from PMU measurement-based LSE in the linear regions is compromised. PMU-based topology derivation and extended LSE implementation were studied in [
23], where the test system used the breaker status as a digital input to the PMU. Digital inputs in the PMUs require additional communication network upgrades from relays or remote terminal units (RTUs) to PMUs in the substation; furthermore, the proposed approach is centralized. A phasor data-based state estimator with phase bias correction has been proposed in [
24]. This work identifies PMU-available high-voltage substations for building phasor state estimators. Identifying the island topology is critical; although, using SMRS in this study limits the efficiency of the overall procedure. A two-level LSE has been proposed in [
25,
26,
27]; the proposal investigates the power system at the substation level and network level. The shortcomings of this approach are that the only redundancy for the substation level is the network level, where the computational overhead is high in larger networks. Furthermore, the study was limited to the ring bus arrangement type (RBA) substations only. The effectiveness of the overall approach can be different based on the type of substation arrangement.
A physics-based hierarchical TNTP (H-TNTP) approach based solely on node voltages and branch currents measurements utilizing artificial intelligence algorithms was proposed in [
28]. H-TNTP can be used to derive the substation area network-level topologies using current and voltage measurements, which is ideal for a distributed LSE architecture. An efficient H-TNTP can be established by incorporating the synchrophasor network (H-TNTP-PMU), which updates the transmission network topology at every PMU frame. The synchrophasor network typically delivers voltage and current phasor measurements at 30 Hz [
29]. Thus, incorporating H-TNTP-PMU will enable LSE execution at every PMU measurement. This paper proposes a multilevel distributed LSE (D-LSE) architecture with substation-level and area-level estimation utilizing H-TNTP-PMU. The network level based on the SOTA LSE enhanced with the H-TNTP-PMU has been integrated as the redundancy level for the area level. The proposed approach overcomes the limitations identified in the SOTA LSE and the alternative approaches proposed by other researchers. The D-LSE incorporates the efficient and reliable H-TNTP-PMU as the topology processor, which enables the completion of the overall procedure at the PMU rate. The multilevel redundancy improves the reliability of the D-LSE. Incorporating all typical substation arrangements in the substation level ensures the applicability of the proposed D-LSE. The overview of the proposed D-LSE is shown in
Figure 1.
The main contributions of this paper are the following:
A multilevel distributed linear state estimation has been developed based on hierarchical transmission network topology processing. With the developed D-LSE, substation bus voltage phasors can be estimated at the substation level and/or area level. This caters to fast and efficient linear state estimation for large power systems.
The traditional linear state estimation has been enhanced with H-TNTP-PMU to provide a network-level model that is updated with the same measurements used for LSE. This improves the accuracy of the traditional LSE.
The D-LSE and enhancement to the traditional LSE have been illustrated on two benchmark test power systems. The two power systems, one small and the other medium, have been implemented on a real-time power system simulator with phasor measurement units and noisy measurements. The typical results obtained with the D-LSE and enhanced LSE demonstrate better efficiency, resilience, and robustness with respect to topology changes, bad data, and noisy measurements, respectively.
The rest of the paper is organized as follows:
Section 2 presents the formulation of the proposed D-LSE architecture with the enhanced network-level estimation. An introduction to the test power system models, typical results, and the performance analysis for D-LSE with the enhanced network-level estimation are discussed in
Section 3. The conclusion and future directions are provided in
Section 4.
3. Results and Discussion
This study considered two power system models, the modified two-area four-machine power system and the IEEE 68 bus power system, for implementing the D-LSE. All three level results are presented under topology changes and with bad data in the measurements for the modified two-area four-machine power system. For the IEEE 68 bus power system, the area-level and network-level results are presented. In the results tables, magnitude quantities are in per unit (pu) and indicated by “M (pu)”. Angle quantities are in degrees and indicated by “∠ °”. It is important to note that all the test results presented except for
Section 3.1.1 and
Section 3.2.1 have considered the fully connected topology of the networks.
The PMUs implemented in the RTDS simulation provided noise-free measurements, which are defined as the
. The PMU measurement errors were regulated by the total vector error (TVE), which is the difference between the true phasor and the measured phasor. The standard maximum permissibility of the TVE is 1% [
32]. To mimic the reality of the PMU measurements, a Gaussian white noise (GWN) was added to all
at the simulator, thus defined as the
. The GWN is a zero mean, user-defined level of variance noise addition to the signal using (
10). To analyze the performance of the D-LSE, 5% of the noise level (variance) was considered in all experiments.
3.1. Modified Two-Area Four-Machine Power System (System 1)
The benchmark two-area symmetric system consists of five buses and two machines in each area, thus representing each substation with a single bus. Two double-circuit tie lines connect the two areas through a tie-line bus. As shown in
Figure 6, the modified two-area four-machine power system model consists of four conventional synchronous generator-based power plants and two additional solar power plants. The modified system contains seven loads at bus 5L, 6L, 7L, 9L, 10-1L, 10-2L, and 11L. The modified two-area four-machine power system model with all typically used substation arrangements has been considered [
28]. All conventional generators were configured with turbine governors, automatic voltage regulators, and power system stabilizers. The simulation used the RSCAD FX 2.1 software on the Real-Time Digital Simulator (RTDS) [
33]. RSCAD software PMUs were utilized as the measurement instruments for this study. Substation 9 was configured as a single bus arrangement (SBA). The SBA was the fundamental arrangement. The reliability of the SBA is low due to a lack of redundancy under breaker, isolator failure, or bus fault. Due to the lack of reliability, using the SBA is limited in practice. Substation 11L was configured as an MTBA. It is important to highlight that the MTBA acts as an SBA substation under normal operation (transfer bus on standby). Thus, the MTBA was not considered in the test cases. Substation 5 was configured as an RBA. Substation 11 was configured as a DBSBA. Substation 8 was configured as a DBDBA. Substation 7 was configured as a BHA. All other substations were configured as SBAs. Further information on each substation arrangement type can be found in [
28]. PMUs were installed in each substation. Thus, the current phasor measurements of each branch connecting to any substation, node voltages, and breaker currents are available. The H-TNTP-PMU was implemented based on the node voltage and branch current phasor measurements from the PMUs. PMUs were collecting measurements at 30 Hz. Three areas were identified for the D-LSE area level in the modified two-area four-machine system, as shown in
Figure 6. The selection was made since Substation 8 was not included in either Area 1 or Area 2. Thus, an additional area was designated to cover Substations 7, 8, and 9 as Area 1–2. Thus, D-LSE Area 1 included the 5G, 5, 5L, 6G, 6, 6L, 12, 7, and 7L substations. Area 1–2 included Substations 7, 8, and 9. Area 2 encompassed Substations 9, 13, 9L, 10G, 10, 10-1L, 10-2L, 11G, 11, and 11L.
The estimation’s accuracy assessment was based on error reduction. An error reduction factor (
), calculated in (
11), indicates the estimation accuracy as many-fold better than the measurement (noisy or bad) received. The
is calculated by taking the inverse of the ratio of the absolute deviation between the estimated state and
against the
and
. The
is a unitless metric.
For accuracy, each test case voltage estimation was analyzed based on the . It is important to emphasize that the for the voltage estimation in SBA type was neglected, since the SBA only considers the available single bus voltage measurement as the estimated value from the weighted average. Furthermore, the SBA is an unreliable arrangement with limited practical use in the transmission network.
Table A1 presents the voltage estimates for all the substations under all three levels when independently operated. Furthermore, the
for the voltage estimation of all three levels is shown in
Table A1. Based on these results, the overall best accuracy under GWN was determined at the substation level.
3.1.1. Steady State with Gaussian White Noise for Topology Change
The D-LSE was tested for the topology changes detected by H-TNTP-PMU [
28]. The topology changes from Topology S1A (fully connected network) considered for the modified two-area four-machine power system are Topology S1B and Topology S1C. The topology changes were selected in accordance with the test cases presented in [
28], which elaborates the topology processing with H-TNTP-PMU. The topology was changed from Topology S1A to Topology S1B by removing TL1111L (single line outage). In the next experiment, the topology was changed from Topology S1A to Topology S1C by removing the double circuit tie lines, TL78-1, TL78-2, TL89-1, and TL89-2 (area separation), as shown in
Figure 6. The H-TNTP-PMU outputs are shown in
Figure 7. The pretopology change (from Topology S1A to Topology S1B or Topology S1C) matrix values are shown in orange, and the post-topology change values are shown in black.
Table A1 presents the steady state voltage estimation for all three levels of the D-LSE in Topology S1A.
Table 1 presents the steady state voltage estimation for all three levels in Topology S1B and Topology S1C. Due to the change in topology from Topology S1A to Topology S1B, Substation 11L was isolated. Due to the change in topology from Topology S1A to Topology S1C, Substation 8 was isolated. The performance of the three levels was tested during the transition from Topology S1A to Topology S1B and Topology S1A to Topology S1C. Furthermore, both topology transitions were conducted under SOTA TNTP, which typically updates the topology in 2 s to 5 s [
15] and H-TNTP-PMU, which typically updates the topology in every PMU data frame [
28]. The topology change experiment followed the setup shown in
Figure 8. The substation-level, area-level, and network-level estimations for Substation 11, which were directly affected by Topology S1A to Topology S1B (TL1111L single line outage) transition, are shown in
Figure 9 and
Figure 10 under both H-TNTP-PMU and SOTA TNTP. The substation-level and area-level estimations for Substation 7, which were directly affected by Topology S1A to Topology S1C (area separation) transition, are shown in
Figure 11 under both H-TNTP-PMU and SOTA TNTP. The start of the transition is indicated using “P”, and the SOTA TNTP detection of the topology change is indicated using “Q” in the
Figure 9,
Figure 10 and
Figure 11. It can be seen that H-TNTP-PMU-based D-LSE and enhanced network-level LSE had an accurate estimation compared to the inefficient SOTA TNTP-based D-LSE and enhanced network-level LSE.
3.1.2. Steady State with Gaussian White Noise and Circuit Breaker Current Bad Data
The substation level of the D-LSE was tested for bad data. The bad data considered in the experiment were based on a common human error: connecting wires in reverse polarity. Thus, the bad data will be the reverse phasor of the
received. At the substation, a circuit breaker current of bad data was applied. The current estimations of the substation level of the D-LSE for the BHA substation arrangement are presented in
Table 2. The measurements highlighted in red are the bad data. The measurements highlighted in blue are the noisy measurements directly affected by the bad data. The normalized residual was used to detect and identify the bad data in the measurements. As it can be seen in
Table 2, a single circuit breaker current bad data can negatively influence the related noisy measurements, which is the basis for handing over the voltage estimation to the subsequent level.
3.1.3. Steady State with Gaussian White Noise, Circuit Breaker Current Bad Data, and Injection Current Bad Data
The substation level of the D-LSE was tested for the inclusion of multiple bad data. A circuit breaker current with bad data and a single injection current with bad data were included at the substation. The current estimation of the substation level of the D-LSE for the BHA substation arrangement is presented in
Table 3. As seen in
Table 3, a single circuit breaker current and a single injection current with bad data significantly influenced the other related measurements and the substation-level estimation accuracy. Although the estimation was more accurate in the substation level under noisy conditions, as shown in the
Table A1 results, the bad data highly deviated from the accuracy of the substation-level estimation. Thus, the state estimation was handed over to the area level under bad data detection at the substation level.
3.1.4. Steady State with Gaussian White Noise and Voltage Measurement Bad Data at Area Level
The substation level of the D-LSE identifies bad data through current estimation, which raises the substation bad data flag and informs the area level regarding the handing over process. The area level filters out the substation that detected bad data and conducts the LSE. Yet, there can be bad voltage phasor measurements at the area level, since substation level bad data detection is limited to the current measurements. Thus, bad data identification is conducted at the area level. The bad data considered were the reverse phasor of the voltage measurement in Substations 6 and 10. The results are presented in
Table 4 for the area level and network level.
3.2. IEEE 68 Bus Power System (System 2)
The IEEE 68 bus power system model simulation and D-LSE implementation were based on the system shown in
Figure 12. The IEEE 68 bus system demonstrates the scalability of the D-LSE. The IEEE 68 bus power system model comprises five areas with 16 conventional synchronous generators [
34]. Area 1 consists of generators G1 to G9. Area 2 consists of generators G10 to G13. Areas 3, 4, and 5 contain a single generator per area, namely G14, G15, and G16. The D-LSE’s area level and network level were implemented on the IEEE 68 bus power system due to the limitations of implementing the substation arrangements of the simulation platform. This test system had no bus overlaps between areas, thus conveniently designating the area level with the buses in designated areas. Furthermore, the whole test system was considered a single entity at the network level.
The area level and network level were implemented into the IEEE 68 bus power system by considering all buses as SBAs, thus neglecting generator buses (Bus ID 1–16), since the generator buses were integrated into the generator module in the simulation model.
3.2.1. Steady State with Gaussian White Noise for Topology Change
The D-LSE was tested for the topology changes detected by H-TNTP-PMU [
28] for the IEEE 68 bus system. The topology changes considered for the IEEE 68 bus system were Topology S2B and Topology S2C. The topologies were selected to avoid bus isolation, where pre- and postconditions are stable.
Table A2 presents the steady state D-LSE voltage estimation for the area level and network level in Topology S2A.
Table 5 presents the steady state voltage estimates for the D-LSE area level in Topology S2B and Topology S2C. In both topology changes, an alternative rerouting path was available. The topology was changed from Topology S2A (fully connected network) to Topology S2B by removing TL68-37 in Area 1, and the topology was changed from Topology S2B to Topology S2C subsequently by removing another single line in Area 2, TL36-34, as shown in
Figure 12. The topology changes are shown in
Figure 13.
3.3. Discussion
The computational efficiency was compared considering the analysis conducted in
Table 6. The D-LSEs were evaluated for practical computational overhead with 50 trials on an Intel Xeon(R) Gold 3.3 GHz system with 63.7 GB RAM for all test cases present in
Table A1 and
Table A2. The execution time was calculated using (
12).
j is either the substation level, area level, or network level. It is important to note that this analysis did not account for communication latency or other processing delays. The computational time within the PMU data rate window as a percentage is shown in the last column of
Table 6.
As a system, the modified two-area four-machine power system is small, and the computation time was less compared to the IEEE 68 bus system. Furthermore, the substation-level and the area-level computational times demonstrate the value of the distributed architecture. Since these two levels can be processed in parallel, the overall computational time can be minimized compared to the network level. This is important for new applications requiring PMU-based state estimation, where the smaller computation overhead is taken by TNTP [
28] and LSE. Thus, it allows for higher computational flexibility for the new applications.
H-TNTP-PMU updates the network model in every PMU measurement frame, and SOTA-TNTP updates the network model in every SCADA measurement frame. The PMU and SMRS sampling at 30 Hz (every 33.33 ms) and every 2 s, respectively, is presented in a timeline as shown in
Figure 14a. Due to the uncertainty of the instance, the network topology change occurred with respect to the PMU and SCADA samples collected; two possible scenarios in the topology identification-based flow can be defined as discussed in [
28]. An extension to the same timeline interpretation, including three levels, is shown in
Figure 14b,c. The delay between the instance the topology change occurred, and the next sample collected by the PMU and SCADA are defined as
and
, respectively.
is the time taken to complete SOTA TNTP, while
refers to the H-TNTP-PMU completion time, where
k refers to either the substation level (SB), area level (A), or network level (N).
refers to the time it takes to complete LSE in each level, where
s is either the substation level (SB), area level (A), or network level (N). The time analysis shown in
Table 7 was conducted for 50 trials for the Topology S1A to Topology S1B change discussed in
Section 3.1.1. It is important to state that out of the 50 trials,
of the time the
was less than 33.33 ms.
A summarized comparison of the three levels of the D-LSE is presented in
Table 8. It can be seen that the substation level’s highest computational time was less than that of the area level. Furthermore, the area level’s highest computational time was less than the network level’s. The robustness considers the ability to accurately estimate under noise (low:
, medium:
, and high:
), which is analyzed using the
in
Table A1 and
Table A2. The resiliency considers estimation algorithm accuracy (low:
and medium:
) under bad data in measurements, which are analyzed using the
in
Section 3.1.2,
Section 3.1.3 and
Section 3.1.4.