Liu, T.; Li, T.; Lv, F.; Liang, B.; Zheng, X.; Wang, H.; Wu, M.; Lu, D.; Zhao, F.
Analysis and Modeling of Mueller–Muller Clock and Data Recovery Circuits. Electronics 2021, 10, 1888.
https://doi.org/10.3390/electronics10161888
AMA Style
Liu T, Li T, Lv F, Liang B, Zheng X, Wang H, Wu M, Lu D, Zhao F.
Analysis and Modeling of Mueller–Muller Clock and Data Recovery Circuits. Electronics. 2021; 10(16):1888.
https://doi.org/10.3390/electronics10161888
Chicago/Turabian Style
Liu, Tao, Tiejun Li, Fangxu Lv, Bin Liang, Xuqiang Zheng, Heming Wang, Miaomiao Wu, Dechao Lu, and Feng Zhao.
2021. "Analysis and Modeling of Mueller–Muller Clock and Data Recovery Circuits" Electronics 10, no. 16: 1888.
https://doi.org/10.3390/electronics10161888
APA Style
Liu, T., Li, T., Lv, F., Liang, B., Zheng, X., Wang, H., Wu, M., Lu, D., & Zhao, F.
(2021). Analysis and Modeling of Mueller–Muller Clock and Data Recovery Circuits. Electronics, 10(16), 1888.
https://doi.org/10.3390/electronics10161888