Antenna on Chip (AoC) Design Using Metasurface and SIW Technologies for THz Wireless Applications
Abstract
:1. Introduction
2. Antenna on Chip Design
3. Comparison with State-of-the-Art AoC
4. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Data Availability Statement
Conflicts of Interest
References
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Parameter | Dimension |
---|---|
Area occupied area by copper patches | μm2 |
Area occupied by aluminium patches | μm2 |
Number of slots on each copper patch | 7 |
Thickness of the aluminium layer | μm |
Thickness of copper patches | μm |
Diameter of the slots | μm |
Gap between slots | μm |
Diameter of the metallic via | μm |
Gap between metallic vias | μm |
Width of gap between the patches | μm |
Thickness of the GaAs layer | μm |
Thickness of the ground-plane (GND) layer | μm |
Ref. | Antenna Design | Fractional Bandwidth (%) (Freq. Range (GHz)) | Gain (dBi) | Eff. (%) | Dimensions (Physical and Electrical) |
---|---|---|---|---|---|
[11] | Patch fed higher order mode DRA | 7.3 [330–355] | Max. 7.9 | Max. 74 | 0.2 × 0.5 mm2 @330 GHz |
[17] | On-chip 3D using Yagi-like concept | 11.8 [320–360] | Max. 10 | Max. 80 | 0.7 × 0.7 × 0.43 mm3 @320 GHz |
[18] | Dipole array antenna | 10.7 [130.3–145] | Max. 20.5 | Max. 59.2 | 32 × 20 × 0.818 mm3 @130.3 GHz |
[19] | Loop antenna | 6 [65–69] | Max. 8 | Max. 96.7 | 0.7 × 1.25 mm2 @65 GHz |
[20] | Half-mode cavity fed DRA | 11.3 [125–140] | Max. 7.5 | Max. 46 | 0.8 × 0.9 × 1.3 mm3 @125 GHz |
[21] | Differential-fed | 33.3 [50–70] | Max. −3.2 | - | 1.5 × 1.5 × 0.3 mm3 @50 GHz |
[23] | Bowtie-slot | 15.4 [90–105] | Max. −1.78 | - | 0.71 × 0.31 × 0.65 mm3 @90 GHz |
[24] | Ring-shaped monopole | 33.3 [50–70] | Max. 0.02 | Max. 35 | - |
[25] | Circular open-loop | 16.1 [57–67] | Max. −4.4 | - | 1.8 × 1.8 × 0.3 mm3 @57 GHz |
[26] | AMC embedded slot antenna | 126 [15–66] | Max. 2 | - | 1.44 × 1.1 × 2 mm3 @15 GHz |
[27] | Monopole | 43.5 [45–70] | Max. 4.96 | - | 1.953 × 1.93 × 0.25 mm3 @45 GHz |
[28] | Dipole-antenna | 7.1 [95–102] | Max. 4.8 | - | - |
[29] | Tab monopole | 50 [45–75] | Max. 0.1 | Max. 42 | 1.5 × 1 mm2 @45 GHz |
[30] | Slot fed stacked DRA | 7.7 [125–135] | Max. 4.7 | Max. 43 | 0.9 × 0.8 × 1.5 mm3 @125 GHz |
[31] | DRA | 15.4 [120–140] | Max. 2.7 | Max. 43 | 0.9 × 0.8 × 0.6 mm3 @120 GHz |
[32] | Patch array antenna | 11.6 [259–291] | Max. 5.2 | - | 2.47 × 1.53 × 0.675 mm3 @259 GHz |
[33] | Octagonal shorted annular ring array antenna | 5.4 [303–320] | Max. 4.1 | Max. 38 | 0.55 × 0.5 × 0.3 mm3 @303 GHz |
This Work | Metasurface and SIW | 10.5 [450–500] | Max. 7.4 | Max. 70 | 0.8 × 0.8 × 0.13 mm3 1.21 × 1.21 × 0.196 @450 GHz |
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Althuwayb, A.A.; Alibakhshikenari, M.; Virdee, B.S.; Benetatos, H.; Falcone, F.; Limiti, E. Antenna on Chip (AoC) Design Using Metasurface and SIW Technologies for THz Wireless Applications. Electronics 2021, 10, 1120. https://doi.org/10.3390/electronics10091120
Althuwayb AA, Alibakhshikenari M, Virdee BS, Benetatos H, Falcone F, Limiti E. Antenna on Chip (AoC) Design Using Metasurface and SIW Technologies for THz Wireless Applications. Electronics. 2021; 10(9):1120. https://doi.org/10.3390/electronics10091120
Chicago/Turabian StyleAlthuwayb, Ayman A., Mohammad Alibakhshikenari, Bal S. Virdee, Harry Benetatos, Francisco Falcone, and Ernesto Limiti. 2021. "Antenna on Chip (AoC) Design Using Metasurface and SIW Technologies for THz Wireless Applications" Electronics 10, no. 9: 1120. https://doi.org/10.3390/electronics10091120
APA StyleAlthuwayb, A. A., Alibakhshikenari, M., Virdee, B. S., Benetatos, H., Falcone, F., & Limiti, E. (2021). Antenna on Chip (AoC) Design Using Metasurface and SIW Technologies for THz Wireless Applications. Electronics, 10(9), 1120. https://doi.org/10.3390/electronics10091120