An Efficiency–Accuracy Balanced Power Leakage Evaluation Framework Utilizing Principal Component Analysis and Test Vector Leakage Assessment
Abstract
:1. Introduction
2. Preliminaries
2.1. Leakage Detection Principle
2.2. Leakage Detection Using TVLA
3. Methodology
3.1. Theoretical Analysis of PCA Principle
Algorithm 1 PCA Procedure |
Input: the original matrix , number of feature dimensions to retain; |
Output: the projection matrix ; |
Steps: |
|
|
3.2. Power Traces Screening Algorithm Based on PCA
Algorithm 2 Power traces screening algorithm based on PCA |
Input: Original power data matrix , number of power traces to retain; |
Output: Screened power data matrix ; |
Steps: |
|
3.3. PCA-TVLA-Based Leakage Detection Framework
4. Experimental Verification
4.1. Verification on the MCU Platform
- The original TVLA [7], hereinafter referred to as Scheme 1;
- The proposed PCA-TVLA-based leakage detection framework, hereinafter referred to as Scheme 2;
- The screening of the power traces using the normal distribution-based method [16], followed by the implementation of TVLA on the retained traces, hereinafter referred to as Scheme 3;
- The screening of the power traces using the dimension reduction-based method [18], followed by the implementation of TVLA on the retained traces, hereinafter referred to as Scheme 4.
4.2. Verification of The FPGA Power Data Set
5. Conclusions
Author Contributions
Funding
Conflicts of Interest
References
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Items | Scheme 1 | Scheme 2 | Scheme 3 | Scheme 4 | |
---|---|---|---|---|---|
Maximum | The t-values | 9.898 | 9.869 | 8.010 | 8.119 |
The corresponding sampling point number | 1138 | 1172 | 1157 | 1157 | |
Minimum | The t-values | −9.873 | −8.698 | −7.382 | −7.126 |
The corresponding sampling point number | 1133 | 1162 | 1173 | 1132 |
Total Sample Sizes | Scheme 1 | Scheme 2 | Scheme 3 | Scheme 4 |
---|---|---|---|---|
100 | 0.816 s | 0.883 s | 0.859 s | 0.969 s |
300 | 1.106 s | 1.073 s | 0.991 s | 0.970 s |
500 | 1.509 s | 1.304 s | 1.095 s | 1.010 s |
700 | 1.953 s | 1.545 s | 1.261 s | 1.321 s |
900 | 2.245 s | 1.680 s | 1.489 s | 1.551 s |
Total Sample Sizes | Scheme 1 | Scheme 2 | Scheme 3 | Scheme 4 |
---|---|---|---|---|
500 | 1.405 s | 1.179 s | 0.956 s | 0.876 s |
1000 | 2.247 s | 1.791 s | 1.259 s | 1.131 s |
1500 | 3.565 s | 2.560 s | 1.883 s | 1.741 s |
2000 | 4.981 s | 3.632 s | 3.013 s | 2.870 s |
2500 | 7.309 s | 5.296 s | 4.417 s | 4.252 s |
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Zheng, Z.; Yan, Y.; Liu, Y.; Li, L.; Chang, Y. An Efficiency–Accuracy Balanced Power Leakage Evaluation Framework Utilizing Principal Component Analysis and Test Vector Leakage Assessment. Electronics 2022, 11, 4191. https://doi.org/10.3390/electronics11244191
Zheng Z, Yan Y, Liu Y, Li L, Chang Y. An Efficiency–Accuracy Balanced Power Leakage Evaluation Framework Utilizing Principal Component Analysis and Test Vector Leakage Assessment. Electronics. 2022; 11(24):4191. https://doi.org/10.3390/electronics11244191
Chicago/Turabian StyleZheng, Zhen, Yingjian Yan, Yanjiang Liu, Linyuan Li, and Yajing Chang. 2022. "An Efficiency–Accuracy Balanced Power Leakage Evaluation Framework Utilizing Principal Component Analysis and Test Vector Leakage Assessment" Electronics 11, no. 24: 4191. https://doi.org/10.3390/electronics11244191
APA StyleZheng, Z., Yan, Y., Liu, Y., Li, L., & Chang, Y. (2022). An Efficiency–Accuracy Balanced Power Leakage Evaluation Framework Utilizing Principal Component Analysis and Test Vector Leakage Assessment. Electronics, 11(24), 4191. https://doi.org/10.3390/electronics11244191