Low-Power FPGA Realization of Lightweight Active Noise Cancellation with CNN Noise Classification
Abstract
:1. Introduction
2. Related Work
3. Proposed Method
3.1. CNN Noise Cancellation
3.2. Even–Odd Buffer
Algorithm 1 Even–odd buffering algorithm for the OLS convolution |
3.3. Coefficient Selection Algorithm
Algorithm 2 Coefficient selection algorithm for the noise classification |
4. Experimental Setup
5. Evaluation
5.1. CNN Noise Cancellation
5.2. Even–Odd Buffer
6. Conclusions
Author Contributions
Funding
Conflicts of Interest
Abbreviations
ANC | Active noise cancellation |
DSP | Digital signal processing |
LMS | Least mean square |
CNN | Convolutional neural network |
SNR | Signal-to-noise ratio |
FFT | Fast Fourier transform |
OLS | Overlap-save |
FIR | Finite impulse response |
HDL | Hardware description language |
FPGA | Field-programmable gate array |
RTL | Register transfer level |
RMSE | Root mean square error |
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Processor | 12th-Gen Intel(R) Core(TM) i7-12700 KF, 3610 MHz, 12 Cores, 20 Logic Processors |
Memory | 16 GB |
Training Tool | MATLAB deep-learning toolbox |
Epoch | 3 |
Batch Size | 128 |
Iteration | 15,888 |
Learning Rate | 8 × |
FFT Size | 256 |
Window Length | 256 |
LMS Algorithm | Fixed Filter | |
---|---|---|
Family | Cyclone V | Cyclone V |
Device | 5CSEMA5F31C6N | 5CSEMA5F31C6N |
Maximum clock frequency | 310.08 MHz | 717.36 MHz |
Total pins | 71/457 | 60/457 |
Logic utilization in ARM | 96/32,070 | 33/32,070 |
Total registers | 145 | 64 |
Dynamic power dissipation | 11.2 mW | 8.74 mW |
Static power dissipation | 411.25 mW | 411.25 mW |
Single Buffer | Even–Odd Buffer | |
---|---|---|
Family | Cyclone V | Cyclone V |
Device | 5CSEMA5F31C6N | 5CSEMA5F31C6N |
Total pins | 71/457 | 77/457 |
Logic utilization in ARM | 96/32,070 | 134/32,070 |
Total registers | 145 | 187 |
Dynamic power dissipation | 20.59 mW | 9.67 mW |
Static power dissipation | 411.25 mW | 411.25 mW |
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Park, S.; Park, D. Low-Power FPGA Realization of Lightweight Active Noise Cancellation with CNN Noise Classification. Electronics 2023, 12, 2511. https://doi.org/10.3390/electronics12112511
Park S, Park D. Low-Power FPGA Realization of Lightweight Active Noise Cancellation with CNN Noise Classification. Electronics. 2023; 12(11):2511. https://doi.org/10.3390/electronics12112511
Chicago/Turabian StylePark, Seunghyun, and Daejin Park. 2023. "Low-Power FPGA Realization of Lightweight Active Noise Cancellation with CNN Noise Classification" Electronics 12, no. 11: 2511. https://doi.org/10.3390/electronics12112511
APA StylePark, S., & Park, D. (2023). Low-Power FPGA Realization of Lightweight Active Noise Cancellation with CNN Noise Classification. Electronics, 12(11), 2511. https://doi.org/10.3390/electronics12112511