A Methodology and Open-Source Tools to Implement Convolutional Neural Networks Quantized with TensorFlow Lite on FPGAs

Round 1

Reviewer 1 Report

The paper introduces a methodology for 7 implementing CNNs quantized with TFLite on FPGAs. The implementation is available as an open-source project.

The paper is easy to read.

However, the key contribution is limited to an improvement to an open-source library. There are research works on CNN on FPGAs.  There is no related work section either. 

The evaluation should report other important classification metrics such as Precision, Recall, F1 Score, AUC-ROC, and MCC (Matthews Correlation Coefficient).

The authors should better discuss/explain the evaluation results – e.g., why drop the performance after quantization?   The authors may be able to take samples of misclassifications and qualitatively analyze them.

 

The authors need to discuss different threats to the validity of their findings. Also, what are the implications of their work? How can your tool be extended to support broad use cases (new hardware, new models, multi-class classification, etc.? 

Good

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 2 Report

The paper describes a methodology and hardware description of a TFLite Convolutional Layer accelerator using integer math operations, suitable for FPGA implementation.

Introduction is well referenced, with relevant references, and it was not found any difficult reading the paper, but there are some points to consider to revision:
- The principal motivation seems to be the "limitation of TFLite is that it does not support CNN inference on FPGA", but this point isn't inspected in deep.
- The software/pre-processing stage (Vitis application) is considered in execution time (Table 4)? 
- The low performance obtained by the accelerator, considering JANFFE dataset processing (lines 233 to 235), needs better clarification. This also need to be better described in Conclusions.
- Is there any issue due to hardware-memory data transfer? The SoC performs all data transfer from memory to core?

 

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Round 2

Reviewer 1 Report

The authors have addressed all of my comments. 

Minor editing of English language required