Xu, C.; Yu, H.; Xi, W.; Zhu, J.; Chen, C.; Jiang, X.
A Polynomial Multiplication Accelerator for Faster Lattice Cipher Algorithm in Security Chip. Electronics 2023, 12, 951.
https://doi.org/10.3390/electronics12040951
AMA Style
Xu C, Yu H, Xi W, Zhu J, Chen C, Jiang X.
A Polynomial Multiplication Accelerator for Faster Lattice Cipher Algorithm in Security Chip. Electronics. 2023; 12(4):951.
https://doi.org/10.3390/electronics12040951
Chicago/Turabian Style
Xu, Changbao, Hongzhou Yu, Wei Xi, Jianyang Zhu, Chen Chen, and Xiaowen Jiang.
2023. "A Polynomial Multiplication Accelerator for Faster Lattice Cipher Algorithm in Security Chip" Electronics 12, no. 4: 951.
https://doi.org/10.3390/electronics12040951
APA Style
Xu, C., Yu, H., Xi, W., Zhu, J., Chen, C., & Jiang, X.
(2023). A Polynomial Multiplication Accelerator for Faster Lattice Cipher Algorithm in Security Chip. Electronics, 12(4), 951.
https://doi.org/10.3390/electronics12040951