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Article
Peer-Review Record

A 96 dB DR Second-Order CIFF Delta-Sigma Modulator with Rail-to-Rail Input Voltage Range

Electronics 2024, 13(6), 1084; https://doi.org/10.3390/electronics13061084
by Juncheol Kim 1, Neungin Jeon 1, Wonkyu Do 2, Euihoon Jung 2, Hongjin Kim 2, Hojin Park 2 and Young-Chan Jang 1,*
Reviewer 1: Anonymous
Reviewer 2: Anonymous
Reviewer 3: Anonymous
Reviewer 4: Anonymous
Electronics 2024, 13(6), 1084; https://doi.org/10.3390/electronics13061084
Submission received: 8 February 2024 / Revised: 7 March 2024 / Accepted: 13 March 2024 / Published: 15 March 2024
(This article belongs to the Special Issue Design of Mixed Analog/Digital Circuits, Volume 2)

Round 1

Reviewer 1 Report

Comments and Suggestions for Authors

The manuscript investigates designing and implementing a second-order delta-sigma modulator (DSM) tailored for sensor applications, featuring a cascaded-of-integrator feedforward (CIFF) architecture and a 3-bit quantizer. While the title effectively encapsulates the study's focus, avoiding abbreviations for clarity without excessively elongating it is advisable. Throughout the text, attention should be given to abbreviation usage to enhance readability.

Line 146 on page 7 has a formatting error that needs correction. Ensuring consistency in formatting enhances the professionalism and readability of the manuscript.

Section 4, which discusses chip implementation and measurement results, requires further elaboration. Providing additional insights into the experimental setup, methodology, and analysis of the obtained results would enrich the section's content and strengthen the manuscript's scientific rigor.

The conclusions section appears too brief. Expanding upon the key findings, implications, and potential avenues for future research would enhance the conclusions' comprehensiveness and significance.

The references cited should be updated to include recent publications within the last 5 years, ensuring the manuscript's relevance and aligning it with current literature.

In Figure 7, which illustrates the layout of the implemented second-order DSM, more details on the subcircuits at the layout level should be provided. A comprehensive description of the layout's subcomponents would enhance the readers' understanding of the implemented design.

Author Response

First of all, authors would like to thank the Editor and Reviewers, for providing good comments to improve the quality of the manuscript. The authors tried their best to reply to the comments received through the paper review and to prepare the revised manuscript.

Author Response File: Author Response.pdf

Reviewer 2 Report

Comments and Suggestions for Authors

The presentation of this paper is well organized. However several improvements are required.

1.       Line 62. What is OP amplifier? Please define and explain. Is OP amplifier the commonly known as the operational amplifier (OpAmp or OA)? Please reconsider the abbreviation.

2.       Where OP amplifier is placed in Figure 1a?

3.       Line 67. Please revise “Mismatches in the 3-bit DAC are output as distortion 67 noise at the output of the DSM by the signal transfer function

4.       Line 91. What tool is used for the mismatches simulation? Is this MATLAB or another analog simulator? What models of the random mismatch variations are used? Is this  

5.       Line 92. What are the unit elements of the DAC?  Are they transistors, blocks, or something else?

6.       Caption of Figure 3 is wrong: a) is probably w/o DWA and b) w/DWA

7.       Line 162. Please revise “Figure 6 shows the circuit diagram of the OP amplifier for the first and second integrators, which the basic architecture of a two-stage OP amplifier”. The verb is missing from the second part of the sentence.

8.       Line 164. “to improve the instability”. Probably the authors mean to improve stability.

9.       Line 181. Why was the unit capacitor value selected in the value of 66 fF? Please comment.

10.   Line 189. The authors didn’t use a reference driver. However, the kickback noise is usually strong. Doesn’t this affect the reference voltage and consequently other parts of the overall system? How do the authors address this problem?

11.   What is per block power consumption?

Comments on the Quality of English Language

Some minor syntax errors must be revised.

Author Response

First of all, authors would like to thank the Editor and Reviewers, for providing good comments to improve the quality of the manuscript. The authors tried their best to reply to the comments received through the paper review and to prepare the revised manuscript.

Author Response File: Author Response.pdf

Reviewer 3 Report

Comments and Suggestions for Authors

It would be nice to mention the specific proces used for fabrication.

"20.300 μm2" - shouldn't be a comma here instead of a period?

Author Response

First of all, authors would like to thank the Editor and Reviewers, for providing good comments to improve the quality of the manuscript. The authors tried their best to reply to the comments received through the paper review and to prepare the revised manuscript.

Author Response File: Author Response.pdf

Reviewer 4 Report

Comments and Suggestions for Authors

The authors presented a second-order delta-sigma modulator (DSM) is for read-out integrated circuits of sensor applications requiring small area and low-power consumption.  The following improvements can be considered:

1- The literature review part should be further expanded to add more details

2- The authors should better clarify the importance of the work compared with other state-of-the art approach in this area.

3- Detailed discussions are required for Fig.9, Fig.10 and Table 1.

4- Complexity and execution time for simulation results can be mentioned.

5- Future work should be presented after future work.

Author Response

First of all, authors would like to thank the Editor and Reviewers, for providing good comments to improve the quality of the manuscript. The authors tried their best to reply to the comments received through the paper review and to prepare the revised manuscript.

Author Response File: Author Response.pdf

Round 2

Reviewer 1 Report

Comments and Suggestions for Authors

This Reviewer thanks the Authors for their efforts in addressing the comments provided in the previous review. The enhancement in quality and clarity of the manuscript is clear.

Firstly, the Authors eliminated formatting errors. They also added and updated sentences effectively to clarify the circuit connections and operations, thereby improving the readability and professionalism of the manuscript.

Additional insights provided in Section 4 and improvements related to Figures (7, 9, 10, and 11) and Tables (1 and 2) significantly enrich the manuscript. The updated Figure 7 and the added descriptions of the layout's subcomponents are highly beneficial. They provide readers with a comprehensive understanding of the implemented design and its layout considerations. In addition, the measured results, including power spectral density and dynamic performance, offer a deeper understanding of the implemented design and also contribute to strengthening the scientific rigor of the study.

The expanded conclusions section now provides valuable information about the implemented second-order CIFF DSM with a 3-bit quantizer. Including design considerations, performance metrics, and potential applications enhanced the comprehensiveness and significance of the conclusions.

Finally, updating references to include recent publications ensured the manuscript's relevance and alignment with current literature, essential for maintaining its scholarly impact. It also assisted in improving the introduction and the discussion of countless Figures in the paper.

Reviewer 4 Report

Comments and Suggestions for Authors

The paper is acceptable in present form.

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