Gallium Nitride Normally-Off Vertical Field-Effect Transistor Featuring an Additional Back Current Blocking Layer Structure

Abstract

A gallium nitride (GaN) semiconductor vertical field-effect transistor (VFET) has several attractive advantages such as high power density capability and small device size. Currently, some of the main issues hindering its development include the realization of normally off operation and the improvement of high breakdown voltage (BV) characteristics. In this work, a trenched-gate scheme is employed to realize the normally off VFET. Meanwhile, an additional back current blocking layer (BCBL) is proposed and inserted into the GaN normally off VFET to improve the device performance. The electrical characteristics of the proposed device (called BCBL-VFET) are investigated systematically and the structural parameters are optimized through theoretical calculations and TCAD simulations. We demonstrate that the BCBL-VFET exhibits a normally off operation with a large positive threshold voltage of 3.5 V and an obviously increased BV of 1800 V owing to the uniform electric field distribution achieved around the gate region. However, the device only shows a small degradation of on-resistance (R_ON). The proposed scheme provides a useful reference for engineers in device fabrication work and will be promising for the applications of power electronics.

1. Introduction

With the rapid development of the power electronics industry, Si- or GaAs-based devices are approaching their material limit. The wide-bandgap semiconductors (known as third-generation semiconductors) have been widely employed and developed owing to their excellent physical properties such as large bandgap and high critical breakdown electric field. Among them, gallium nitride (GaN) is regarded as one of the most promising candidates for application in next-generation power devices [1,2], which is mainly due to the existence of high-density two-dimensional electron gas (2-DEG) in the AlGaN/GaN heterojunction interface induced by the strong polarization effect in wurtzite GaN [3,4]. Hence, the on-resistance (R_ON) and switching frequency of the power devices are improved dramatically.

GaN-based lateral high electron mobility transistor (HEMT) devices have been extensively demonstrated and have made great progress in the past few decades [5,6,7,8]. However, these lateral devices still encounter a few issues such as power density limit and output current collapse. For example, to improve the breakdown voltage (BV), the gate-to-drain distance of the HEMT has to be increased; this results in an obvious increase of the R_ON. Meanwhile, the peak electric field is located at the drain-side gate corner of the HEMT surface, which also leads to a limiting of the device output characteristics and a serious reliability issue when operated under high voltage [9,10]. Another challenge in lateral GaN-based HEMT is how to make the normally off device. Actually, normally off operation is strongly desired for safety and for efficient power switching in the integrated circuits (ICs) or systems for better compatibility. However, a standard AlGaN/GaN HEMT is naturally normally on because of the presence of the 2-DEG channel. Recently, various approaches such as gate-recess etching [5,7], fluorine-ion implantation [10], and p-cap layer deposition [6] have been explored to realize the normally off operation. However, it is still a big challenge to simultaneously obtain a high positive threshold voltage (V_th) and a large drain output current for an HEMT.

To overcome the mentioned issues, GaN vertical field-effect transistor (VFET) devices have been proposed and developed recently [11,12,13,14,15]. The drain electrode of the device is moved to the back of the wafer and, hence, the main electric field and conducting current flow are turned to the vertical direction. The peak point of the electric field is transferred into the bulk where the defect density is less and the crystal quality is better. Furthermore, the field distribution is more uniform. Therefore, the device current collapse is alleviated and the BV characteristics can be improved. Recently, some work has been conducted on normally on VFET devices and significant progress has been achieved. However, there is still a lack of sufficient research on the normally off VFET devices and, in particular, on their design and demonstration to improve the high voltage characteristics. Therefore, GaN power devices featuring both vertical structure and normally off operation will be very promising in the future applications of power electronics, and novel structure design and effective process technology are thus needed.

In this work, an additional back current blocking layer (BCBL) is introduced and inserted into the GaN normally off VFET to improve the BV characteristics. The electrical characteristics of the proposed device (called BCBL-VFET in this work) are investigated and the structural parameters are optimized through theoretical calculations and TCAD simulation work. Firstly, the pn-junction device was fabricated, and the measured I–V characteristics were employed to calibrate the physical parameters of the proposed device in the theoretical calculation and simulation work. Then the distribution characteristics of the electric field and impact ionization concentration were analyzed. Improved BV and R_ON were achieved after optimizing the thickness, depth, and spatial location of the current blocking layer in the GaN BCBL-VFET.

2. The Device Structure

Figure 1 shows the cross-sectional schematic of the proposed GaN BCBL-VFET. The key feature which is different from the conventional one is the introduction of the BCBL below the normal current blocking layer under the source electrode. The specifics of the device structure are listed in

Table 1. Specifics of the proposed GaN BCBL-VFET.

Parameters	Units	Values	Parameter Captions
LD	μm	16.0	Drain length
LCA	μm	5.0	Length of vertical current aperture
LG	μm	5.0	Length of the recessed gate
LTOP-CBL	μm	5.5	Length of the top p-GaN
TTOP-CBL	μm	0.75	Thickness of the top p-GaN
TBUF	μm	10.0	Thickness of the buffer layer

. In the conventional VFET, the breakdown points usually occur at the top pn-junction or at the etched gate corner under high-voltage operation because of the presence of high peak electric field. The additional insertion of the insulated BCBL will distribute the vertical voltage drop and also alleviate the crowding of the electric field around the gate corner. Hence, the BV of the proposed device will be improved significantly. Considering that the device still remains a good vertical current aperture, the output characteristics will not be degraded seriously. The structural parameters of the proposed BCBL such as the thickness, depth, and spatial location will be optimized by the theoretical calculation and simulation work, in detail.

3. Fabrication Work and Parameter Calibration

3.1. Fabrication Process of the PN-Junction Devices

The GaN pn-junction was grown on a 350 μm GaN free-standing substrate using a metal organic chemical vapor deposition (MOCVD) system. The doping concentration of n⁺-GaN substrate was 5 × 10¹⁸ cm^–3. The epitaxial structure consisted of a 6 μm n^–-GaN layer with a background n-type carrier concentration of 5 × 10¹⁶ cm^–3 and a 500 nm p-GaN layer with an Mg doping concentration of 3 × 10¹⁹ cm^–3. The schematic cross-section, process flow, and top view of the fabricated GaN pn-junction device are shown in Figure 2. The Ti/Al/Ni/Au n-type ohmic contact was first formed on the back of the substrate by electron beam evaporation and annealing treatment under 800 ℃ for 60 s in N₂ atmosphere. Edge termination was realized by mesa etching using an inductively coupled plasma (ICP) system under an ambience consisting of Cl₂ and BCl₃ mixed gas. The etching process was continued for 100 s. The Ni p-type ohmic contact was then formed on the p-GaN epitaxial layer also by electron beam evaporation. The annealing temperature was 500 ℃. The diameter of the anode pad was around 400 μm and the photo is shown in Figure 2c.

3.2. Parameter Calibration Process

The I–V characteristics of the pn-junction device were measured by a semiconductor characterization system (Keithley 4200) at room temperature for the purpose of the subsequent parameter calibration. In the TCAD simulation section, similar device configuration and structural parameters were employed. The physical parameters used in the simulations were calibrated by benchmarking the simulated I–V characteristics of the GaN pn-junction device with the experimental data. Figure 2d shows the comparisons of I–V curves which clearly indicates a good data match.

Table 2. Physical parameters adopted in the simulations after calibration.

Symbols	Units	Values	Parameter Descriptions
Eg	eV	3.4	Band gap of GaN at 300 K
εr	--	9.4	Relative permittivity of GaN
λS	eV	3.4	Affinity of GaN
μn	cm2/Vs	600	Electron mobility of GaN
μp	cm2/Vs	20	Hole mobility of GaN
vsat	cm/s	1.2 × 107	Electron saturation velocity of GaN
Em	V/cm	3.5 × 106	Critical electric field of GaN
NC	cm−3	2.2 × 1018	Conduction band state density

lists the employed physical parameters after calibration.

To accurately simulate the device behaviors, appropriate physical models must be selected. In this work, the Shockley–Read–Hall (SRH) model was employed to govern the charge-trapping behavior. The Arora model was employed to determine the doping-dependent mobility for the low-field case. Furthermore, the Canali model was used for the high-field case considering that the carrier drift velocity is no longer proportional to the electric field, instead, the velocity saturates to a finite speed under high voltage. To simulate the off-state breakdown characteristics of power devices, the van Overstraeten–de Man model was used to generate the avalanche induced electron–hole pairs.

4. Results and Discussion

4.1. Parameter Optimization of the BCBL

The pn-junction in the GaN BCBL-VFET acts as the top current blocking layer (TCBL) to sustain the main bias voltage between the drain and source electrodes, which is similar to the case in the conventional VFET. The doping concentration of 8 × 10¹⁷ cm^–3 and thickness of 0.75 μm were employed for the p-GaN layer based on the previous optimal data in the VFET. The concentrations of 5 × 10¹⁸ and 1.75 × 10¹⁶ cm^–3 were employed for the upper n⁺-GaN and the lower n^–-GaN layers, respectively, and the thicknesses of 0.25 and 10 μm were kept for them in the BCBL-VFET for the following simulations.

There are three important structural parameters in the BCBL, i.e., d_BCBL (the distance between the source and the BCBL), L_BCBL (the length of the BCBL), and T_BCBL (the thickness of the BCBL). They will all be optimized systematically by analyzing the BV and R_ON characteristics of the BCBL-VFET. Considering the trade-off between the BV and R_ON, a figure of merit (FOM = BV²/R_ON) value is employed to evaluate the comprehensive device performance. The optimization work for the parameters d_BCBL, L_BCBL, and T_BCBL is discussed as below.

4.1.1. Optimization of d_BCBL

The simulated BV and R_ON data and the calculated FOM values are shown in Figure 3a,b, respectively. It is clear that the BV is increased obviously when the BCBL approaches the gate. All the devices with additional BCBL exhibit obviously improved off-state characteristics. The BV value is more than 1380 V, while the conventional VFET with only TCBL shows a BV value around 1300 V. Moreover, the R_ON variations in the proposed devices are small even though the BCBL is very close to the gate (the reason will be explained and discussed in detail later). This proves the feasibility of the proposed scheme. Figure 3b shows the variation in FOM values with the change in d_BCBL. A high FOM value around 9.1 × 10⁸ W/cm² is found at d_BCBL = 2.0 μm.

Figure 4 shows the distributions of the electric field and impact ionization concentration near the gate in the BCBL-VFET with the changed d_BCBL. The additional BCBL sustains part of the vertical voltage drop and hence improves the BV characteristic. The shared voltage drop is increased with the reduced d_BCBL, and the maximum BV is found at d_BCBL = 2.0 μm. However, it can be observed that the BV will be decreased when the d_BCBL is less than 2.0 μm since an additional high-field peak induced at the corner of the BCBL surpasses the critical electric field of the GaN material. The distributions of impact ionization concentration in Figure 4b confirm the inference. Note that the electron–hole pair production due to avalanche generation requires a certain threshold field strength and the possibility of acceleration, that is, a wide space charge region. More importantly, the ionization peak usually does not occur at the peak point of the electric field. The field peak positions of devices with various d_BCBL are different and the distributions of space charge regions are also different. That is why there is a possible inconsistency between the electric field and impact ionization concentration distributions in Figure 4a,b when the data are derived from the same position inside the device. The impact ionization level induced is much lower in the device with d_BCBL = 2.0 μm, compared with the other cases, although a small sharp field peak arises at the end of the BCBL.

Figure 5 shows the schematic view of the equivalent circuit in the conventional VFET and the proposed BCBL-VFET. The total resistance consists of source contact resistance (R_CS), source resistance (R_n+), channel resistance (R_CH), accumulation layer resistance (R_A), vertical current aperture resistance (R_CA), substrate resistance (R_SUB), and drain contact resistance (R_CD) [16]. Thus, the R_ON of the VFET can be written as:

$${\mathrm{R}}_{\mathrm{on}}={\mathrm{R}}_{\mathrm{CS}}+{\mathrm{R}}_{\mathrm{n}+}+{\mathrm{R}}_{\mathrm{CH}}+{\mathrm{R}}_{\mathrm{A}}+{\mathrm{R}}_{\mathrm{CA}}+{\mathrm{R}}_{\mathrm{SUB}}+{\mathrm{R}}_{\mathrm{CD}}$$

(1)

The R_CA which is the only difference between the conventional VFET (${\mathrm{R}}_{\mathrm{CA}}$) and the BCBL-VFET (${{\mathrm{R}}^{\prime }}_{\mathrm{CA}}$) can be expressed respectively as below.

$${\mathrm{R}}_{\mathrm{CA}}={\mathrm{R}}_{\mathrm{CA}1}+{\mathrm{R}}_{\mathrm{CA}2}$$

(2)

$${{\mathrm{R}}^{\prime }}_{\mathrm{CA}}={{\mathrm{R}}^{\prime }}_{\mathrm{CA}1}+{{\mathrm{R}}^{\prime }}_{\mathrm{CA}2}+{{\mathrm{R}}^{\prime }}_{\mathrm{CA}3}$$

(3)

Here ${\mathrm{R}}_{\mathrm{CA}1}=\rho W_{\mathrm{CA}1}/L_{\mathrm{D}}Z$ and ${{\mathrm{R}}^{\prime }}_{\mathrm{CA}1}=\rho {W^{\prime }}_{\mathrm{CA}1}/L_{\mathrm{D}}Z$ are the uniform resistances in the current aperture, ${\mathrm{R}}_{\mathrm{CA}2}=2\rho W_{\mathrm{CA}2}/\left(L_{\mathrm{D}}+L_{\mathrm{CA}}\right)Z$ and ${{\mathrm{R}}^{\prime }}_{\mathrm{CA}2}=2\rho {W^{\prime }}_{\mathrm{CA}2}/\left(L_{\mathrm{D}}+L_{\mathrm{CA}}\right)Z$ are the ladder-shaped resistances, and ${{\mathrm{R}}^{\prime }}_{\mathrm{CA}3}=\rho {W^{\prime }}_{\mathrm{CA}3}/L_{\mathrm{CA}}Z$ is the resistance between two BCBLs. ρ is the material resistivity and Z is the device dimension perpendicular to the x–y plane.

Considering that $W_{\mathrm{CA}2}$ is approximately equal to ${W^{\prime }}_{\mathrm{CA}2}$, the R_ON variation induced by the insertion of the BCBL can be finally expressed as:

$$\Delta {\mathrm{R}}_{\mathrm{on}}=\frac{\rho {W^{\prime }}_{\mathrm{CA}3}}{Z}\left(\frac{1}{L_{\mathrm{CA}}}-\frac{1}{L_{\mathrm{D}}}\right)$$

(4)

It is clear that $\Delta {\mathrm{R}}_{\mathrm{ON}}$ has a functional dependence on the structural parameters $L_{\mathrm{CA}}$ and ${W^{\prime }}_{\mathrm{CA}3}$. However, this should not be notable because even the total R_CA makes up only a small percentage of the total R_ON in the BCBL-VFET.

4.1.2. Optimization of L_BCBL

The simulated BV and R_ON data and the calculated FOM values with the changed L_BCBL are shown in Figure 6a,b, respectively. Both the BV and R_ON are increased obviously with the increasing L_BCBL mainly due to the narrowing of the vertical current aperture. Figure 6b shows a trade-off between the BV and R_ON, and then an optimal L_BCBL value at around 5.2 μm is determined. Figure 7 shows the distributions of the electric field and impact ionization concentration near the gate in the BCBL-VFET with the changed L_BCBL. The additional BCBL shares the voltage drop in the vertical direction which hence improves the BV characteristics of the devices. The average impact ionization concentration in the device with an L_BCBL around 5.2 μm is the lowest among all these devices which supports the above conclusions.

4.1.3. Optimization of T_BCBL

The simulated BV and R_ON data and the calculated FOM values with the changed T_BCBL are shown in Figure 8a,b, respectively. The effects of T_BCBL variation on both the BV and R_ON are relatively small. Note that the BV characteristic is improved slightly when the T_BCBL increases from 0.1 to 0.4 μm and then the BV decreases; however, the reduction is small and kept within 100 V. Moreover, the R_ON variations in the proposed devices are also found to be small even though the thickness of the BCBL reaches 1.0 μm. This tells us that a relatively free value of T_BCBL can be employed in the BCBL-VFET. This is favorable in the device fabrication. Figure 9a shows the distributions of the electric field around the gate with the changed T_BCBL, which are found to be nearly the same among all these devices with a BCBL. However, a different distribution of impact ionization concentration is found in Figure 9b when the thickness of the BCBL reaches 1.0 μm. An additional peak of impact ionization starts to form around the BCBL corner and hence the BV is reduced. Therefore, the T_BCBL value should be kept at less than 0.6 μm.

4.2. Performances of the Optimized BCBL-VFET

The optimal parameters of d_BCBL, L_BCBL, and T_BCBL were determined to be 2.0, 5.2, and 0.6 μm, respectively. Figure 10 shows the comparisons of electric field distribution profiles between the optimized BCBL-VFET and the control device. It can be observed that the BCBL can shield the electric field from the pn-junction below the source electrode and hence efficiently protect the TCBL. Furthermore, the electric field distribution is made more uniform and the high-field area around the gate corner is reduced. The output dc I_d–V_d, transfer I_d–V_g, gate transconductance g_m, and BV characteristics of the optimized BCBL-VFET are shown in Figure 11. It can be seen clearly that the normally off operation with a large positive V_th (~3.5 V) is realized in the BCBL-VFET. Only a slight degradation of output I_d is found, although the V_th alters by about 1.0 V which might be due to the influence of the BCBL affecting the conducting channel. The degradation of drain current is relatively small at V_gt < 1.5 V and V_d > 8.0 V. To get the optimum performance, the device is recommended to work at about V_gt = 1.5 V and V_d = 10.0 V. The g_m peak is around 800 S/cm² at V_g = 4.5 V and remains nearly the same in comparison to that in the conventional VFET. The large g_m value achieved in the BCBL-VFET ensures a high switching frequency of the device. Furthermore, note that the BV of the proposed device is improved significantly compared with the control one.

Figure 12 summarizes the performance comparisons between the proposed BCBL-VFET and other reported GaN-based power devices including VFET, metal-oxide-semiconductor field-effect transistor (MOSFET), and HEMT devices [17,18,19,20,21,22,23,24,25]. It can be seen that the performance of the BCBL-VFET is closer to the GaN limit, compared with the control device and other work. This demonstrates that the proposed scheme would be very promising in the applications of power electronics.

The simulation work is significant and it helps people better understand the physical mechanism in the VFET and save experimental time. The structural parameters are optimized and provided to people for a better device fabrication. However, the actual operating conditions including the operation temperature, switching process, and matching circuit should be also considered seriously for practical applications [26,27,28,29,30]. It is noteworthy that the optimal device structures in this work are based on the dc characteristics. Due to the thermal and trapping effects under actual operating conditions, the dynamic R_ON and BV can be quite different from the static ones [10,29]. Actually, they are usually worse than the theoretical dc performances, and this needs to be considered in the fabrication work. Nevertheless, the proposed device structure and the optimized results are still constructive and meaningful, and the theoretical trend of device performance changes with the structural parameters should be similar between the dynamic and static ones.

The g_m value in the proposed BCBL-VFET is large enough to improve the device switching rate. Since a GaN semiconductor has high electron mobility and saturation rate, the on/off switching speed of the BCBL-VFET should be fast enough after having a stable fabrication technology and a matching gate drive circuit. In this work, the designed BV rating is more than 1800 V which can be applied in an electric vehicle with 600 V rating even taking into account the deviations from the realistic structural parameters and processing technology. Moreover, GaN-based power devices are very promising in the applications in high-temperature environments. The output current–voltage characteristics can remain stable after repeated high-temperature operations. Based on the previous simulation and measurement data [29], only a small V_th deviation of around 0.1 V was found in the metal-insulator-semiconductor (MIS)-gate GaN-based power devices after several rounds of high-temperature measurements from 25 to 150 ℃. More nonlinear dynamic behaviors and actual operating conditions will be considered and taken into account in the following work.

5. Conclusions

A GaN normally off VFET device with an additional BCBL is introduced and demonstrated. The BCBL can lower the peak electric field around the gate and hence make the electric field distribution uniform, which leads to an obvious improvement of the BV characteristics. The structural parameters of the proposed BCBL-VFET have been optimized through theoretical calculations and TCAD simulations. An improved BV of 1800 V and a slightly increased R_ON of 3.14 mΩ·cm² are achieved in the BCBL-VFET, compared with 1300 V and 2.52 mΩ·cm² in the control VFET device. The FOM value of the proposed device can be up to 1.03 GW/cm², which is 52.5% higher than the control one.