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Article

An Extended-State Observer Based on Smooth Super-Twisting Sliding-Mode Controller for DC-DC Buck Converters

1
Jiangsu Key Laboratory of Power Transmission and Distribution Equipment Technology, College of Information Science and Engineering, Hohai University, Changzhou 213022, China
2
College of Mechanical and Electrical Engineering, Hohai University, Changzhou 213022, China
*
Author to whom correspondence should be addressed.
Mathematics 2023, 11(13), 2835; https://doi.org/10.3390/math11132835
Submission received: 24 May 2023 / Revised: 16 June 2023 / Accepted: 21 June 2023 / Published: 24 June 2023
(This article belongs to the Special Issue Dynamic Modeling and Simulation for Control Systems, 2nd Edition)

Abstract

:
This paper designs a novel smooth super-twisting extended-state observer (SSTESO)-based smooth super-twisting sliding-mode control (SSTSMC) scheme to promote the robust ability and voltage-tracking performance of DC-DC buck converters. First, an SSTESO is proposed to estimate the unknown lumped disturbance and compensate for the estimation of the voltage controller. The SSTESO is realized by constructing a novel smooth function to replace the nonlinear sign function in STESO, which can provide a faster convergence speed and higher estimation accuracy. The SSTSM controller is designed by adopting a similar smooth function to further suppress chattering and improve dynamic response. Comprehensive simulation results demonstrate that the proposed SSTESO-based SSTSMC scheme can improve the robustness and transient response of a DC-DC buck converter system in the presence of external disturbance and parameter uncertainties.

1. Introduction

The sustainable development of humanity requires a wider use of renewable energy sources for electricity generation that have the advantages of high reliability, little need for maintenance, and independence from the supply of fossil fuels. Considering that renewable energy sources usually provide variable DC output voltage, DC-DC buck converters have played an important role in providing adequate power sources for electronic systems and have been extensively adopted in photovoltaic systems [1,2,3], fuel-cell hybrid systems [4], energy storage systems [5], etc. In addition, DC-DC buck converters are also used in many intelligent fields, such as modular drivers for LEDs [6] and off-chip components for Internet of Things applications [7,8,9]. The function of DC-DC buck converters is to convert DC input voltage into another fixed or adjustable DC output voltage, to realize the stable flow of energy.
The main control target of the DC-DC buck converter is to regulate the output voltage and track reference voltage accurately and quickly. However, as a typical nonlinear system, the DC-DC buck converter system contains both external disturbances and parameter uncertainties. It may be difficult to obtain excellent performance using a conventional linear control algorithm. In addition, some application scenarios produce higher voltage accuracy and more stable current for DC-DC buck converters. Therefore, maintaining high-precision voltage-tracking performance and superior robustness in the buck converter has become a research hotspot.
In the early literature, linear controllers such as PI and PID, which maintain acceptable performance around a specific operating point, were widely used in buck converters. However, these linear controllers were sensitive to time-varying external disturbances. In recent decades, more nonlinear control strategies have been applied to DC-DC buck converters, such as model predictive control [10], neural network control [11], adaptive control [12], optimal control [13], sliding-mode control (SMC) [14,15,16], etc.
Among the above-mentioned control methods, SMC for buck converters has attracted significant attention due to its superior precision and robustness. However, chattering is a problem for SMC. To address the chattering problem, a saturation function is proposed to replace the sign function in the conventional sliding-mode algorithm [17]. Nevertheless, indefinite steady errors remain. Super-twisting SMC (STSMC) [18] is another way to suppress chattering by adding an integration element and hiding the discontinuous sign function in the integral term. However, STSMC is still essentially a nonsmooth control algorithm, and a control lag of the integration part also exists. Therefore, a chattering problem still exists as the system parameters change. Another problem with SMC is that its robustness is always limited. Better robustness often depends on increasing the value of the switching gain, which may sacrifice both dynamic and steady-state performance.
To break the constrained relationship between the switching gain and robustness in SMC, extended-state observer (ESO)-based composite sliding-mode controllers have been proposed in [19,20,21]. ESO is the core part of active disturbance rejection control (ADRC), which can estimate the lumped disturbance of a controlled plant using a special mechanism [22,23]. The fact that the estimation error can only be guaranteed to converge to zero asymptotically means that the disturbance will take a long time to be estimated accurately. To speed up the convergence process of a conventional ESO, a super-twisting algorithm was adopted to construct a super-twisting extended-state observer (STESO) by the authors in [24,25]. However, with the introduction of nonlinear functions, a chattering problem is also introduced to STESO. The chattering of disturbance estimation will eventually be superimposed on the control signal, which may make the performance of the composite controller worse. Some intelligent control methods have been developed to control the dynamics systems [26,27,28,29,30,31,32,33,34].
Based on the above-mentioned analysis, a smooth super-twisting sliding-mode controller (SSTSMC) combined with a smooth STESO (SSTESO) is proposed in this paper to enhance the robustness and dynamic performance of a DC-DC buck converter output-voltage regulation system. To improve the convergence speed and the smoothness of a conventional super-twisting algorithm (STA), a novel smooth switch function is constructed. Replacing the sign function in conventional STSMC and STESO with the proposed smooth function, a novel SSTESO-based SSTSMC scheme is obtained. A widely used Lyapunov function is employed to demonstrate the stability of the presented smooth STA (SSTA). Due to the characteristics of the proposed smooth function, the SSTSMC not only accelerates the convergence process but also improves steady-state and robustness performance compared with the conventional STSMC. With SSTESO, this combines the advantages of conventional ESO and STESO, which greatly accelerates the convergence of the estimation error without introducing the chattering problem into the extended-state observer. Then, the proposed control scheme, combining the SSTESO with SSTSMC, can effectively increase the dynamic response speed and improve steady-state performance and robustness. The main contributions and novelty of this paper are as follows:
(1)
A pair of novel smooth functions is constructed to replace the sign function in conventional STA, and the stability of the optimized SSTA is demonstrated. Two sets of SSTESO are designed to estimate the matched and mismatched disturbance in a DC-DC buck converter system. Compared to the traditional ESO, the SSTESO not only accelerates the convergence of estimation error but also guarantees the accuracy of the disturbance estimate.
(2)
A smooth STSMC is proposed by adopting the SSTA to increase the dynamic response speed and further reduce chattering. The proposed SSTESO-based composite SSTSMC scheme is successfully applied to the DC-DC buck converter. Performance comparison experiments among the STSMC, SSTSMC, ESO-based SSTSMC, STESO-based SSTSMC, and SSTESO-based SSTSMC schemes are carried out in simulations that validate the superiority of the proposed control scheme.

2. Conventional STESO-Based STSM Controller Design

2.1. Modeling of a DC-DC Buck Converter

The basic topology of a DC-DC buck converter is shown in Figure 1, which comprises a DC voltage input v i n , a PWM gate drive-controlled switch device Q , a diode D , an output filter inductor L , an output filter capacitor C , and a load resistance R . The switch ON and OFF cases of the DC-DC buck converter are shown with dashed lines 1 and 2, respectively.
The state-space method is used here to analyze the buck converter system. The dynamic model can be written as:
{ d i L d t = v o L + v i n L u d v o d t = i L C v o R C
where v 0 is an output voltage, i L is an inductor current, and the duty ratio u [ 0 , 1 ] denotes the control signal.
The desired output voltage is denoted as v r . The tracking error can be expressed as x 1 = v o v r . It should be noted that the load resistance in practice is usually unknown, and the value of input voltage, filter capacitor, and inductor are not exact. Considering the uncertainties and external disturbances in DC-DC buck converters, the time derivative of tracking error x 1 is as follows:
x ˙ 1 = i L C 0 v o R 0 C 0 + d 1 ( t )
where C 0 and R 0 are the nominal values of capacitor C and load resistance R , respectively, and the lumped disturbance is denoted as d 1 ( t ) = ( 1 C 1 C 0 ) i L + ( 1 R 0 C 0 1 R C ) v 0 .
Then, we define x 2 = i L C 0 v 0 R 0 C 0 . Using (1), the derivative of x 2 is written as follows:
x ˙ 2 = u v i n 0 L 0 C 0 x 1 L 0 C 0 x 2 R 0 C 0 v r L 0 C 0 + d 2 ( t )
where v i n 0 and L 0 are the nominal values of input voltage v i n and inductor L , respectively, and the matched disturbance is denoted as
d 2 ( t ) = d 1 R 0 C 0 + ( v i n L C 0 v i n 0 L 0 C 0 ) u + ( 1 L 0 C 0 1 L C ) v o
Therefore, the dynamic model of the DC-DC buck converter can be rewritten as:
{ x ˙ 1 = x 2 + d 1 ( t ) x ˙ 2 = u v i n 0 L 0 C 0 x 1 L 0 C 0 x 2 R 0 C 0 v r L 0 C 0 + d 2 ( t )
It can be seen that the dynamic model of the buck converter contains both matched and mismatched disturbances.
The objective of the DC-DC buck converter control is to promptly regulate the output voltage to the desired value, i.e., v 0 v d or x 1 0 . The closed-loop system should still exhibit good control performance in the case of external disturbances.

2.2. Conventional STESO-Based STSM Controller

In this subsection, the conventional STESO is first employed to estimate the lumped disturbances d 1 ( t ) and d 2 ( t ) , which performs as feedforward compensation in the following STSM control scheme design.
Regarding the mismatched disturbance d 1 ( t ) as an extended system state, then the first equation of (4) can be reconstructed as
{ z ˙ 1 = x 2 + z 2 z ˙ 2 = d ˙ 1 ( t )
where z 1 = x 1 and z 2 = d 1 ( t ) .
From (5), the estimation of the mismatched disturbance d 1 ( t ) can be easily transformed into the problem of estimating the extended system states z 2 . According to [35], the conventional ESO constructed for (5) is given as follows:
{ e 1 = z ^ 1 z 1 z ^ ˙ 1 = z ^ 2 + x 2 l 1 e 1 z ^ ˙ 2 = l 2 e 1
where l 1 and l 2 are the parameters of ESO, and z ^ 1 and z ^ 2 are the estimations of z 1 and z 2 , respectively.
According to [25], STESO can be constructed by replacing the linear term e 1 in ESO with the nonlinear functions f 1 ( e 1 ) and f 2 ( e 1 ) , as follows:
{ z ^ ˙ 1 = z ^ 2 + x 2 l 1 f 1 ( e 1 ) z ^ ˙ 2 = l 2 f 2 ( e 1 )
where nonlinear functions f 1 ( e 1 ) and f 2 ( e 1 ) are designed based on a generalized super-twisting technique, as follows:
{ f 1 ( e 1 ) = k 1 | e 1 | 1 / 2 sign ( e 1 ) f 2 ( e 1 ) = k 1 2 sign ( e 1 )
with k 1 > 0 .
Similarly, regarding the matched disturbance d 2 ( t ) as an extended system state, a new set of STESO can be constructed to estimate, as follows:
{ e 3 = z ^ 3 z 3 z ^ ˙ 3 = z ^ 4 + u v i n 0 L 0 C 0 x 1 L 0 C 0 x 2 R 0 C 0 v r L 0 C 0 l 3 f 3 ( e 3 ) z ^ ˙ 4 = l 4 f 4 ( e 3 )
with
{ f 3 ( e 3 ) = k 2 | e 3 | 1 / 2 sign ( e 3 ) f 4 ( e 3 ) = k 2 2 sign ( e 3 )
where k 2 > 0 , l 3 and l 4 are the parameters of STESO, z 3 = x 2 , z 4 = d 2 ( t ) , and z ^ 3 and z ^ 4 are the estimations of z 3 and z 4 , respectively. Then the estimated values can be compensated for by the controller to improve the robustness and transient response of the system.
Since the output voltage v o of a DC-DC buck converter system is a DC voltage signal, improving the accuracy and stability of the output signal has become the primary control goal. Therefore, an STSM control algorithm with strong chattering suppression and robustness is adopted in the paper.
The STSM control algorithm was first proposed by Levant [36], and its main feature is to smooth out the discontinuous signal in the conventional first-order sliding-mode (FOSM) controller. For System (4), the STSM control law can be designed as follows:
{ s = c x 1 + x 2 u e = 1 v i n 0 ( x 1 + L 0 R 0 x 2 + v r c L 0 C 0 x 2 ) u s = μ 1 | s | 1 / 2 sign ( s ) + u I u ˙ I = μ 2 sign ( s ) u * = u e + L 0 C 0 v i n 0 u s
where s is the sliding-mode state variable, c > 0 is the sliding-mode constant, μ 1 and μ 2 are the control gains, u e is the equivalent control term, u s is the switching control term, u I is the integral term in u s , and u * is the control signal.
The stability and finite-time convergence of the STSM controller are proved in previous literature [18].
After estimating the lumped disturbance by STESO, the composite STSM control law is designed as follows:
u * = u e + L 0 C 0 v i n 0 ( u s c z ^ 2 z ^ 4 z ^ ˙ 2 )
Consequently, the STESO-based STSM controller for a DC-DC buck converter system is constructed. The estimation of the mismatched disturbance d 1 ( t ) and matched disturbance d 2 ( t ) can be estimated by the actual system state x 1 , x 2 , and control signal u * .
This composite control scheme provides a method that depends on accurate feedforward compensation to eliminate the influence of lumped disturbance without sacrificing other control performance. However, with the application of the super-twisting algorithm to ESO, which effectively accelerates the convergence of the estimation error, the chattering problem is also introduced into STESO. The chattering of the disturbance estimation will eventually be superimposed on the control signal, which may affect the dynamic response and static performance of the system. In addition, the chattering suppression ability of STSMC can be further improved by adopting a smooth function to replace the sign function.

3. SSTESO-Based Smooth STSMC Design

3.1. Design of SSTESO

To ensure both convergence speed and smoothness of disturbance estimation, a pair of smooth functions are constructed to replace the sign function in STESO, as follows:
{ g 1 ( x ) = | x | 1 / 2 arctan ( x α 1 ) g 2 ( x ) = arctan ( | x α 1 | ) [ 1 2 arctan ( x α 1 ) + x α 1 + x 2 / α 1 ]
with α 1 > 0 .
Remark 1.
A new parameter  α 1  is introduced to improve the applicability of the novel smooth functions in different application scenarios. By setting the appropriate parameter  α 1 , both the response speed and smoothness of the system can be guaranteed, even if the state variables are of different orders of magnitude in different systems.
Remark 2.
It should be noted that the function gain of  arctan ( e 1 / α 1 )  is larger than that of  sign ( e 1 )  when the estimation error is far away from the origin, which can make the estimation error converge to the neighborhood of the origin more rapidly. In addition, the smaller gain of  arctan ( e 1 / α 1 )  when the estimation error is near the origin can guarantee the smoothness of disturbance estimation in the zero domain. By this simple analysis, it is concluded that this inverse tangent function is superior to the sign function.
From (13), the SSTESO to estimate disturbance  d 1 ( t )  can be constructed as follows:
{ z ^ ˙ 1 = z ^ 2 + x 2 l 1 k 1 g 1 ( e 1 ) z ^ ˙ 2 = l 2 k 1 2 g 2 ( e 1 )
Letting  e 2 = z ^ 2 z 2  and subtracting (14) from (5), one obtains:
{ e ˙ 1 = θ 1 g 1 ( e 1 ) + e 2 e ˙ 2 = θ 2 g 2 ( e 1 ) d ˙ 1 ( t )
where θ 1 = l 1 k 1  and  θ 2 = l 2 k 1 2 .
Similarly, a new set of SSTESO to estimate matched disturbance d 2 ( t ) can be constructed as follows:
{ z ^ ˙ 3 = z ^ 4 + u v i n 0 L 0 C 0 x 1 L 0 C 0 x 2 R 0 C 0 v r L 0 C 0 l 3 k 2 g 1 ( e 3 ) z ^ ˙ 4 = l 4 k 2 2 g 2 ( e 3 )
Letting e 4 = z ^ 4 z 4 , the estimation error equation can be written as follows:
{ e ˙ 3 = l 3 k 2 g 1 ( e 3 ) + e 4 e ˙ 4 = l 4 k 2 2 g 2 ( e 3 ) d ˙ 2 ( t )
which is similar to (15). Therefore, only the convergence of ( e 1 , e 2 ) in (15) is analyzed.
Assumption 1.
Considering the mismatched disturbance  d 1 ( t )  and matched disturbance  d 2 ( t )  in System (4) are continuous and assumed to satisfy the following condition:
| d ˙ 1 ( t , e ) g 2 ( e 1 ) | D ,   | d ˙ 2 ( t , e ) g 2 ( e 3 ) | D
where D is a positive constant and assume  D > 1 .
Remark 3.
The essence of SSTESO is to estimate the unknown lumped disturbance and compensate for the estimated values to the voltage controller,  | d i ( t , e ) | ( i = 1 , 2 )  vanishes as  e i 0 ( i = 1 , 2 , 3 , 4 ) . Therefore, Assumption 1 is reasonable.
Theorem 1.
Let  θ 1 > D > 1  and  θ 2  satisfy
θ 2 > D 2 θ 1 2 1 + D
If Assumption 1 is satisfied, the SSTESO designed as (14) for System (5) can drive the estimation errors ( e 1 , e 2 ) ( 0 , 0 ) .
Proof. 
Selecting the Lyapunov function for System (15) is as follows:
V ( e 1 , e 2 ) = ξ T P ξ
where ξ T = [ | e 1 | 1 / 2 arctan ( e 1 / α 1 ) , e 2 ] , and P is a symmetrical matrix constructed as
P = [ r q q 2 ] = [ θ 1 2 + 2 θ 2 θ 1 ( θ 1 1 ) ( θ 1 1 ) 2 ]
The determinant of P can be computed as:
det ( P ) = θ 1 2 + 4 θ 2 1
From (19), it follows straightforwardly that 4 θ 2 > D > 1 , and hence det ( P ) > 0 . Concurrently, since the bottom-right entry of P is positive, P is positive definite.
Consider that the time derivative of vector ξ is as follows:
ξ ˙ = g ˙ 1 ( | e 1 | ) A ( δ ( t , e ) ) ξ
where
A ( δ ( t , e 1 ) ) = [ θ 1 1 θ 2 + δ ( t , e 1 ) 0 ] ,    δ ( t , e 1 ) = d ˙ 1 ( t ) g 2 ( | e 1 | ) sign ( e 1 )
From Assumption 1, it is clear that | δ ( t , e 1 ) | D . Then, the time derivative of the Lyapunov function can be given as:
V ˙ ( e 1 , e 2 ) = g ˙ 1 ( | e 1 | ) ξ T Q ( δ ( t , e 1 ) ) ξ
where
{ a ( t , e 1 ) = θ 2 + δ ( t , e ) , Q ( δ ( t , e 1 ) ) = [ 2 θ 1 r 2 q | a ( t , e 1 ) | 2 | a ( t , e 1 ) | r θ 1 q 2 | a ( t , e 1 ) | r θ 1 q 2 q ]
For all possible values of a ( t , e 1 ) , since | δ ( t , e 1 ) | D and θ 2 > D , then a ( t , e 1 ) [ θ 2 D , θ 2 + D ] ( , 0 ) . Therefore, all possible values of a ( t , e 1 ) are negative and
θ 2 D | a ( t , e 1 ) | θ 2 + D
Then, the determinant of Q ( δ ( t , e 1 ) ) can be computed as follows:
det ( Q ( δ ( t , e 1 ) ) ) = r 2 + c 1 ( t , e 1 ) r c 0 ( t , e 1 )
where
{ c 1 ( t , e 1 ) = 4 | a ( t , e 1 ) | + 2 θ 1 ( θ 1 1 ) c 0 ( t , e 1 ) = 4 | a ( t , e 1 ) | ( θ 1 1 ) 2 + [ θ 1 ( θ 1 1 ) 2 | a ( t , e 1 ) | ] 2
Both c 0 ( t , e 1 ) and c 1 ( t , e 1 ) are positive. In addition, from (25), it can be computed that
c 1 2 ( t , e 1 ) 4 c 0 ( t , e 1 ) = 16 | a ( t , e 1 ) | ( θ 1 2 1 ) > 0
Therefore, the roots of det ( Q ( t , e 1 ) ) as a polynomial in r are always real. These roots are:
r 1 = c 1 ( t , e 1 ) c 1 2 ( t , e 1 ) 4 c 0 ( t , e 1 ) 2 , r 2 = c 1 ( t , e 1 ) + c 1 2 ( t , e 1 ) 4 c 0 ( t , e 1 ) 2
From (19), the minimum value of r 2 over all possible values of | a ( t , e 1 ) | is given by:
r 2 min = 2 ( θ 2 D ) + θ 1 2 θ 1 + 2 ( θ 2 D ) ( θ 1 2 1 ) > θ 1 2 + 2 θ 2 θ 1 = r
In addition, using (19) again obtains
r 1 < 2 ( θ 2 + D ) + θ 1 2 θ 1 2 ( θ 2 D ) ( θ 1 2 1 ) < θ 1 2 + 2 θ 2 θ 1 = r .
Therefore, the inequality r 1 < r < r 2 holds for all possible values of | a ( t , e 1 ) | , and it follows from (25) that det ( Q ( t , e 1 ) ) > 0 . Concurrently, with the bottom-right entry of Q ( t , e 1 ) is 2 q = 2 ( θ 1 1 ) > 0 , and Q ( t , e 1 ) is positive definite.
It is clear that g ˙ 1 ( | e 1 | ) > 0 for all e 1 > 0 . This latter fact, jointly with (24), implies that
V ˙ ( e 1 , e 2 ) g ˙ 1 ( | e 1 | ) λ min ( Q ( δ ( t , e 1 ) ) ) ξ 2 0
Thus, the proposed SSTESO constructed as (14) will drive the estimation errors ( e 1 , e 2 ) ( 0 , 0 ) . Then, the unknown disturbance d 1 ( t ) can be estimated by the SSTESO. □
Similarly, the matched disturbance d 2 ( t ) can be estimated accurately when the estimation error of SSTESO converges to the origin. Moreover, the block diagram of the two sets of SSTESO is shown in Figure 2.
Through the two sets of SSTESO designed above, the lumped disturbance d 1 ( t ) , d 2 ( t ) and the time derivative of mismatched disturbance d ˙ 1 ( t ) can be estimated accurately as z ^ 2 , z ^ 4 , and z ^ ˙ 2 , respectively. Then, these estimated values can be compensated for by the voltage controller to improve the robustness of the system.

3.2. SSTESO-Based SSTSMC Design

Super-twisting SMC, which is one of the high-order SMCs, can achieve chattering suppression and eliminate the steady error by adding the integration element. However, STSMC is still essentially a nonsmooth control algorithm, and the control lag of the integration part also exists.
Therefore, in this paper, an algorithm is proposed to realize the smoothness in the zero domain of the nonsmooth control algorithm. This new control algorithm, called SSTSMC, is realized by constructing a pair of novel simple smooth functions to replace the switch function in conventional STSMC and is constructed as:
{ s ˙ = μ 1 | s | 1 / 2 arctan ( s β ) + u I u ˙ I = μ 2 arctan ( | s β | ) [ 1 2 arctan ( s β ) + s β + s 2 / β ]
where μ 1 > 0 and μ 2 > 0 are the control gains, β > 0 is an adjustable parameter. Then, the control scheme based on SSTSMC for the DC-DC buck converter can be constructed.
First, the sliding-mode surface for System (4) can be formulated as follows:
s = c x 1 + x ˙ 1 = c x 1 + x 2 + d 1 ( t )
where c > 0 is the constant to be designed.
Subject to the nominal plant model (4), the time derivative of s is given by
s ˙ = c x 2 + u v i n 0 L 0 C 0 x 1 L 0 C 0 x 2 R 0 C 0 v r L 0 C 0 + d i s ( t )
where d i s ( t ) = c d 1 ( t ) + d 2 ( t ) + d ˙ 1 ( t ) is the lumped disturbance.
Letting s ˙ = 0 in (29), we obtain the equivalent controller as follows:
u e q = 1 v i n 0 ( x 1 + L 0 R 0 x 2 + v r c L 0 C 0 x 2 ) L 0 C 0 v i n 0 d i s ( t )
However, the lumped disturbance is usually unknown in practice. Thus, the lumped disturbance d i s ( t ) in the equivalent controller can be replaced by the estimated values d i ^ s ( t ) = c z ^ 2 + z ^ 4 + z ^ ˙ 2 from SSTESO proposed above. The new equivalent controller can be obtained as follows:
u e q = 1 v i n 0 ( x 1 + L 0 R 0 x 2 + v r c L 0 C 0 x 2 ) L 0 C 0 v i n 0 d i ^ s ( t )
From (29), the reaching law can be obtained as follows:
{ u s w = μ 1 | s | 1 / 2 arctan ( s β ) + u I u ˙ I = μ 2 arctan ( | s β | ) [ 1 2 arctan ( s β ) + s β + s 2 / β ]
Combining Equations (31) and (32), the control law u * for System (4) can be obtained as follows:
u * = u e q + L 0 C 0 v i n 0 u s w
Taking the control law (33) to (29), the time derivative of the sliding-mode variable s can be written as follows:
s ˙ = u s w + c ( d 1 ( t ) z ^ 2 ) + ( d 2 ( t ) z ^ 4 ) + ( d ˙ 1 ( t ) z ^ ˙ 2 ) = u s w + c e 2 + e 4 e ˙ 2
By proof of SSTESO, the estimation error e i ( i = 1 , 2 , 3 , 4 ) will converge to zero. Thus, we assume that the estimated values of SSTESO are accurate and compensated for by the controller in time to make e i = 0 ( i = 1 , 2 , 3 , 4 ) . Then, s ˙ can be obtained as follows:
{ s ˙ = μ 1 | s | 1 / 2 arctan ( s β ) + u I u ˙ I = μ 2 arctan ( | s β | ) [ 1 2 arctan ( s β ) + s β + s 2 / β ]
which is similar to Equation (15). Therefore, the stability analysis of SSTSMC is similar to SSTESO, and is omitted here.
Consequently, the proposed SSTESO-based SSTSM control scheme is constructed completely, and the structure diagram of this controller is shown in Figure 3.

4. Simulation Study

In this section, the effectiveness and reliability of the proposed SSTESO-based SSTSMC scheme for the DC-DC buck converter are verified using MATLAB/Simulink. In Simulink, the simulation step size is set to 1.0 × 10 5 s , and the switching frequency of the system is set to 50 kHz.
To illustrate the superiority of the proposed control strategy, two sets of comparative analysis are conducted: (1) comparing SSTSMC with STSMC; (2) comparing SSTESO+SSTSMC with conventional ESO+SSTSMC and STESO+SSTSMC schemes. The specific parameters of the DC-DC buck converter are listed in Table 1. Moreover, the reaching laws of conventional STSMC are shown in (36).
{ u s w S T = μ 1 | s | 1 / 2 sign ( s ) + u 1 u ˙ 1 = μ 2 sign ( s )
For fair comparison, the parameters of STSMC, SSTSMC, ESO+SSTSMC, STESO+SSTSMC, and SSTESO+SSTESO are the same. All the parameters used in these controllers are obtained through a trial-and-error method to achieve better tracking and robustness performance, and the relevant values are shown in Table 2.
To compare the responses of these controllers under disturbance rejection and parameter uncertainty, the following simulation tests are performed in the buck converter system: (1) Startup-phase analysis; (2) Reference-voltage variation; (3) Linear load-resistance variation; (4) Input-voltage variation.

4.1. Controller Comparative Analysis

(1)
Startup-Phase Analysis
In this simulation, the reference voltage V r e f is set to 12 V, and the load resistance remains unchanged at 30   Ω . The response curves of the output voltage during the startup phase are shown in Figure 4. In the voltage-rise phase, because the sliding-mode state variable s is far away from the origin, the function gain of arctan ( s / β ) is larger than sign ( s ) . Therefore, SSTSMC makes the output voltage reach the desired voltage faster than STSMC. Then, in the voltage-adjustment phase, s reaches the neighborhood of the origin and the function gain of arctan ( s / β ) is smaller than that of sign ( s ) . For this reason, SSTSMC makes the system have less overshoot and a shorter startup time. Compared to STSMC, SSTSMC takes less time to reach a steady state and reduces voltage overshoot, which proves that SSTSMC can accelerate the convergence and provide better transient characteristics.
(2)
Reference-Voltage Variations
The reference voltage is changed from 12 V to 15 V at 1 s, and the load resistance remains at 30   Ω . The dynamic processes of the output voltage using both strategies during the reference changes are shown in Figure 5. It can be seen from Figure 5 that because the rise of the reference voltage is small, there is no overshoot in the output voltage during the voltage-adjustment phase. Furthermore, the output voltage of the SSTSMC strategy tracks the new reference voltage successfully to within 12 ms, which is shorter than that of the STSMC strategy by 37%. This result proves that SSTSMC has superior tracking performance for reference trajectory tracking.
(3)
Linear Load-Resistance Variations
The voltage fluctuation owing to external disturbances is evaluated. The simulation conditions for this time are that the output-voltage reference value remains unchanged at 12 V, and the load resistance is changed from 30   Ω to 20   Ω at 1 s. The response curves of the output voltage during the load changes are shown in Figure 6. Since the sliding-mode gain of SSTSMC is larger than that of STSMC at the moment of the introduction of disturbance, SSTSMC responds more quickly to external disturbance. From Figure 6, the recovery time and drop voltage of SSTSMC is measured as 78 ms and 0.10 V, respectively, which are both smaller than that of STSMC.
According to the simulation results, the proposed SSTSMC control strategy has shown better robustness and resistance to disturbance ability compared to the STSMC. As with the load change, the performance of the proposed SSTSMC strategy is optimal.
(4)
Input-Voltage Variations
Considering the input voltage cannot be kept at the nominal value all the time in practical engineering applications, the input voltage v i n 0 in the actual test will fluctuate boundedly around the nominal value. Therefore, to further investigate the robustness of the proposed SSTSMC strategy, a sinusoidal disturbance signal ( 10 sin 1000 π t ) is added on the nominal value of the input voltage v i n 0 with the output-voltage reference value remaining unchanged at 12 V and the load resistance remaining unchanged at 30   Ω . The simulation results are shown in Figure 7.
From Figure 7, the voltage fluctuations under the STSMC strategy are 2.56 mV, while the SSTSMC strategy reduces voltage fluctuations by 24% (1.94 mV), which means, from another perspective, that the SSTSMC strategy is more robust and has a better dynamic adjustment ability in face of input-voltage time-varying disturbance.
The simulation results mentioned above show that the SSTSM control strategy can greatly reduce the impact of disturbance, increase the dynamic response speed, and improve the robustness of the closed-loop control system. Therefore, the SSTSMC is chosen as the basic controller to compare the SSTESO with ESO and STESO to prove the superiority of the proposed SSTESO+SSTSMC scheme.

4.2. Extended-State Observer Comparative Analysis

In this section, the SSTSMC is selected as the controller and combined with different extended-state observers for simulation. The simulation conditions are similar to the previous section, and the controller parameters are shown in Table 2.
(1)
Startup-Phase Analysis
The simulation results during the startup phase of the system using three control schemes are shown in Figure 8 and Table 3. It can be seen from Figure 8c,d that the SSTESO spends the shortest time among the three observers to make the disturbance estimation z ^ 2 and z ^ 2 converge to the origin when there is no external disturbance in the system. Before the disturbance estimation converges to the origin, the disturbance estimates will also be compensated for by the controller. Therefore, from Figure 8a, the output-voltage response speed of the controllers with ESO is faster than that of the controller without ESO in the voltage-rise phase. Furthermore, because the convergence speed of conventional ESO and STESO is not as fast as SSTESO, a long compensation will lead to a larger overshoot of the system output voltage and a longer startup time in the startup phase. Compared to the data in Table 3, the overshoot of output voltage of the SSTESO+SSTSMC scheme is even smaller than SSTSMC without the extended-state observer. Moreover, Figure 8c shows that there is a static error in the disturbance estimation of STESO but not in SSTESO, and the estimated disturbance value of STESO exhibits larger chatter than that of SSTESO.
To sum up, SSTESO has a faster convergence speed and better disturbance estimation accuracy than STESO and conventional ESO. In addition, the SSTESO+SSTSMC scheme can accelerate the convergence rate of the system and provide better transient characteristics.
(2)
Reference-Voltage Variations
The simulation curves of output voltage, estimation error, and disturbance estimate during the reference change are shown in Figure 9. As can be seen from Figure 9a, the curves of output voltage during the reference-voltage step-up are similar to those of the startup phase. However, because the rise in reference voltage is small, the output voltage of the STESO+SSTSMC and SSTESO+SSTSMC schemes tracks smoothly from 12 V to 15 V without overshoot within 11 ms. Furthermore, because of the slow convergence rate of ESO, the overshoot (75 mV) and adjustment time (47 ms) of ESO+SSTSMC in the adjustment phase are both large. It also can be seen from Figure 6b, c that the convergence rate of estimation error e 1 and disturbance estimation z ^ 2 of STESO and SSTESO is much faster than that of ESO. However, compared with SSTESO, there is still a static error and a large chattering in the disturbance estimation z ^ 2 of STESO. It can be seen in Figure 9d that, because the value of disturbance estimation z ^ 4 is very large and there is a linear term in ESO, the convergence time of ESO is slightly shorter than that of STESO and SSTESO.
It can be concluded that SSTESO combines the advantages of ESO and STESO, which have faster convergence rates and more accurate disturbance estimations.
(3)
Linear Load-Resistance Variations
The dynamic processes of three strategies under linear load-resistance change conditions are shown in Figure 10. It can be seen from Figure 10c that, when the disturbance is introduced into the system at 1 s, the disturbance estimation z ^ 2 of STESO and SSTESO converge to a value quickly within 1 ms. Furthermore, it takes 158 ms for the z ^ 2 of conventional ESO to converge to the same value as SSTESO. There is a static error and a large chattering in the disturbance estimation of STESO when it is stable, while the disturbance estimation of SSTESO has better accuracy and smoothness. A similar conclusion can be drawn from Figure 10b. Figure 10d shows the curves of disturbance estimation z ^ 4 , which outlines that the convergence rates of all three schemes are similar. Furthermore, the SSTESO has a smaller disturbance estimation to compensate for the controller when the disturbance becomes larger, making the controller respond faster to the disturbance. Moreover, for disturbance estimation z ^ 4 , SSTESO has better smoothness than STESO. Then, in Figure 10a, because of the faster convergence rate and more accurate disturbance estimation of SSTESO, the output voltage of the SSTESO+SSTSMC scheme has the smallest drop in voltage and the shortest recovery time among all three schemes when the load resistance steps down. Simulation results show the proposed SSTESO+SSTSMC scheme has better robustness and resistance in the presence of disturbance.
(4)
Input-Voltage Variations
A sinusoidal disturbance signal ( 10 sin 1000 π t ) is added based on the nominal value of the input voltage v i n 0 to investigate the robustness of the proposed SSTESO+SSTSMC strategy, as shown in Figure 11. The output-voltage chattering of the STESO+SSTSMC scheme is larger than that of the other two schemes. That is because the external disturbance of this system caused by the input-voltage fluctuation is not large, and so the ESO and SSTESO with better smoothness perform better in this simulation. The fluctuation in the disturbance estimation in STESO is larger, and this chattering will be superimposed on the control signal eventually, which will aggravate the fluctuation in output voltage. The voltage fluctuation under the STESO+STSMC scheme is 2.48 mV, which is even larger than that of SSTSMC without an extended-state observer. Furthermore, the voltage fluctuation under the SSTESO+STSMC scheme is 1.89 mV, which is slightly smaller than the scheme with only the controller. The above analysis shows that, if the estimated value of the observer is not accurate enough, the robustness of the controller may become worse in the presence of input-voltage variations.

4.3. Detail Results Analysis and Summary

To compare the control schemes in a useful manner, performance criteria are very useful. In this article, two criteria have been favored, namely voltage maximum rise or fall v r and adjustment time t s . Table 3 presents detailed simulation results of different control schemes under the first three simulation tests. It can be concluded that, because of the characteristic of the proposed smooth function, the dynamic performance and robustness of SSTSMC are better than that of STSMC. In addition, for the extended-state observers, the proposed SSTESO can greatly improve the speed of convergence compared to conventional ESO. In addition, there is almost no fluctuation in the estimated value of SSTESO, which makes the compensation to the controller more accurate. The data in Table 3 shows that the proposed SSTESO+SSTSM control scheme can effectively improve the dynamic tracking performance and robustness of the system.

5. Conclusions

This paper proposes a smooth super-twisting extended-state observer-based smooth super-twisting sliding-mode control scheme for DC-DC buck converters with matched and mismatched disturbances. First, the improved smooth super-twisting algorithm not only accelerates the convergence speed but also ensures the smoothness of the system near the zero domain. Then, compared to the conventional ESO, the proposed SSTESO can make the estimation error converge to the origin faster, but it does not introduce chattering into disturbance estimation like STESO, which provides higher estimation accuracy. Simulation and experimental results demonstrate that the proposed SSTESO+SSTSMC scheme has a faster response time, better tracking performance, and stronger robustness against output-power variation and parameter uncertainties.

Author Contributions

Conceptualization, J.F.; methodology, D.J. and Y.F.; writing—original draft preparation, D.J.; writing—review and editing, J.F. All authors have read and agreed to the published version of the manuscript.

Funding

This work is partially supported by the National Science Foundation of China under Grant No. 62273131.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. The topology of DC-DC buck converter.
Figure 1. The topology of DC-DC buck converter.
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Figure 2. The block diagram of two sets of SSTESO.
Figure 2. The block diagram of two sets of SSTESO.
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Figure 3. Control structure of SSTESO-based SSTSMC for a DC-DC buck converter.
Figure 3. Control structure of SSTESO-based SSTSMC for a DC-DC buck converter.
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Figure 4. Output voltages of the two sliding-mode controllers at startup.
Figure 4. Output voltages of the two sliding-mode controllers at startup.
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Figure 5. Output voltages of the two sliding-mode controllers when the reference changes.
Figure 5. Output voltages of the two sliding-mode controllers when the reference changes.
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Figure 6. Output voltages of the two sliding-mode controllers when the load steps down.
Figure 6. Output voltages of the two sliding-mode controllers when the load steps down.
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Figure 7. Output voltages of the two sliding-mode controllers when input voltage varies.
Figure 7. Output voltages of the two sliding-mode controllers when input voltage varies.
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Figure 8. Response curves of the three control schemes at startup. (a) Output voltage v o , V . (b) Convergence curve of estimation error e 1 . (c) Disturbance estimation of d 1 ( t ) . (d) Disturbance estimation of d 2 ( t ) .
Figure 8. Response curves of the three control schemes at startup. (a) Output voltage v o , V . (b) Convergence curve of estimation error e 1 . (c) Disturbance estimation of d 1 ( t ) . (d) Disturbance estimation of d 2 ( t ) .
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Figure 9. Response curves of the three control schemes when the reference changes. (a) Output voltage v o , V . (b) Convergence curve of estimation error e 1 . (c) Disturbance estimation of d 1 ( t ) . (d) Disturbance estimation of d 2 ( t ) .
Figure 9. Response curves of the three control schemes when the reference changes. (a) Output voltage v o , V . (b) Convergence curve of estimation error e 1 . (c) Disturbance estimation of d 1 ( t ) . (d) Disturbance estimation of d 2 ( t ) .
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Figure 10. Response curves of the three control schemes when the load steps down. (a) Output voltage v o , V . (b) Convergence curve of estimation error e 1 . (c) Disturbance estimation of d 1 ( t ) . (d) Disturbance estimation of d 2 ( t ) .
Figure 10. Response curves of the three control schemes when the load steps down. (a) Output voltage v o , V . (b) Convergence curve of estimation error e 1 . (c) Disturbance estimation of d 1 ( t ) . (d) Disturbance estimation of d 2 ( t ) .
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Figure 11. Output voltages of the three control schemes when input-voltage variations.
Figure 11. Output voltages of the three control schemes when input-voltage variations.
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Table 1. Nominal parameter values.
Table 1. Nominal parameter values.
DescriptionParameterValueUnits
Inductor L 0 6.0 × 10 3 H
Capacitor C 0 2.2 × 10 3 F
Load resistance R 0 30 20 Ω
Input voltage v i n 0 25V
Reference voltage v r 12 15 V
Table 2. Controller parameter values.
Table 2. Controller parameter values.
ControllersParameters and Values
STSMC c = 5.70 × 10 6 , μ 1 = 4.05 × 10 5 , μ 2 = 5.25 × 10 9
SSTSMC c = 5.70 × 10 6 , μ 1 = 4.05 × 10 5 , μ 2 = 5.25 × 10 9 , β = 400
ESO+SSTSMC c = 5.70 × 10 6 , μ 1 = 4.05 × 10 5 , μ 2 = 5.25 × 10 9 , β = 400 , l 1 = 126 , l 2 = 3969 , l 3 = 1.68 × 10 4 , l 4 = 7.06 × 10 7
STESO+SSTSMC c = 5.70 × 10 6 , μ 1 = 4.05 × 10 5 , μ 2 = 5.25 × 10 9 , β = 400 , l 1 = 126 , l 2 = 3969 , l 3 = 1.68 × 10 4 , l 4 = 7.06 × 10 7 , k 1 = 48 , k 2 = 89
SSTESO+SSTSMC c = 5.70 × 10 6 , μ 1 = 4.05 × 10 5 , μ 2 = 5.25 × 10 9 , β = 400 , l 1 = 126 , l 2 = 3969 , l 3 = 1.68 × 10 4 , l 4 = 7.06 × 10 7 , k 1 = 48 , k 2 = 89 ,  α 1 = 5 × 10 4 ,  α 2 = 8 × 10 3
Table 3. Comparative study of control schemes under three simulations.
Table 3. Comparative study of control schemes under three simulations.
SimulationController V r   ( m V ) t s   ( m s )
(1)STSMC2970
SSTSMC944
ESO+SSTSMC82067
STESO+SSTSMC2760
SSTESO+SSTSMC742
(2)STSMC-19
SSTSMC-12
ESO+SSTSMC7547
STESO+SSTSMC-11
SSTESO+SSTSMC-11
(3)STSMC21098
SSTSMC10078
ESO+SSTSMC9135
STESO+SSTSMC3648
SSTESO+SSTSMC91
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Jiang, D.; Fang, Y.; Fei, J. An Extended-State Observer Based on Smooth Super-Twisting Sliding-Mode Controller for DC-DC Buck Converters. Mathematics 2023, 11, 2835. https://doi.org/10.3390/math11132835

AMA Style

Jiang D, Fang Y, Fei J. An Extended-State Observer Based on Smooth Super-Twisting Sliding-Mode Controller for DC-DC Buck Converters. Mathematics. 2023; 11(13):2835. https://doi.org/10.3390/math11132835

Chicago/Turabian Style

Jiang, Dian, Yunmei Fang, and Juntao Fei. 2023. "An Extended-State Observer Based on Smooth Super-Twisting Sliding-Mode Controller for DC-DC Buck Converters" Mathematics 11, no. 13: 2835. https://doi.org/10.3390/math11132835

APA Style

Jiang, D., Fang, Y., & Fei, J. (2023). An Extended-State Observer Based on Smooth Super-Twisting Sliding-Mode Controller for DC-DC Buck Converters. Mathematics, 11(13), 2835. https://doi.org/10.3390/math11132835

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