IWO-IGA—A Hybrid Whale Optimization Algorithm Featuring Improved Genetic Characteristics for Mapping Real-Time Applications onto 2D Network on Chip
Abstract
:1. Introduction
- Based on an improved whale framework incorporating GA characteristics, a novel and effective solution to NoC application mapping is proposed.
- Improved Initial Mapping for IWO and direction-based crossover and mutation ability are introduced based on a ranked selection-based method during GA evolution.
- The final mapping technique delivers superior performance in terms of total communication costs. The proposed IWOA-IGA improves power, energy, and communication costs compared to existing bio-inspired algorithms.
2. Related Work
3. Mathematical Formulation/Performance Metrics
3.1. Communication Cost Model
3.2. Power Model
3.3. Latency Model
3.4. Energy Model
3.5. Mathematical Formulation Model
4. Proposed Framework of IWO Algorithm
4.1. Inspiration for NoC Application Mapping
Algorithm 1 Initial Mapping Algorithm |
4.2. Mathematical Model of IWOA
4.2.1. Encircling/Navigating the Hunt: Unveiling Optimal Application Mapping Strategies
4.2.2. Exploitation Phase
4.2.3. Search for the Optimal Mapping Solution (Exploration Phase)
4.3. Proposed IWOA
Algorithm 2 Improved Whale Optimization Mapping Algorithm |
|
5. IWOA-IGA—Enhanced WOA Algorithm Featuring Improved Genetic Mechanism
5.1. Important Aspects of Genetic Algorithm
5.2. IGA Framework
5.2.1. Improved Genetic Algorithm Formulation
5.2.2. Expert Initial Curation for NoC Application Mapping Excellence
5.2.3. NoC Application Mapping: Directional Optimization Incorporating Crossover and Mutation
5.3. IWOA-IGA: Modified IWO Algorithm Featuring IGA Characteristics
Parameter Settings for the Proposed Hybrid Algorithm
Algorithm 3 IWOA Integrated with IGA |
|
6. Simulation Results
6.1. Simulation Setup and Scenario
6.2. Performance-Based Comparative Analysis
6.2.1. Performance Analysis Based on Standard Benchmark Instances
6.2.2. Performance Analysis on TGFF Random Instances
6.2.3. Performance Comparison of IWOA and IWOA-IGA: Optimizing Power and Energy in 2D NoC Benchmark Applications
6.2.4. Performance Comparison of IWOA and IWOA-IGA: Optimizing Latency for 2D NoC Benchmark Applications
6.2.5. Convergence Evaluation Based on Convergence Factor
7. Conclusions
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
References
- Owens, J.D.; Dally, W.J.; Ho, R.; Jayasimha, D.; Keckler, S.W.; Peh, L.S. Research challenges for on-chip interconnection networks. IEEE Micro 2007, 27, 96–108. [Google Scholar] [CrossRef]
- Kumar, S.; Jantsch, A.; Soininen, J.P.; Forsell, M.; Millberg, M.; Oberg, J.; Tiensyrja, K.; Hemani, A. A network on chip architecture and design methodology. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design, ISVLSI 2002, Pittsburgh, PA, USA, 25–26 April 2002; pp. 117–124. [Google Scholar]
- Tosun, S.; Ozturk, O.; Ozen, M. An ILP formulation for application mapping onto network-on-chips. In Proceedings of the 2009 International Conference on Application of Information and Communication Technologies, Baku, Azerbaijan, 14–16 October 2009; pp. 1–5. [Google Scholar]
- Ingle, V.V.; Gaikwad, M.A. Review of mesh topology of NoC architecture using source routing algorithms. Int. J. Comput. Appl. 2013, 975, 8887. [Google Scholar]
- Han, J.J.; Lin, M.; Zhu, D.; Yang, L.T. Contention-aware energy management scheme for NoC-based multicore real-time systems. IEEE Trans. Parallel Distrib. Syst. 2014, 26, 691–701. [Google Scholar] [CrossRef]
- Sahu, P.K.; Chattopadhyay, S. A survey on application mapping strategies for network-on-chip design. J. Syst. Archit. 2013, 59, 60–76. [Google Scholar] [CrossRef]
- Pop, R.; Kumar, S. A Survey of Techniques for Mapping and Scheduling Applications to Network on Chip Systems; Research Report; School of Engineering, Jonkoping University: Jönköping, Sweden, 2004; Volume 4. [Google Scholar]
- Sharma, P.K.; Biswas, S.; Mitra, P. Energy efficient heuristic application mapping for 2-D mesh-based network-on-chip. Microprocess. Microsystems 2019, 64, 88–100. [Google Scholar] [CrossRef]
- Ogras, U.Y.; Hu, J.; Marculescu, R. Key research problems in NoC design: A holistic perspective. In Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, Jersey City, NJ, USA, 19–21 September 2005; pp. 69–74. [Google Scholar]
- Tosun, S.; Ozturk, O.; Ozkan, E.; Ozen, M. Application mapping algorithms for mesh-based network-on-chip architectures. J. Supercomput. 2015, 71, 995–1017. [Google Scholar] [CrossRef]
- Wang, X.; Liu, H.; Yu, Z.; Shen, K. A novel two-phase heuristic for application mapping onto mesh-based Network-on-Chip. IEICE Electron. Express 2016, 13, 20151097. [Google Scholar] [CrossRef]
- Brezočnik, L.; Fister Jr, I.; Podgorelec, V. Swarm intelligence algorithms for feature selection: A review. Appl. Sci. 2018, 8, 1521. [Google Scholar] [CrossRef]
- Amin, W.; Hussain, F.; Anjum, S.; Khan, S.; Baloch, N.K.; Nain, Z.; Kim, S.W. Performance evaluation of application mapping approaches for network-on-chip designs. IEEE Access 2020, 8, 63607–63631. [Google Scholar] [CrossRef]
- Sahu, P.K.; Shah, T.; Manna, K.; Chattopadhyay, S. Application mapping onto mesh-based network-on-chip using discrete particle swarm optimization. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 2013, 22, 300–312. [Google Scholar] [CrossRef]
- Tosun, S. Cluster-based application mapping method for network-on-chip. Adv. Eng. Softw. 2011, 42, 868–874. [Google Scholar] [CrossRef]
- Khajekarimi, E.; Hashemi, M.R. Energy-aware ILP formulation for application mapping on NoC based MPSoCs. In Proceedings of the 2013 21st Iranian Conference on Electrical Engineering (ICEE), Mashhad, Iran, 14–16 May 2013; pp. 1–5. [Google Scholar]
- Khan, S.; Anjum, S.; Gulzari, U.A.; Afzal, M.K.; Umer, T.; Ishmanov, F. An efficient algorithm for mapping real time embedded applications on NoC architecture. IEEE Access 2018, 6, 16324–16335. [Google Scholar] [CrossRef]
- Liu, L.; Wu, C.; Deng, C.; Yin, S.; Wu, Q.; Han, J.; Wei, S. A flexible energy-and reliability-aware application mapping for NoC-based reconfigurable architectures. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 2014, 23, 2566–2580. [Google Scholar] [CrossRef]
- Murali, S.; De Micheli, G. Bandwidth-constrained mapping of cores onto NoC architectures. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, Paris, France, 16–20 February 2004; Volume 2, pp. 896–901. [Google Scholar]
- Shen, W.T.; Chao, C.H.; Lien, Y.K.; Wu, A.Y. A new binomial mapping and optimization algorithm for reduced-complexity mesh-based on-chip network. In Proceedings of the First International Symposium on Networks-on-Chip (NOCS’07), Princeton, NJ, USA, 7–9 May 2007; pp. 317–322. [Google Scholar]
- Tosun, S. New heuristic algorithms for energy aware application mapping and routing on mesh-based NoCs. J. Syst. Archit. 2011, 57, 69–78. [Google Scholar] [CrossRef]
- Cheng, C.H.; Chen, W.M. Application mapping onto mesh-based network-on-chip using constructive heuristic algorithms. J. Supercomput. 2016, 72, 4365–4378. [Google Scholar] [CrossRef]
- Wang, X.; Choi, T.M.; Yue, X.; Zhang, M.; Du, W. An effective optimization algorithm for application mapping in network-on-chip designs. IEEE Trans. Ind. Electron. 2019, 67, 5798–5809. [Google Scholar] [CrossRef]
- Upadhyay, M.; Shah, M.; Bhanu, P.V.; Soumya, J.; Cenkeramaddi, L.R. Multi-application based network-on-chip design for mesh-of-tree topology using global mapping and reconfigurable architecture. In Proceedings of the 2019 32nd international conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID), Delhi, India, 5–9 January 2019; pp. 527–528. [Google Scholar]
- Yan, R.; Zhou, Y.; Cai, A.; Li, C.; Yan, Y.; Yin, M. Contention-aware mapping and scheduling optimization for NoC-based MPSoCs. In Proceedings of the International Conference on Automated Planning and Scheduling, Nancy, France, 26–30 October 2020; Volume 30, pp. 305–313. [Google Scholar]
- Mohiz, M.J.; Baloch, N.K.; Hussain, F.; Saleem, S.; Zikria, Y.B.; Yu, H. Application mapping using cuckoo search optimization with Lévy flight for NoC-based system. IEEE Access 2021, 9, 141778–141789. [Google Scholar] [CrossRef]
- Amin, W.; Hussain, F.; Anjum, S. iHPSA: An improved bio-inspired hybrid optimization algorithm for task mapping in Network on Chip. Microprocess. Microsystems 2022, 90, 104493. [Google Scholar] [CrossRef]
- Choudhary, J.; Soumya, J.; Cenkeramaddi, L.R. Raman: Reinforcement learning inspired algorithm for mapping applications onto mesh network-on-chip. In Proceedings of the 2021 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP), Munich, Germany, 4 November 2021; pp. 52–58. [Google Scholar]
- Reza, M.F.; McCloud, Z. Heuristics-enabled high-performance application mapping in network-on-chip based multicore systems. In Proceedings of the 2023 IEEE International Conference on Omni-layer Intelligent Systems (COINS), Berlin, Germany, 23–25 July 2023; pp. 1–6. [Google Scholar]
- Bose, A.; Ghosal, P. The CTH Network: An NoC Platform for Scalable and Energy Efficient Application Mapping Solution. IEEE Trans. Nanotechnol. 2023, 22, 58–69. [Google Scholar] [CrossRef]
- Amin, W.; Hussain, F.; Anjum, S.; Saleem, S.; Ahmad, W.; Hussain, M. HyDra: Hybrid Task Mapping Application Framework for NOC-based MPSoCs. IEEE Access 2023, 11, 52309–52326. [Google Scholar] [CrossRef]
- Amin, W.; Hussain, F.; Anjum, S.; Saleem, S.; Baloch, N.K.; Zikria, Y.B.; Yu, H. Efficient application mapping approach based on grey wolf optimization for network on chip. J. Netw. Comput. Appl. 2023, 219, 103729. [Google Scholar] [CrossRef]
- Saleem, S.; Hussain, F.; Amin, W.; Ahmed, R.; Zikria, Y.B.; Ishmanov, F.; Yu, H. A Survey on Dynamic Application Mapping Approaches for Real-Time Network-on-Chip-Based Platforms. IEEE Access 2023, 11, 122694–122721. [Google Scholar] [CrossRef]
- Ramesh, S.; Manna, K.; Gogineni, V.C.; Chattopadhyay, S.; Mahapatra, S. Congestion-Aware Vertical Link Placement and Application Mapping Onto Three-Dimensional Network-On-Chip Architectures. IEEE Trans.-Comput.-Aided Des. Integr. Circuits Syst. 2024, 1. [Google Scholar] [CrossRef]
- Tran, A.T.; Baas, B. NoCTweak: A Highly Parameterizable Simulator for Early Exploration of Performance and Energy of Networks On-Chip; Technical Report ECE-VCL-2012-2; VLSI Computation Lab, ECE Department, University of California: Davis, CA, USA, 2012. [Google Scholar]
- Mirjalili, S.; Lewis, A. The whale optimization algorithm. Adv. Eng. Softw. 2016, 95, 51–67. [Google Scholar] [CrossRef]
- Watkins, W.A.; Schevill, W.E. Aerial observation of feeding behavior in four baleen whales: Eubalaena glacialis, Balaenoptera borealis, Megaptera novaeangliae, and Balaenoptera physalus. J. Mammal. 1979, 60, 155–163. [Google Scholar] [CrossRef]
- Goldbogen, J.A.; Friedlaender, A.S.; Calambokidis, J.; Mckenna, M.F.; Simon, M.; Nowacek, D.P. Integrative approaches to the study of baleen whale diving behavior, feeding performance, and foraging ecology. BioScience 2013, 63, 90–100. [Google Scholar] [CrossRef]
- Chen, Q.; Huang, W.; Peng, Y.; Huang, Y. A reinforcement learning-based framework for solving the IP mapping problem. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 2021, 29, 1638–1651. [Google Scholar] [CrossRef]
- Haupt, R.L.; Haupt, S.E. Practical Genetic Algorithms; John Wiley & Sons: Hoboken, NJ, USA, 2004. [Google Scholar]
- Ning, G.Y.; Cao, D.Q. Improved whale optimization algorithm for solving constrained optimization problems. Discret. Dyn. Nat. Soc. 2021, 2021, 8832251. [Google Scholar] [CrossRef]
- Tei, Y.Z.; Marsono, M.N.; Shaikh-Husin, N.; Hau, Y.W. Network partitioning and GA heuristic crossover for NoC application mapping. In Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 19–23 May 2013; pp. 1228–1231. [Google Scholar]
- Song, Y.; Wang, F.; Chen, X. An improved genetic algorithm for numerical function optimization. Appl. Intell. 2019, 49, 1880–1902. [Google Scholar] [CrossRef]
- Ismkhan, H. Black box optimization using evolutionary algorithm with novel selection and replacement strategies based on similarity between solutions. Appl. Soft Comput. 2018, 64, 260–271. [Google Scholar] [CrossRef]
- Elhoseny, M.; Tharwat, A.; Hassanien, A.E. Bezier curve based path planning in a dynamic field using modified genetic algorithm. J. Comput. Sci. 2018, 25, 339–350. [Google Scholar] [CrossRef]
- Wang, H.S.; Zhu, X.; Peh, L.S.; Malik, S. Orion: A power-performance simulator for interconnection networks. In Proceedings of the 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002 (MICRO-35), Istanbul, Turkey, 18–22 November 2002; pp. 294–305. [Google Scholar]
Benchmarks | Nodes | Edges | Mesh Size |
---|---|---|---|
PIP | 8 | 8 | 3 × 3 |
MPEG-4 | 12 | 26 | 4 × 4 |
MWD | 12 | 13 | 4 × 4 |
263encMP3dec | 12 | 12 | 4 × 4 |
263decMP3dec | 14 | 15 | 4 × 4 |
Mp3EncMp3Dec | 13 | 14 | 4 × 4 |
VOPD | 16 | 21 | 4 × 4 |
CAVLC | 16 | 22 | 4 × 4 |
MMS | 25 | 38 | 5 × 5 |
Configuration | Detail |
---|---|
Network Type | Mesh |
Type of Platform | Embedded |
Applications | VOPD, MP3encMp3dec, MPEG4, MWD, 263encMp3dec, 263decMp3dec |
Mapping Algorithm | IWOA, IWO-IGA, SA, PSO |
PacketDeliveryMode | Without ACK |
SendingACKPolicy | Send ACK Optimally |
Packet Distribution | Exponential |
Fixed Packet Length | 10 (flits) moment |
FlitinInjectionRate | 0.1 (flits/cycle/node) |
Type of Router | Wormhole-Pipeline |
Routing Algorithm | XY DIMENSION-ORDER |
OutputChannelSelection | XY-ORDER |
BufferSize | 1 (flit) |
Pipeline Type | 8 |
StagesOfPipeline | 4 |
InputVoltage | 1 (V) |
Operating Clock Frequency | 100,000 (MHz) |
Warm-Uptime | 20,000 cycles |
Algorithm | VOPD | CALVC | MMS | MPEG4 | MWD | Mp3Enc | 263enc | 263dec | PIP |
---|---|---|---|---|---|---|---|---|---|
ILP | 4119 | - | - | 3567 | 1120 | 17.021 | 230.407 | 19.823 | - |
ONMAP | 4119 | - | 663,379 | 3567 | - | - | - | - | 640 |
GA | 4141 | - | - | 3567 | 1321 | 17.133 | 230.69 | 19.911 | - |
SA | 4125 | - | - | 3567 | 1451 | - | - | - | - |
BEMAP | 4119 | 6701 | 664,636 | 3567 | - | - | - | - | 640 |
ACO | - | - | - | 3670 | - | 17.231 | - | - | - |
PSO | 4119 | - | - | 3567 | 1120 | 17.021 | 230.45 | 19.823 | - |
BA | 4119 | - | - | 3567 | 1120 | 17.834 | 231.45 | 19.936 | - |
HDPSO | 4119 | - | - | 3567 | - | - | - | - | - |
CSO | 4119 | 6721 | 652,637 | 3567 | - | - | - | - | 640 |
SCSO | 4119 | - | - | 3567 | 1122 | 17.021 | 230.407 | 19.823 | - |
DPSO | 4119 | - | 688,297 | 3567 | 1120 | 17.021 | - | 19.823 | 640 |
RAMAN | 4135 | - | - | 3774 | 1184 | 17.87 | 234.4 | 19.87 | 640 |
SFOA | 4119 | - | - | 3567 | 1120 | 17.021 | 230.407 | 19.823 | - |
ACA | 4119 | 6721 | 652,637 | 3567 | 1120 | 17.021 | - | - | - |
iHPSA | 4119 | - | - | 3567 | 1120 | 17.021 | 230.407 | 19.823 | - |
IWOA | 4119 | 6701 | 663,379 | 3567 | 1122 | 17.021 | 230.69 | 19.823 | - |
IWOA-IGA | 4119 | 6701 | 663,379 | 3567 | 1122 | 17.021 | 230.69 | 19.82 | - |
Task Graph | Over PSO | Over SA | Over GA |
---|---|---|---|
32 Cores | 41.31% | 46.661% | 44.00% |
64 Cores | 38.70% | 31.94% | 39.78% |
128 Cores | 17.37% | 20.99% | 16.12% |
Task Graph | Over PSO | Over SA | Over GA |
---|---|---|---|
32 Cores | 45.66% | 50.56% | 48.15% |
64 Cores | 40.29% | 33.70% | 41.33% |
128 Cores | 30.60% | 33.31% | 26.67% |
Applications | |||
---|---|---|---|
PSO | 10.71 | 15 | 7.14 |
SA | 10.28 | 15 | 6.85 |
GA | 11.14 | 15 | 7.42 |
IWOA | 11.42 | 15 | 7.61 |
IWOA-IGA | 12.42 | 15 | 8.2 |
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content. |
© 2024 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
Share and Cite
Saleem, S.; Hussain, F.; Baloch, N.K. IWO-IGA—A Hybrid Whale Optimization Algorithm Featuring Improved Genetic Characteristics for Mapping Real-Time Applications onto 2D Network on Chip. Algorithms 2024, 17, 115. https://doi.org/10.3390/a17030115
Saleem S, Hussain F, Baloch NK. IWO-IGA—A Hybrid Whale Optimization Algorithm Featuring Improved Genetic Characteristics for Mapping Real-Time Applications onto 2D Network on Chip. Algorithms. 2024; 17(3):115. https://doi.org/10.3390/a17030115
Chicago/Turabian StyleSaleem, Sharoon, Fawad Hussain, and Naveed Khan Baloch. 2024. "IWO-IGA—A Hybrid Whale Optimization Algorithm Featuring Improved Genetic Characteristics for Mapping Real-Time Applications onto 2D Network on Chip" Algorithms 17, no. 3: 115. https://doi.org/10.3390/a17030115
APA StyleSaleem, S., Hussain, F., & Baloch, N. K. (2024). IWO-IGA—A Hybrid Whale Optimization Algorithm Featuring Improved Genetic Characteristics for Mapping Real-Time Applications onto 2D Network on Chip. Algorithms, 17(3), 115. https://doi.org/10.3390/a17030115