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Article

Research on Establishment and Application of Digital Twin for a Phase-Shift Full-Bridge Current Doubling Rectifier Converter

School of Electrical Engineering and Automation, Harbin Institute of Technology, Harbin 150001, China
*
Author to whom correspondence should be addressed.
Symmetry 2023, 15(2), 292; https://doi.org/10.3390/sym15020292
Submission received: 4 December 2022 / Revised: 12 January 2023 / Accepted: 17 January 2023 / Published: 20 January 2023
(This article belongs to the Section Computer)

Abstract

:
In order to improve the safety and reliability of airborne power supply and distribution system, a digital twin of a phase-shift full-bridge current doubling rectifier converter based on gallium nitride metal-oxide-semiconductor field-effect transistor (GaN MOSFET) is built. The digital twin can be regarded as virtual symmetry of the real converter. The particle swarm optimization (PSO) algorithm is applied to compare the voltage and current waveforms of the real converter with relative waveforms of its digital model established in simulation software, and the interior parameters of the model are constantly updated until the waveforms of the digital twin coincide with that of the converter. Applications of this digital twin are discussed through experimental verification, and the results show that the digital twin can deduce the parameter value of key components of the converter in the case of soft faults. In the case of hard faults, a back propagating artificial neural net (BP ANN) is trained by data collected from the digital twin, and the BP ANN is able to identify different running states of the converter. The outcomes of this paper present a non-intrusive and high real-time method of condition monitoring and fault diagnosis, which is beneficial to improve the reliability of airborne HVDC power supply system.

1. Introduction

With the advance of research on the more-electric aircraft (MEA) and the all-electric aircraft (AEA), the electrification level of aircrafts has been constantly improving. The main architectures of onboard power supply systems in MEAs and AEAs include low voltage direct current (LVDC), variable frequency alternating current (AC), constant frequency AC as well as high voltage direct current (HVDC). Because of its large capacity, light weight, high efficiency, and high reliability, HVDC becomes the most promising structure of airborne power supply systems. In order to promote the application of HVDC in the power supply and distribution systems of aircrafts, a robust and reliable method of condition monitoring and fault diagnosis is required to prevent the loss of propulsion and critical flight functions due to power failures. In the future, as the complexity of airborne power supply and distribution systems increase, the fault types will also increase, and it would be a great challenge to carry out panoramic analysis and simulation in the whole life-cycle.
The architecture of the airborne HVDC power supply system is shown in Figure 1 [1]. The alternating current generated by generators is rectified by AC-DC converters and conveyed to the HVDC bus, which is connected to the LVDC bus by DC-DC converters. HVDC loads are powered directly by HVDC buses while a few AC loads are powered by HVDC buses through DC-AC inverters. Research on the control strategy of these power electronic converters is nearly mature. For example, with regard to the AC-DC rectifier, Reference [2] proposed a model predictive control strategy to predict supply current of the rectifier; in [3], an improved harmonic suppression control strategy is put forward to reduce the harmonic distortion of the rectifier and in [4], disturbance observer-based finite-time control is proposed to estimate the disturbance of the rectifier. In the field of the DC-AC inverter, a nonlinear control method is raised in [5], while in reference [6], a virtual oscillator control is promoted, with both strategies improving the performance of the inverter. As for the DC-DC converter in [7], several advanced control strategies are put forward and discussed under various application requirements to seek the best control method. However, there is still much room for improvement in condition monitoring and fault diagnosis of the power electronical converters.
The common voltage level of the airborne HVDC bus is 270 V, while nominal voltage of power loads onboard is mostly 28 V. The DC-DC converter connects the two buses and converts 270 V DC to 28 V DC, which is required by electrical equipment, with its performance directly affecting the safety of the aircraft. Therefore, the DC-DC converter plays a significant role in the onboard power supply and distribution system, and therefore, implementing its effective condition monitoring would be an important breakthrough point of enhancing the robustness of the airborne HVDC system.
Traditional condition monitoring methods of the power electronic system can be divided into the component-level and the system-level. Component-level methods mainly focus on the power semiconductors [8] and capacitors [9], which require additional circuits to measure the electrical and thermal indicators. These methods will increase the complexity of the system, and the failure of additional circuits might cause the failure of the monitored system. System level methods focus on the frequency response [10] and harmonics [11] of the system, which require invasive setups to detect and analyse system signals. These methods require additional setups, and lack the sensitivity during the degeneration of components.
Recently, digital twin (DT) has attracted the attention of researchers as a new condition monitoring method. A digital twin is a virtual replica of the physical equipment, which can self-update through data interaction with the physical world, in order to reflect the running states of the corresponding devices on the whole life. Digital twin technology integrates artificial intelligence, machine learning, and sensor technology to create a model that can be updated in real time, underlying the process of condition monitoring and decision making. Thus, combining digital twin technology with health condition monitoring and fault diagnosis of power electronic systems would be a significant breakthrough to improve the reliability of onboard HVDC systems.
In the field of electrical engineering, digital twin has been applied to microgrid security [12], aerospace integrated vehicle health management (IVHM) [13], fault diagnosis in distributed photovoltaic systems [14], as well as state estimation for inverter dominated grid [15], etc. Specific to power electronics, in [16], the author proposed a digital twin for modular multilevel converter (MMC) based on real-time simulation (RTS), but, as a method of semi-physical simulation, requires multiple hardware-in-the-loop (HIL) units, so the cost is high. In [17], a digital twin for SiC MOSFET power-electronics switching cells is presented to improve printed circuit board (PCB) layout, however, modelling techniques with higher accuracy and standardization are still demanded. Both [18] and [19] put forward embeddable digital twins for power electronic converters, with the former being based on dynamic neural networks, which has the drawback of high computational expense, and the latter defines the digital twin as a real-time, probabilistic simulation model with stochastic random variables, and applies it to diagnostic analysis of converters. With that said, there exists a contradiction between the complexity and fidelity of the model.
Latest works have proposed simpler methods of establishing a digital twin for power electronic converters, and applied the digital twin in parameter identification as well as condition monitoring. In [20,21], an estimation method for health indicators of a converter is presented and is verified on a buck converter. The PSO algorithm is utilized to analyse and compare experimental data from a digital twin and real converter, in order to update the estimated value of each of the health indicators of the buck converter. The experiment is conducted under different conditions, in order to simulate the degradation trend of key components in the converter. In [22], the author builds the digital twin from a single-phase DC/AC inverter with same method and applies it to detect the degeneration of the filter capacitor. In [23], the digital twin of a two-phase interleaved boost converter is built, and the Genetic Algorithm (GA) is compared with the PSO algorithm in the process of optimization, the result of which shows that GA has a better convergence rate. However, methods, above all, require mathematical modelling of the converter, which means complex state analysis should be done and a large number of differential equations have to be solved, Therefore, in sophisticated systems, the precision and practicability of this method might be lower. To solve the problem, in [24], the method is promoted, and the model of the digital twin is based on simulation software rather than mathematical model, and this method is validated on a buck converter. In [25], a digital twin of the boost converter, based on simulation, is built and Bayesian optimization is used to update parameters. In [26], the arithmetic optimization algorithm (AOA) is applied in the digital-twin-based identification of degradation parameters for a buck converter, compared to the PSO algorithm, with AOA having a better global search ability and faster convergence on this issue.
In this paper, we promote a digital twin for a phase-shift full-bridge current doubling rectifier DC-DC converter based on GaN MOSFET, and discuss its application in condition monitoring. The digital twin has the following characteristics:
(1) The digital twin can accurately reflect the internal structure and external performance of the real converter.
(2) The digital twin can deduce the internal parameters and status of the converter by analysing its external behaviours, so non-invasive condition monitoring can be implemented.
Compared to traditional methods, on the one hand, the utilization of a digital twin upon monitoring the converter can avoid invasive tests or extra hardware, thereby reducing the complexity and cost of product testing. On the other hand, running data can be collected from the digital twin rather than the real converter, so there’s no need to put on damaging experiments. For airborne DC-DC converters, the application of a digital twin lays a foundation for fault diagnosis, auxiliary decision-making, and intelligent control of the DC microgrid onboard, improving the safety of the whole flight system.
The rest of this paper is organized as follows. The construction method of the proposed digital twin is established in Section 2. The test results of the digital twin are presented in Section 3. The application of the digital twin in condition monitoring, including soft faults and hard faults, is discussed in Section 4. Finally, the conclusion is presented in Section 5.

2. Establishment of Digital Twin

Figure 2 shows the three-layer digital twin model, including the physical layer, digital layer, and computational layer. A sensor is used for collecting running data from the physical layer, a solver is used for solving the simulation model in the digital layer, and database is used for gathering data generated by all three layers.
As shown in Figure 2, the physical layer is the phase-shift full-bridge current doubling rectifier DC-DC converter. The digital layer is a digital copy of the physical layer, which refers to a converter with the same structure built in the simulation software. The computational layer is the bridge between the physical layer and digital layer. In the computational layer, running data collected from the other two layers is comprehensively analyzed, with the analysis results driving the digital layer to update itself, while the condition of the physical layer is disclosed, and the related control method is proposed. The establishment of these three layers is described in detail as follows.

2.1. Physical Layer

The main technical indicators of the phase-shift full-bridge current doubling rectifier DC-DC converter are shown in Table 1. The converter is designed based on these indicators.
Figure 3 shows the topology and the control strategy of the converter, while the value of key components is listed in Table 2. The primary side of the converter is a phase shift full bridge, where the MOSFET gate drive signals on the same bridge arm are complementary, and the duty ratio is 50%. There is a phase-shift angle between the gate drive signals of the MOSFET on different bridge arms, and the output voltage can be controlled by adjusting the phase-shift angle. Due to its simple and controllable dynamic characteristics, as well as high precision output voltage control, peak-current control is selected to generate the pulse width modulation (PWM) waveform for driving the MOSFETs. A digital signal processing (DSP) chip is applied to implement the control strategy, where the digital compensator is realized by the control code, and a 2-pole 2-zero (2P2Z) compensator is chosen. the voltage of sampling and reference voltage to the compensator are input, allowing the reference value of the peak current to be generated through calculation, in order to realize the peak-current control. The PWM waveforms of the phase-shift control are shown in Figure 4.
As a third generation semiconductor material, GaN is of a wide bandgap, with a high thermal conductivity, and has good chemical stability, thereby having the characteristics of high operating temperature, high breakdown voltage, as well as strong anti-radiation ability [27]. Thus, GaN MOSFET is chosen as the switch on the primary side of the converter. The hardware experimental platform is shown in Figure 5.

2.2. Digital Layer

In the digital layer, the digital model of the phase-shift full-bridge current doubling rectifier converter is built in the simulation software as a virtual copy of the physical layer. The digital layer has the same structure, control strategy, and technical indicators as the physical layer. Figure 6 shows the digital model of the converter.
As shown in the Figure 6, the digital layer is divided into two parts: the main circuit and the control circuit. The main circuit corresponds to the main circuit of the converter in the physical layer, and the control circuit corresponds to the DSP chip. The control circuit includes gain modules that correspond to the 12-bit ADC module, comparators that correspond to the comparator subsystem (CMPSS) module, as well as a reset-set (RS) trigger that corresponds to the enhanced pulse width modulator (ePWM) module. To ensure accuracy, the 2P2Z compensator is adopted with the same coefficients as the physical layer.

2.3. Computational Layer

The computational layer is the pivot of the digital twin, connecting the physical layer and the digital layer. The goal of the computational layer is to make the output data of the digital layer and the physical layer as consistent as possible, so that the resistance, inductance, and capacitance values of the devices in the digital layer can approach the actual condition. The PSO algorithm is applied to realize this goal. It is an evolutionary algorithm that originates from the study of bird predation behavior. Its basic idea is to find the optimal solution through the cooperation and information sharing among individuals in the group. In this paper, a parameter set of devices in the digital layer is regarded as a particle, and a group of particles are initialized with random parameter values (the resistance, capacitance, and inductance value of each device in the circuit) as a population. The difference between the output waveform of the digital layer and physical layer is taken as the objective function. The objective function is used for evaluating each particle in the population, with the particle with the smallest objective function value is regarded as the optimal particle, which refers to the global optimal solution. If the value of the objective function is lower than the threshold, then the parameter set represented by the optimal particle will be output. Otherwise, each particle in the population will self-update according to the global optimal solution shared by the whole population and the current individual optimal solution found by the particle itself. The updated population will keep repeating the above process until the specified number of iterations is reached or the objective function is below the threshold. At that time, the parameter value of the digital layer corresponding to the global optimal particle is very close to the actual value in the physical system. Consequently, the digital twin can be used to indicate the actual condition of the converter in the physical world.
In the computational layer, the waveform signals from the physical layer and digital layer are collected and processed. A total of 25 points are sampled at equal intervals in each period during the steady-state. Three consecutive periods are investigated in order to avoid the possible influence of special circumstances on the calculation results. The objective function is calculated according to the difference between the sampling points. The formula is as follows:
f obj = k = 1 N { [ p ( v physical , k v digital , k ) 2 ] + [ p ( i physical , k i digital , k ) 2 ] } N
where, N is the total number of sampling points, in this paper, the value of N is 75, k is the serial number of sampling points, and p is the weight factor of each term. vphysical and vdigital refer to voltage data collected from the physical layer and the digital layer, respectively, while iphysical and idigital refer to current data collected from the physical layer and the digital layer, respectively. It is worth noting that the voltage and current values in the formula should be normalized due to the different values.
The global optimal particle G b and individual optimal particle P b are selected according to the result of the objective function, then the renewal process of particles is conducted on the basis of Formulas (2) and (3):
v i + 1 , j , d = w v i , j , d + c 1 r 1 ( G b , d P i , j , d ) + c 2 r 2 ( P b , j , d P i , j , d )
P i + 1 , j , d = P i , j , d + v i + 1 , j , d
where, v is the particle velocity, i, j, and d refer to number of iterations, serial number of particles, and serial number of device parameters, respectively. r1 and r2 are random numbers between 0 and 1, c1 and c2 are the social weighting factor and individual weighting factor, while w refers to the learning factor, which is related to the global and local search ability [28]. All the learning factors and the weighting factors are empirical values. In this paper, w is set to 0.6, and c1 and c2 are both set to 1.5. Once the number of iterations reaches the maximum value, or fobj is below the threshold value, then the algorithm is terminated and the optimal parameter set is output. Figure 7 shows the algorithm flow chart of the computational layer.

3. Experiment of Digital Twin

Firstly, voltage and current waveform data during the steady state is collected from the DC-DC converter in the physical layer, using sensor. The waveforms are shown in Figure 8.
Secondly, the data is processed by extracting data points from the waveforms above. Meanwhile, the converter model in the digital layer is set to output the same number of data points from corresponding waveforms, during the steady state.
Finally, data collected from both the physical layer and digital layer is imported to the computational layer. The population size is set to 24 and the maximum number of iterations to 100, then the code of the algorithm mentioned in Section 2.3 is run. The result is shown below.
Figure 9 shows the process of decline of the objective function. As shown in Figure 9, as the number of iterations increases, fobj reduces exponentially. After nearly 80 iterations, the value of fobj tends to be stable, and remains at a very low value. At that time, the difference between the output waveforms at the physical and digital layers has reached the minimal level. The main voltage and current waveforms of the digital layer and the physical layer under steady state are compared, with part of the results demonstrated in Figure 10.
It can be seen from the comparison results that the waveforms of the physical layer generally coincide with that of the digital layer during the steady state, which indicates that the digital twin can reflect well the running state of the DC-DC converter in the real physical world. There exists slight errors due to the environmental disturbance, the error of the sensor, and different processing ways between the digital twin and the real converter.

4. Application of the Digital Twin

Soft faults and hard faults are two types of faults in the DC-DC converter. A soft fault refers to the performance degeneration of components after long-term running, and is unnoticeable at early stages in the life-cycle but will lead to the abnormal operation or the eventual collapse of the whole DC-DC system. A hard fault refers to the function loss of the converter caused by the damage of the components. Both types of faults have a severe influence on the safety of the converter as well as the relative power of the system, thus, it is of great importance to monitor the condition of the converter. In order to verify the application value of the established digital twin on the condition monitoring of the DC-DC converter, experiments are conducted as follows.

4.1. Application of Digital Twin on Soft Faults

Electrolytic capacitors and inductors are typical components that are prone to performance changes [29]. The DC-DC converter in this paper has five electrolytic capacitors (including one voltage stabilized capacitor C1 and four filter capacitors, the four filter capacitors are paralleled and can be seen as capacitor C2) and three inductors (including one resonance inductor Lr and two filter inductors, L1 and L2), under long-term environmental stress, the capacitance of the electrolytic capacitors and the inductance of the inductors will decrease [30,31]. Once the value is below the threshold, serious faults may occur.
Figure 11 shows the distribution of the parameters of the main components at the beginning and the end of the iteration, by boxplot. The value of load resistance usually remains unknown, in order to deduce its actual value. R is also included in the experiment.
As shown in Figure 11, after the random initialization, the parameter values are distributed over a wide range, but after 100 iterations, the device parameter values converge at specific values, which refer to the actual value of the device parameters.
Due to the randomness of the PSO algorithm, the experiment demonstrated in Section 3 is repeated ten times, in order to observe the ability of the digital twin to identify the parameter values of the converter. The results are compared with actual parameter values tested by digital bridge. Comparative results of main components are shown in Figure 12.
It can be seen in Figure 12 that, although there are slight differences among the results of the experiments, the parameter values of the digital twin are always around the actual values. The fluctuation range of C2 is larger than other parameters, resulting from the inadequate measurement accuracy of the sensors in hardware experimental platform, where the ripple of output voltage is not measured precisely.
The results above show that, in spite of random initialization of the PSO algorithm, the digital twin can well identify the value of electrolytic capacitors, inductors, and resistance through self-updating. Thereby, in the case of soft faults, the digital twin can infer the variation tendency of key components in the converter by observing its external running condition. Thus, it is possible to know the internal condition of the converter without needing to stop it running or enforcing invasive testing. In addition, maintenance can be conducted depending on the condition of the converter in real time, instead of regularly.

4.2. Application of Digital Twin on Hard Faults

A digital twin can be combined with data-drive methods, in order to detect hard faults. Hard faults usually include short-circuit faults and open-circuit faults in the circuit. When short-circuit faults occur, overcurrent and overheating occur, which leads to converter failure and serious consequences. Thus, short-circuit faults are usually detected and proceeded by hardware protection in order to cut down the faults quickly. However, when open-circuit faults occur, the converter can continue running in a steady but abnormal state, and under long-term abnormal running states, can fail irreversibly. Therefore, it is meaningful to monitor the open-circuit faults of the converter.
In this paper, four open-circuit faults are simulated by the digital twin of the phase-shift full-bridge current doubling rectifier converter, leading arm open-circuit, lagging arm open-circuit, load open-circuit, and a resonance inductor open-circuit, respectively. There is data loss in the primary-side currents, output voltage as well as output current due to the existence of filter capacitors and filter inductors, but the primary voltage of the transformer Vpri is determined by the on-off of the switch directly [32]. So, Vpri can provide sufficient and concise information about the running states of the converter. Therefore, Vpri of the converter under different running conditions is detected, of which the results are shown in Figure 13. It is noteworthy that there exists a fluctuation of input voltage in the real converter, so white noises are added into the input voltage of the digital twin for the sake of precision.
Vpri data of 4000 periods are collected from the normal state and four abnormal states respectively, and 25 data points are sampled with the same interval from each period. In order to extract the characteristics of waveform under each condition, 12 typical time domain features are calculated from each period by using formulas proposed in [33]. Table 3 shows processed data of 10 periods under normal state.
In order to implement classification of the running states by data-drive methods, each state is numbered by a sequence of zeros and ones, which is listed in Table 4.
A BP ANN is established to classify different running conditions of the converter. BP ANN is a multilayer feedforward network trained by error back propagation, it learns certain rules through training and gets the result closest to the expected output when given the input. BP ANN has the ability of complex pattern classification as well as excellent multi-dimensional function mapping. The established BP ANN has three layers, including one input layer, one output layer and one hidden layer with 10 neurons. The logsig function is selected as the transfer function of the hidden layer, the purelin function is selected as the transfer function of the output layer, while the traingdx function is selected as the function of backpropagation. The structure of the BP ANN is shown in Figure 14.
Half of the processed Vpri data is used as a training set, while the other half is used as a test set. The training goal is set to 0.0001, learning rate to 0.01, and maximum number of training sets to 10000. The test result shows that the recognition rate of the BP ANN is 99.29%. Figure 15 shows a confusion matrix that depicts the classification result.
It can be seen from the Figure 15 that the diagonal squares are very dark in colour, which means the BP ANN can classify different running states with high accuracy. There are a few very light blue squares, which means only a small number of data in the test set is mis-classified. Thus, the BP ANN can identify different running states of the DC-DC converter within one single period.
Actual Vpri data under different states is collected from the hardware experimental platform to validate the practicability of the BP ANN, including normal state and the state of leading arm open circuit. The state of leading arm open circuit is simulated by grounding the drive signal of MOSFET. The experimental waveforms are shown in Figure 16.
The data is processed and is input into the trained BP ANN. The classification results are shown in Table 5, where the maximum number in each column is regarded as 1, and other numbers in this column are regarded as 0. It can be seen in Table 5 that the classification results agree with the actual running condition.
This method is simple and fast due to the consistency of the digital twin and the real converter. The analysis and process of data are based on time domain, and the state of the converter can be identified within a single period.

5. Conclusions

In this paper, a digital twin for phase-shift full-bridge current doubling rectifier DC-DC converter is established. Firstly, the prototype of the converter is built, then its digital twin is built in a simulation software. The PSO algorithm is used to update the interior parameters of the digital twin by examining the difference of waveforms between the converter and digital twin, so that the digital twin can reflect the operation state of the real converter. Then, the application of the digital twin on condition monitoring is discussed through corresponding experiments. In the case of soft faults, the digital twin can infer the parameter values of key components in the converter by updating itself, then the degeneration process can be detected through observing external performance instead of invasive tests. In the case of hard faults, a BP ANN is trained by data collected from the digital twin, and the experimental results show the BP ANN can distinguish the converter state under different test conditions. The proposed digital twin can update itself in real time and implement monitoring of DC-DC converter in its whole life. Compared to traditional methods, the proposed digital twin realizes the non-invasive monitoring of converter at the system level, and can monitor the health condition of components in real time without extra hardware circuit. This method provides a practical solution for the condition monitoring and fault diagnosis of power electronic converters, thereby being a workable way of improving the reliability of airborne power supply system.

Author Contributions

Conceptualization, G.L.; methodology, G.L. and X.W.; software, X.W.; validation, X.W., G.L. and M.W.; formal analysis, W.W. and M.W.; investigation, G.L. and W.W.; resources, G.L.; data curation, X.W.; writing—original draft preparation, X.W. and G.L.; writing—review and editing, X.W., G.L. and M.W.; visualization, X.W.; supervision, G.L. and W.W.; project administration, W.W.; funding acquisition, G.L. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported in part by the Key Laboratory of Special Machine and High Voltage Apparatus (Shenyang University of Technology), Ministry of Education under Grant KFKT202108, in part by the Fundamental Research Funds for the Central Universities, in part by the National Natural Science Foundation of China under Grants 52077041.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Architecture of airborne HVDC power supply system.
Figure 1. Architecture of airborne HVDC power supply system.
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Figure 2. Schematic diagram of the three-layer digital twin model.
Figure 2. Schematic diagram of the three-layer digital twin model.
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Figure 3. Topology and control strategy of the DC-DC converter.
Figure 3. Topology and control strategy of the DC-DC converter.
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Figure 4. Schematic diagram of PWM waveform of the phase-shift control.
Figure 4. Schematic diagram of PWM waveform of the phase-shift control.
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Figure 5. Hardware experimental platform of the converter.
Figure 5. Hardware experimental platform of the converter.
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Figure 6. Digital model of the converter. (a) The main circuit; (b) The control circuit.
Figure 6. Digital model of the converter. (a) The main circuit; (b) The control circuit.
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Figure 7. Algorithm flow chart of computational layer.
Figure 7. Algorithm flow chart of computational layer.
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Figure 8. Voltage and current waveforms collected from the physical layer. (a) PWM waveforms; (b) Output voltage waveform; (c) Secondary side current waveforms; (d) Secondary side voltage waveforms; (e) Primary side current waveforms; (f) Transformer voltage waveforms.
Figure 8. Voltage and current waveforms collected from the physical layer. (a) PWM waveforms; (b) Output voltage waveform; (c) Secondary side current waveforms; (d) Secondary side voltage waveforms; (e) Primary side current waveforms; (f) Transformer voltage waveforms.
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Figure 9. Iterative process of the objective function.
Figure 9. Iterative process of the objective function.
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Figure 10. Comparison of steady-state waveforms between physical layer and digital layer. (a) Primary side voltage of transformer; (b) Secondary side voltage of transformer; (c) Current across L1; (d) Current across L2; (e) Voltage of L1; (f) Voltage of L2.
Figure 10. Comparison of steady-state waveforms between physical layer and digital layer. (a) Primary side voltage of transformer; (b) Secondary side voltage of transformer; (c) Current across L1; (d) Current across L2; (e) Voltage of L1; (f) Voltage of L2.
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Figure 11. Boxplot of distribution of device parameters.
Figure 11. Boxplot of distribution of device parameters.
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Figure 12. Comparison of parameter values between physical converter and digital twin. (a) Load resistance; (b) Inductance of the inductors; (c) Capacitance of the electrolytic capacitors.
Figure 12. Comparison of parameter values between physical converter and digital twin. (a) Load resistance; (b) Inductance of the inductors; (c) Capacitance of the electrolytic capacitors.
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Figure 13. Vpri waveforms of digital twin under different running conditions. (a) Normal; (b) Leading arm open-circuit; (c) Lagging arm open-circuit; (d) Load open-circuit; (e) Resonance inductor open-circuit.
Figure 13. Vpri waveforms of digital twin under different running conditions. (a) Normal; (b) Leading arm open-circuit; (c) Lagging arm open-circuit; (d) Load open-circuit; (e) Resonance inductor open-circuit.
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Figure 14. Three-layer BP ANN.
Figure 14. Three-layer BP ANN.
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Figure 15. Confusion matrix of classification result.
Figure 15. Confusion matrix of classification result.
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Figure 16. Actual Vpri data. (a) Normal; (b) Leading arm open-circuit.
Figure 16. Actual Vpri data. (a) Normal; (b) Leading arm open-circuit.
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Table 1. Technical indicators of the converter.
Table 1. Technical indicators of the converter.
Parameter IndicatorsParameterIndicators
Vin270 V (250 V–280 V)Maximum Vin ripple6 V
Vout28 V (22 V–29 V)Maximum Vout ripple1.5 V
Po1 kWft200 kHz
Table 2. Key parameters of the DC-DC converter.
Table 2. Key parameters of the DC-DC converter.
ParameterValueParameterValue
C1100 µFLr5 µH
C2684 µFL1, L247 µH
Ca, Cb, Cc, Cd150 pFR>0.7 Ω 1
1 The follow-up experiments are conducted under a relatively low power, where load resistance is set to 5 Ω.
Table 3. Typical time domain features of Vpri under normal state.
Table 3. Typical time domain features of Vpri under normal state.
PeriodMaximumMinimump-p ValueMeanVarianceStandard Deviation KurtosisSkewnessWaveform Peak PulseMargin
1273.444−270.566544.0100.29629,164.897170.7772.5000.0081.5811.6012.5326.289
2270.920−272.933543.85310.48726,137.145161.6702.759−0.0251.6671.6722.7877.683
3272.259−275.883548.1420.00229,296.096171.1612.5010.0001.5811.5912.5156.248
4271.100−276.002547.102−11.08426,056.404161.4202.7520.0041.6671.6762.7937.702
5271.087−272.283543.37021.47428,835.378169.8102.439−0.0641.5811.5842.5046.218
6273.019−271.854544.873−0.01123,295.633152.6293.1260.0001.7681.7893.1629.797
7273.887−271.892545.7790.15329,228.823170.9642.5000.0041.5811.6022.5336.293
8273.851−271.120544.97121.66328,715.446169.4562.435−0.0571.5811.6032.5356.293
9273.356−273.796547.152−10.83026,034.891161.3532.7560.0131.6671.6902.8177.770
10274.347−270.990545.33711.14326,149.781161.7092.751−0.0031.6671.6932.8217.777
Table 4. Classification label of each state.
Table 4. Classification label of each state.
StateSerial Number
Normal10000
Leading arm open circuit01000
Lagging arm open circuit00100
R open circuit00010
Lr open circuit00001
Table 5. Classification results of 10 periods of the real converter under different states.
Table 5. Classification results of 10 periods of the real converter under different states.
StateNumber of Periods
12345678910
Experimental condition: normal
Normal1.002→10.961→10.948→10.955→10.870→10.919→10.568→10.868→11.025→10.824→1
Leading arm open circuit−0.063→0−0.019→0−0.035→0−0.039→0−0.021→0−0.023→0−0.037→0−0.078→0−0.051→0−0.036→0
Lagging arm open circuit−0.011→0−0.010→0−0.028→0−0.007→0−0.016→0−0.014→00.006→00.004→00.002→0−0.006→0
R open circuit0.017→00.033→00.053→00.039→00.116→00.074→00.433→00.143→00.002→00.160→0
Lr open circuit0.047→00.027→00.044→00.045→00.041→00.030→00.038→00.033→00.027→00.054→0
Experimental condition: leading arm open circuit
Normal−0.046→0−0.043→0−0.049→0−0.062→0−0.069→0−0.063→0−0.054→0−0.056→0−0.063→0−0.061→0
Leading arm open circuit1.027→11.011→11.028→11.030→11.039→11.040→11.028→11.016→11.019→11.012→1
Lagging arm open circuit0.065→00.060→00.076→00.078→00.080→00.090→00.074→00.079→00.085→00.089→0
R open circuit−0.222→0−0.201→0−0.204→0−0.197→0−0.208→0−0.196→0−0.205→0−0.178→0−0.171→0−0.158→0
Lr open circuit0.176→00.174→00.150→00.151→00.157→00.130→00.157→00.139→00.129→00.117→0
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Liu, G.; Wang, X.; Wang, M.; Wang, W. Research on Establishment and Application of Digital Twin for a Phase-Shift Full-Bridge Current Doubling Rectifier Converter. Symmetry 2023, 15, 292. https://doi.org/10.3390/sym15020292

AMA Style

Liu G, Wang X, Wang M, Wang W. Research on Establishment and Application of Digital Twin for a Phase-Shift Full-Bridge Current Doubling Rectifier Converter. Symmetry. 2023; 15(2):292. https://doi.org/10.3390/sym15020292

Chicago/Turabian Style

Liu, Guihua, Xinyang Wang, Mingyi Wang, and Wei Wang. 2023. "Research on Establishment and Application of Digital Twin for a Phase-Shift Full-Bridge Current Doubling Rectifier Converter" Symmetry 15, no. 2: 292. https://doi.org/10.3390/sym15020292

APA Style

Liu, G., Wang, X., Wang, M., & Wang, W. (2023). Research on Establishment and Application of Digital Twin for a Phase-Shift Full-Bridge Current Doubling Rectifier Converter. Symmetry, 15(2), 292. https://doi.org/10.3390/sym15020292

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