1. Introduction
The current-mode (CM) active building blocks (ABBs) are widely employed in designing universal frequency filters. The CM ABBs exhibits greater linearity, wide bandwidth, simple structure, low power consumption and enhanced dynamic range [
1,
2,
3,
4,
5]. Extensive number of filter topologies using CM ABBs can be found in the literature. However, the majority of the previously proposed filters can work only in single mode of operation i.e., CM, voltage-mode (VM), trans-impedance-mode (TIM) or trans-admittance-mode (TAM) [
1,
2,
3,
5]. In present-day intricate signal processing systems, the interaction between CM and VM circuits is required. This task can be accomplished by TAM and TIM filters that not only perform signal processing, but also provide interfacing between VM and CM systems [
6,
7,
8,
9,
10]. The development of mixed-mode universal filters that can provide low pass (LP), high pass (HP), band pass (BP), band reject (BR) and all pass (AP) filter responses in CM, VM, TAM and TIM modes of operation are best suited for the task.
Numerous exemplary mixed-mode filter structures have been developed that employ different variants of the CM ABBs [
8,
9,
10,
11,
12]. The filters can be segregated in two broad categories single input multi output (SIMO) and multi input single output (MISO) type. The MISO filter configuration is one of the most sought after. The filters can be compared on many criteria, some important measures of comparison are: (i) number of ABBs employed, (ii) number of passive components needed, (iii) employment of all grounded passive components, (iv) no requirement for resistive matching except for AP response, (v) provision to control quality factor (
Q) independent of the center frequency, (vi) ability to provide all five filter responses in all four modes of operation, (vii) low output impedance for VM mode, (viii) availability of explicit current output in CM and TAM modes, (ix) no requirement for double/negative input signals (voltage/current), (x) inbuilt tunability and (xi) test frequency. A detailed comparison of the state-of-the-art MISO filters with the proposed design is presented in
Table 1 [
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
31,
32,
33,
34,
35,
36,
37,
38,
39] and
Table 2 [
7,
9,
12,
13,
19,
20,
24,
25,
26,
27,
29,
37,
38,
39,
40,
41] It can be inferred from the tables that the filter structures in [
6,
7,
8,
9,
10,
11,
12,
13,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
26,
28,
29,
30,
31,
32,
33,
34,
35,
36,
37,
38,
39] employ more than one ABB. The designs in [
6,
7,
10,
12,
22,
28,
29,
30,
36,
37,
39,
41] use more than five passive components. The filter structures proposed by [
6,
7,
9,
10,
11,
12,
13,
18,
19,
21,
24,
25,
27,
30,
32,
33,
36,
39] do not provide frequency control independent of quality factor. The filter structures [
6,
8,
9,
11,
13,
14,
15,
16,
18,
21,
23,
25,
26,
27,
28,
32,
34,
35,
41] do not provide all five filter responses in VM, CM, TAM and TIM operation. The filter structures [
6,
7,
10,
11,
12,
14,
16,
22,
25,
27,
28,
29,
30,
34,
36,
37,
39,
41] lack inbuilt tunability property. In addition, only four mixed mode filter structures [
14,
25,
27,
40] employing a single ABB can be currently found in the literature. Moreover, among single ABBs based mixed mode filters only [
40] provides all five filter responses in all four modes of operation. Furthermore, the design in [
40] does not provided VM response at low impedance node. It can be deduced from the literature survey that a limited number of mixed-mode filters are available, and to fill this technological void, additional novel mixed-mode filter structures are needed.
In the literature, numerous CM ABBs can be found, each having its own merits. In this research, the Voltage Differencing Extra X Current Conveyor (VD-EXCCII) is introduced and utilized in the design of mixed-mode filter. The proposed VD-EXCCII can be considered a universal ABB, as it can realize many popular and widely employed CM ABBs as special case. The proposed VD-EXCCII can realize second generation current conveyor (CCII), voltage differencing current conveyor (VDCC), differential difference current conveyor (DDCC), voltage differencing transconductance amplifier (VDTA), voltage differencing buffered amplifier (VDBA), current backward transconductance amplifier (CBTA) and operational transconductance amplifier (OTA) by proper interconnection of its input and output terminals, thereby making it an inherently universal ABB. This will allow designers to employ VD-EXCCII instead of using each separate ABBs to test their designs, thus reducing the cost and time to market. The filter design requires a single VD-EXCCII, two capacitors and three resistors. The striking features of the proposed filters are: (i) employment of single active block (VD-EXCCII), (ii) ability to work in all four modes of operation, (iii) provision for inbuilt tunability, (iv) the filter enjoy low active and passive sensitivities. Moreover, the filter enjoy all (iv–x) properties mentioned in
Table 2. The design simulation of the VD-EXCCII is done in Cadence Virtuoso using Silterra Malaysia 0.18 µm PDK. The post-layout simulation results are in good agreement with the theoretical predictions.
2. Voltage Differencing Extra X Current Conveyor (VD-EXCCII)
The proposed Voltage Differencing Extra X current conveyor (VD-EXCCII) is derived by connecting extra X second generation current conveyor (EXCCII) [
42] and operational transconductance amplifier (OTA). The first stage comprises of OTA followed by the CCII with two current input terminals. The developed active element has characteristics of CCII and tunable OTA in one structure. The voltage-current (V–I) characteristics of the developed VD-EXCCII are presented in Equations (1)–(4) and the block diagram is presented in
Figure 1.
The CMOS implementation of VD-EXCCII is given in
Figure 2. The first stage consists of OTA MOS transistors (M1–M14). The output current of the transconductor depends on the voltage difference
. Assuming that all transistors are operating in saturation region and the transistors (M1–M2) have equal width to length ratio, the output current is given by:
where the transconductance parameter
=
, (
i = 1, 2),
W is the effective channel width,
L is the effective length of the channel,
is the gate oxide capacitance per unit area and
is the carrier mobility.
The second stage is made up of hybrid voltage and current followers (M15–M44). The voltage developed at node W is transferred to nodes
and
. In the same way the input current from
node is transferred to
and
. Furthermore, the input current from
node is transferred to
and
. The current flowing in the
and
terminals are independent of each other. The class AB output stage is utilized in the output stage, as it is suitable for low voltage operation and better dynamic range [
2]. The current and voltage reference circuits available in the literature [
43] can be employed to generate the
IBias and
VBias for the circuit.
The small signal analysis yields the expression relating
. The analysis is carried out for the differential stage formed by transistors
. The voltage transfer ratio between the
W and
node can be derived as given in Equation (6).
where
,
is the output resistance of the MOS transistor and
is the transconductance of the MOS transistor
. Similarly, the voltage transfer gain
is computed as:
The current transfer ratios are derived as given in Equations (8) and (9):
The terminal resistance of
and
terminals is calculated as given in Equations (10) and (11). The
,
and
resistance are presented in Equations (12)–(14).
where
and
.
The , and node impedances are found to be high given by the parallel output resistance of the MOS transistors.
4. Non-Ideality and Sensitivity Analysis
4.1. Non-Ideal Gain and Sensitivity Analysis
The non-ideal effects that influences the response of the VD-EXCCII are the frequency-dependent non-ideal current (), voltage () and transconductance transfer (γ, ) gains. These non-ideal gains result in a change in the current and voltage signals during transfer leading to undesired response. Taking into account the non-ideal gains, the V–I characteristics of the VD-EXCCII in (1–4) will be modified as follows: , , , , , , , , where , , , and . Here, denote voltage tracking errors, , () denote current tracking errors and , denote transconductance errors of the VD-EXCCII.
The non-ideal analysis considering the effect of non-ideal current, voltage and transconductance transfer gains is carried out for VM, CM, TAM and TIM configurations to see its effect on the transfer function,
f0 and
Q of the proposed filters. The modified expressions of the filter transfer functions,
and
for the MISO/ SIMO configurations are presented in Equations (26)–(31):
The sensitivities of
and
with respect to the non-ideal gains and passive components are given below:
The sensitivities are low and have absolute values not higher than unity.
4.2. Non-Ideal Parasitic Analysis
The non-ideal model of the VD-EXCCII is presented in
Figure 5. As can be deduced, the various parasitic resistance and capacitance appear in parallel with the input and output nodes of the device. The low impedance
nodes have a parasitic resistance and inductance in series with them. The associated parasitics at the X nodes can be quantified as
. However, for the frequency of interest, the inductive effect can be ignored. The parasitic resistance and capacitance associated with the
P,
N,
,
W,
and
Z nodes are
,
,
and
, their ideal values being equal to zero.
Including the VD-EXCCII parasitics, the denominator of the filter transfer function will be modified as presented in Equation (35):
where
,
,
and
The modified expressions of the frequency and quality factor including the various parasitic effects are presented in Equations (36) and (37):
To minimize the parasite effects the values of the passive components should be selected such that , . In addition, note that the resistors and are connected to the low impedance X terminals, so they will absorb the parasitic resistance present at XP and XN terminals since ().
5. Simulation and Validation
To validate the proposed mixed-mode filter, it was designed and simulated in Cadence Virtuoso design software. The VD-EXCCII was designed in 0.18 µm Silterra Malaysia technology at a supply voltage of ±1.25 V. The width and length of the transistors used are given in
Table 5. The layout of the VD-EXCCII as presented in
Figure 6 was drawn using the nhp and php high-performance MOS transistors from the Silterra library, and the layout verification was done using the Calibre tool. The layout occupied a total area of 54.28 × 22.80 µ
. The bias current of the OTA was fixed at 120 µA resulting in transconductance of 1.0321 mS. The important design parameters were extracted from post-layout simulations and are summarized in
Table 6.
The proposed filter was tested by designing for a center frequency of 8.0844 MHz and quality factor of 1.015 by selecting the passive component as
and
1.0321 mS. The power dissipation of the filter was found to be 5.76 mW. The five filter responses in VM, CM, TAM and TIM modes are presented in
Figure 7,
Figure 8,
Figure 9 and
Figure 10.
To examine the signal processing capability of the proposed universal filter, the transient analysis was carried out in VM mode for HP, LP and BP responses. A VM sinusoidal signal of 100 mV
p-p and a frequency of 8.0844 MHz was applied at the input, and the output was analyzed as presented in
Figure 11. It can be inferred from the figure that the phase relation between the input and LP, BP and HP outputs of the filter are correct.
In the presented filter, the quality factor can be set independent of the pole frequency of the filter, as is clear from Equations (17) and (18). The quality factor tunability was verified by analyzing the BP response in CM for different values of
R2, as shown in
Figure 12. It can be deduced from
Figure 12b that the quality factor of the filter can be tuned linearly. The fitting equation using a linear regression with coefficient of determination
R2 = 0.9832, which indicates the fraction of the fitting values that are closest to the line of reference data, is given in
Figure 12. The pole frequency of the proposed filter can be tuned by varying the bias current of the OTA, as can be inferred from Equation (17). The tuning property is validated by plotting the VM-AP response for the different values of the OTA bias current, as shown in
Figure 13. The fitting equation using a power regression with
R2 = 0.9962 is given in
Figure 13b.
To study the effect of process spread and the non-idealities of the capacitors employed on the performance of the designed filter, a Monte Carlo analysis is carried out for 200 runs. The Monte Carlo analysis results for the VM BP response are given in
Figure 14. The results for CM AP configuration are given
Figure 15. Corresponding histograms demonstrate the variations of the pole frequency at −180°. The results indicate that the frequency deviation of the filter is within acceptable limits. This further validates the robustness of the design.
The total harmonic distortion (THD) of the filter for LP and BP responses is plotted for different input signal amplitudes for VM as shown in
Figure 16. The THD plot for CM-BP/LP is presented in
Figure 17. The THD remains within acceptable limits (≤7.5%) for appreciable input range.
The decrease in pole frequency of the filter due to rise in temperature can be attributed to the decrease in OTA transconductance. The main factors that influence the transconductance are the threshold voltage (
) and carrier mobility.
can be approximated as a linear function of temperature [
45,
46] given by Equation (38):
here,
denotes the threshold voltage temperature coefficient which, varies from −1 mV/°C to −4 mV/°C and
is the reference temperature (300 K).
The dependence of carrier mobility on temperature is modelled by [
46]:
where
is the mobility temperature exponent considered as a constant approximately equal to 1.5. The Equations (38) and (39), show that the threshold voltage (
) and mobility (
) exhibit a negative temperature dependence which explains the decrease in frequency with temperature, as shown in
Figure 18 for CM AP response.
To validate the proposed CM-SIMO filter, it is designed for a center frequency of 6.4 MHz and quality factor of 1.015 by selecting passive component as
and
gm1 = 1.0321 mS. The five filter responses in CM mode are presented in
Figure 19.
The time domain and Monte Carlo analysis results of the filter are presented in
Figure 20 and
Figure 21, which verify the correct filter operation. The histogram depicted in
Figure 21 demonstrates the variations of the pole frequency at −180°.
The
Q factor tunability is tested for different values of resistor
, as presented in
Figure 22. The fitting equation using a linear regression with
R2 = 0.9986 is given in
Figure 22b. Furthermore, the total harmonic distortion for different input current amplitudes is shown in
Figure 23. It can be inferred that the THD remains approximately 2.5% for a considerable signal range.
It can be concluded from the results that the characteristics of the AP filters have a slight imperfection, as all magnitude responses have a hump at the resonant frequency. This is caused by the frequency-dependent non-ideal current and voltage transfer gains and the parasitic resistances associated with the different nodes. All the mentioned non-idealities are discussed in detail in
Section 4. It is also found that the linear range (dynamic range) of the circuit is mostly affected by small supply variations; however, the filter performance is not adversely affected.
To further bring out the merits of the proposed filter, a comparative analysis of the single ABBs-based mixed mode filters is carried out. It can be inferred from
Table 7 that except [
40], no other filter can provide all five filter responses in all four modes of operation. The latest presented filter in [
47] is not a truly mixed mode and also suffers from use of negative and double input signals for filter response realization. The designs in [
14,
27,
40,
48] suffer from passive component matching requirements. The design in [
48] requires a change in circuit configuration for realizing different responses, which is impractical. Although the proposed filter consumes more power compared with a few other designs, the power consumption of the filter can be reduced by redesigning the VD-EXCCII at low supply voltage and reduced bias currents.