Key Recovery for Content Protection Using Ternary PUFs Designed with Pre-Formed ReRAM
Abstract
:Featured Application
Abstract
1. Introduction
- [Section 2] In this section we present a generic description of one-way unclonable functions and physical unclonable functions. We also present how the use of ternary states has the potential to reduce the bit error rates in the part per million range (ppm).
- [Section 3] The architecture allowing the secure key recovery from the ternary PUFs, is shown in Section 3. The replacement of mainstream error correcting codes (ECC) by a search engine such as response-based cryptography (RBC) is suggested. We explain how the helper data needed by ECC is replaced by a message digest of the key that does not leak information.
- [Section 5] In this section we detail how the ternary PUFs can be implemented with resistive random-access memories (ReRAM) operating in the pre-forming range. We suggest methods to exploit their physical properties to enhance tamper resistance, to sense certain attacks, and to self-destruct the device, at low power, when needed.
- [Section 6] In Section 6, the experimental work conducted to validate the concept is presented. A full prototype with custom ReRAM circuits allows the characterization and optimization of the solutions in terms of latencies and bit error rates. The cryptographic algorithms selected for this study are SHA-3, SHAKE, and elliptic curves, and the algorithms under consideration for standardization for the post-quantum cryptography are by NIST.
2. One Way Unclonable Functions with Ternary States
2.1. One Way Unclonable Functions
2.1.1. Random Number (T)
- The random number T feeds an extended output function (XOF) pointing at a set of addresses A contributing to the generation of stream K. For example, the XOF can be a SHAKE from the message digest MD of the SHA-3 hashing function.
- T can be concatenated with password PW, as shown in Equation (2):
- With the use of a password, or another multi-factor scheme, T can be freely disclosed through insecure communication channels.
2.1.2. Individual Digital Access Instructions (IDAccess):
- The individual digital access IDAccess is used to retrieve the set of instructions “I” needed to generate K from the set of addresses A. To enhance security, I can be XORed with the message digest “MD” of the XOF as shown in Equation (3):
- With this protection, IDAccess can be freely disclosed through insecure communication channels.
- The set of instructions I can incorporate is a ternary representation that reduces the bit error rates (BER) of the output stream K, and it can offer additional protection. When an opponent tests the one-way function without knowing the position of the ternary states, Ψ generates streams with high BER and potentially damages the structure permanently.
2.1.3. One-Way-Ness of the Function Ψ
- The knowledge of K does not disclose the input parameters (T, IDAccess).
- The knowledge of one input parameter alone, T or IDAccess, does not disclose K.
2.1.4. Collision Avoidance
- Any change in the input parameters is likely to generate different output.
- Two different outputs are most likely the result of different inputs unless the difference in the output is small enough.
- Repeating the function Ψ could result in small variations of the K stream; let us say that typically 90% of the stream will be the same.
2.1.5. Un-Clonability
- The function is unclonable and can have a physical execution, making it highly unlikely to be duplicated.
- During “enrollment”, the image of the one-way function of the client device can be downloaded in a look-up table of the controlling device. This allows the controlling device to communicate safely with the client device as both parties can independently generate the same stream K from the shared input parameters T and IDAccess, and then they can use K as part of a cryptographic protocol.
2.2. One Way Unclonable Functions with PUFs
2.2.1. Ring Oscillator PUFs
2.2.2. Arbiter PUFs
2.2.3. SRAM-Based PUFs
2.2.4. ReRAM-Based PUFs
2.3. Use of Ternary States to Protect the One-Way Unclonable Functions
2.4. Error-Correcting Methods Versus Search Engines
2.4.1. Error-Correcting Codes (ECC)
2.4.2. Response-Based Cryptography (RBC)
3. Session Key Recovery with Ternary PUFs
3.1. Preparation Cycle—Session Key Encapsulation
3.2. Session Key Recovery
3.3. Light Search Engine Implementation
4. Content Protection with Ternary Unclonable Functions
4.1. Preparation Cycle—Encryption and Delivery of the Digital Files
- Both communicating parties have independent access to a shared password PW; number T and PW are XORed. The resulting stream is hashed with a SHA-3 generating MD, which is extended with a SHAKE to generate stream A for the m addresses:
- ○
- MD ← SHA-3 (T ⊕ PW)
- ○
- A ← SHAKE(MD)
- ○
- A is pointing at the m addresses of the PUF
- The m-bit long mask is retrieved from IDAccess to hide the addresses containing fuzzy positions. This leaves k positions, k < m, for response generation from the image of the PUF. The output is the k-long response K.
- The digital file M is encrypted into ciphertext C with K, the responses K are hashed with a SHA-3 to get H(K), and the mask is XORed with MD.
- T, C, and H(K) are transmitted to the client device.
4.2. Decryption of the Digital Files by the Client Device
4.3. Protection of Digital Files Stored by IoT Terminals
- Retrieves the challenges (T, IDAccess).
- The responses K are generated with the PUF, from the challenges.
- The IoT hashes K for the search engine.
- The file M is encrypted with K to generate the ciphertext C.
- The IoT stores T, C, and the message digest H(K), but not IDAccess, which is only stored for future reference by the server.
- Receive IDAccess.
- Read from the memory number T, ciphertext C, and message digest H(K).
- Generation of K’ from the one-way unclonable function.
- Retrieve K from K’ and H(K) with a search engine.
- Decrypt the digital file using K as a cryptographic key.
5. Implementation with SRAM and ReRAM Devices
5.1. Description and Analysis of the SRAM Implementation
5.2. Description and Analysis of the ReRAM Implementation
5.3. Comparative Analysis of SRAM versus ReRAM Schemes
- Entropy: number of cells or pairs: The entropy of SRAM-based cryptosystems is proportional to the size of the array; however, the cost of enrollment also increases at the same rate. The differential protocol comparing the resistance value between the cells belonging to small 4 Kb ReRAM arrays involves 16 million possible pairs. With 8 different levels of possible currents, as tested in this study, the number of possible pairs reach 126 M. This number is scaled linearly by increasing the number of levels of current and with the square of the size of the array.
- Bit error rates of the responses: The BERs of SRAM PUFs are reduced by increasing the number of power off/on cycles at different temperatures. As shown in Figure 10, BERs in the 2 10−6 range is possible at a cost of enrollment cycles lasting multiple hours, which lacks practicality. Conversely, the way to reduce the BERs of two ReRAM arrays, driven by the differential protocol, is to increase the size of the buffer, which does not require longer enrollment times. Considering the difficulty in quantifying extremely low BERs, an extrapolation of the data reported in Figure 12, points to BERs in the 1 10−8 range, with buffer sizes large enough and with the appropriate screening of unstable cells.
- Enrollment cycles: One of the values of the differential protocol is to cut the enrollment time. There is no need to test the pairs of ReRAM cells upfront during enrollment, testing each array thoroughly is enough to generate the initial response from a look-up table. In the analysis performed in this study, eight thousand cells were tested during the enrollment of 15 min, rather than the 128 million possible pairs. The measurement of the resistance of a cell is analog; therefore, unlike reading an SRAM cell, there is no need to repeat the measurements to quantify the proportion of “0” or “1”.
- Response cycles: Generating responses from the SRAM PUF is extremely fast after powering on the device. Minimizing latencies of the response generation of pre-formed ReRAM PUF has been a challenging task due to the high resistance values that could reach 10 MΩ. In the differential protocol, there is no need to measure these values, the only information needed is to find which cell has the higher resistance value of the two. This allows for an optimization of the circuitry. In this study, we found that 10 ms are enough to read 256-bit long streams. Further reductions in latencies have a negative impact on the BERs, as the measurement becomes noisy.
- Crypto-analysis: One possible attack, which is a major problem for certain applications, is when the terminal device is under the control of the opponent for even a short period of time. In this instance, it is possible to read the SRAM in a matter of seconds after power off/on cycles. The bulk of the information needed for key generation can be recovered after 100 cycles, which takes about 5 min. Pairs of ReRAM cells are more difficult to attack. The two 4 Kb ReRAM arrays are tested separately, upfront, during quick enrollment cycles. The circuitry for the ReRAM PUFs is such that when the two arrays are mounted on the custom board, the user only has access to differential reads, without having access to the individual devices. Therefore, a crypto-analysis requires that 128 million pairs be read, which takes about 4.4 h. As shown in Figure 13, two 512 Kbit arrays take 9 years to be differentially read.
- Ability to sense attacks: The design of sensing elements inserted in the ReRAM arrays operating in the pre-forming range has been reported [15]. An opponent exploring the ReRAM arrays without knowledge of the vulnerable cell population has a high probability of damaging these cells. The cryptosystems developed in this study avoid this population; therefore, it is possible to monitor the potential infiltration of a crypto-analyst and to detect an attack.
- Self-destruct mode at low power: ReRAMs are designed to operate in the set/reset mode after the forming operation. The forming operation in a ReRAM is a non-reversible process that usually starts with voltage stress in the 1.5-volt range. In case of an attack, the user can trigger a self-destruct mode of the ReRAM cells by initiating the forming cycles. Only partial cycles are needed, as the objective is to form enough cells to make the PUF useless, for example, half of the cell population.
- Radiation hardness: SRAMs are vulnerable to ionizing radiation; however, in this particular application there is a mitigation process of performing power off/on cycles before each response generation. The likelihood of several cells being impacted by radiation just before response generation cycles is small; therefore, the impact on the BER is anticipated to be limited. The ReRAM technology is known for being rad-hard [44]. The 4 Kb arrays in this study were manufactured with the conductive bridge RAM (CBRAM) technology that has been tested as more stable under ionizing radiation than the more traditional ReRAM technology that can be impacted by migrations of oxygen vacancies.
6. Characterizing the Key Recovery from ReRAM PUFs
6.1. Rates of Erratic Keys Recovered from ReRAM PUFs
- 4290/5002 keys (85.8%) have zero errors versus a Poisson distribution at 85.4%
- 643/5000 keys (12.9%) have one error versus a Poisson distribution at 13.4%
- 58/5000 keys (1.2%) have two errors versus a Poisson distribution at 1.06%
- 8/5000 keys (0.16%) have three errors versus a Poisson distribution at 0.06%
- 1/5000 keys (0.02%) have four errors versus a Poisson distribution at 0.002%
6.2. Latencies for the Key Recovery Protocols with ReRAM PUFs
- The average latency to recover 4290 keys without error is 2.11 s, which is mainly due to the time it takes to read the 256 addresses from the pre-formed PUFs.
- The average latency to recover 643 keys with one error is 2.56 s. This includes an additional 40 ms for the RBC-light.
- The average latency to recover 58 keys with two errors is 7.3 s. The additional delays are due to the need to read the PUFs several times.
- The average latency to recover 8 keys with three errors rose to 10.6 s for the same reason.
- The average latency to recover the last key with four errors was more difficult and took 35.1 s. The difficulty here was the necessity to handle several cells that had responses that always differed from the initial response. We suspect that the initial read was noisy. This type of problem can be resolved by reading the key, multiple times, during the initial cycle and erasing the bad ones. However, in most use cases, a latency of 35 s every 5000 cycles is perfectly acceptable.
6.3. Software and Security Considerations
- The XOR functions concatenated the input parameters, such as random numbers, with passwords for multi-factor access control.
- The hash function SHA-3 (512 bit), with its one-wayness, is at the core of several layers of protection, including:
- To convert the XORed input parameters into the message digest MD that feeds the XOF and selects the addresses of the PUF used for response generation. MD is also used to protect IDAccess after XORing operations.
- As part of the RBC, the hashing of the responses is used to uncover the original responses.
- The XOF SHAKE converted the MD into the set of addresses pointing to the PUF.
- The session keys were encrypted using AES-256, and the keys were generated from the original responses of the PUF. They were decrypted with the keys retrieved from the RBC-light, and with the fresh responses from the same PUF after RBC correction.
7. Summary and Future Research
- Per paid content delivery. A service provider can deliver several encrypted files containing information such as movies, music, apps, maps, and operating systems. The user obtains access to the files after paying a fee.
- Protected user manuals. Staged access to a prepared set of instructions for a particular task, which evolves over time, due to changes in conditions. The users receive, as needed, access codes to open a particular portion of a user manual. An example of such an application would be pilots flying a plane.
- Cooperative users. The server concurrently sends to user 2 the information needed by user 1 to retrieve a sub-key, and to user 1 the information needed by user 2 to retrieve the complementary sub-key. The full key is generated by knowledge of both sub-keys.
- Securing interconnected IoTs. Nodes of IoTs such as controlling and metering elements in a grid, home hubs, smart sensors, contain information that is stored locally and which needs to be protected constantly.
- Authentication of the server. When operating in a zero-trust environment, the server sends users information previously used to encrypt and store a session key.
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Data Availability Statement
Acknowledgments
Conflicts of Interest
Abbreviations
AES AFRL | Advanced Encryption Standard United states Air Force Research Laboratory |
BER | Bit Error Rate |
CBRAM | Conductive Bridge Random Access Memory |
CMOS CRP | Complementary Metal Oxide Silicon Challenge Response Pair |
ECC | Error Correcting Code |
DES | Data Encryption System |
DRAM | Dynamic Random Access Memory |
FRR | False Reject Rate |
FPGA | Field Programable Gate Array |
GPU | Graphic Processing Unit |
HPC | High Performance Computing |
IoT MD | Internet of Things Message Digest |
MIPS | Microprocessor without Interlocked Pipelined Stages |
MRAM | Metal Random Access Memory |
MUX | Multiplexer |
NIST | National Institute of Standard and Technology |
PKI | Public Key Infrastructure |
PUFPW | Physical Unclonable functionPassword |
RBC | Response Based Cryptography |
ReRAM | Resistive Random Access Memory |
RO | Ring Oscillator |
RSA | Rivest Shamir Adleman code |
SHA | Standard Hashing Algorithm |
SRAM | Static Random Access Memory |
XOF | Extended Output Function |
XOR | Exclusive “OR” Gate |
References
- Wu, P.; Nathan, R.; Tredennick, H. Secure Hardware Signature and Related Methods and Applications. U.S. Patent 10,891,366, 12 January 2021. [Google Scholar]
- Kameo, N.; Anzai, F.; Nishimae, E. Information Distribution Device, Distribution Target Device, Information Distribution System, Information Distribution Method, and Non-transitory Computer-Readable medium. U.S. Patent 11,128,480, 21 September 2021. [Google Scholar]
- Karakoyunlu, D.; Poo, T.L. Tamper-Resistant Component Networks. U.S. Patent 11,151,290, 19 October 2021. [Google Scholar]
- Wentz, C. Systems, Devices, and Methods for Recording a Digitally Signed Assertion Using an Authorization Token. U.S. Patent 11,153,098, 19 October 2021. [Google Scholar]
- Herder, C.; Yu, M.; Koushanfar, F. Physical Unclonable Functions and Applications: A Tutorial. Proc. IEEE 2014, 102, 1126–1141. [Google Scholar] [CrossRef]
- Papakonstantinou, I.; Sklavos, N. Physical Unclonable Function Design Technologies: Advantages & Trade Offs. In Computer and Network Security; Daimi, K., Ed.; Springer: New York, NY, USA, 2018; ISBN 978-3-319-58423-2. [Google Scholar]
- Gao, Y.; Ranasinghe, D.; Al-Sarawi, S.; Kavehei, O.; Abbott, D. Emerging physical unclonable functions with nanotechnologies. IEEE Access 2016, 4, 61–80. [Google Scholar] [CrossRef] [Green Version]
- Jin, Y. Introduction to hardware security. Electronics 2015, 4, 763–784. [Google Scholar] [CrossRef]
- Rahman, M.T.; Rahman, F.; Forte, D.; Tehranipoor, M. An aging-resistant ro-puf for reliable key generation. IEEE Trans. Emerg. Top. Comput. 2016, 4, 2016. [Google Scholar] [CrossRef]
- Habib, B.; Kaps, J.; Gaj, K. Efficient SR-Latch PUF. In Proceedings of the ISARC-2015, Bochum, Germany, 15–17 April 2015. [Google Scholar]
- Holcomb, D.E.; Burleson, W.P.; Fu, K. Power-up SRAM state as an Identifying Fingerprint and Source of TRN. IEEE Trans. Comp. 2008, 57, 1198–1210. [Google Scholar]
- Wang, W.; Guin, U.; Singh, A. Aging-Resilient SRAM-based True Random Number Generator for Lightweight Devices. J. Electron. Test. 2020, 36, 301–311. [Google Scholar] [CrossRef]
- Zhang, X.; Jiang, C.; Dai, G.; Zhong, L.; Fang, W.; Gu, K.; Xiao, G.; Ren, S.; Liu, X.; Zou, S. Improved performance of SRAM-based true random number generator by leveraging irradiation exposure. Sensor 2020, 20, 6132. [Google Scholar] [CrossRef] [PubMed]
- Chen, A. Comprehensive Assessment of RRAM-based PUF for Hardware Security Applications. In Proceedings of the 2015 IEEE International Electron Devices Meeting (IEDM), Washington, DC, USA, 7–9 December 2015; Available online: https://ieeexplore.ieee.org/abstract/document/7409672 (accessed on 24 January 2022).
- Cambou, B.; Chen, Y.-C. Tamper Sensitive Ternary ReRAM-Based PUF. In Proceedings of the SAI Computing Conference, London, UK, 16 July 2021. [Google Scholar]
- Christensen, T.A.; Sheets, J.E., II. Implementing PUF Utilizing EDRAM Memory Cell Capacitance Variation. U.S. Patent 8,300,450 B2, 30 October 2012. [Google Scholar]
- Plusquellic, J.; Bhunia, S. Systems and Methods for Generating PUF’s from Non-Volatile Cells. U.S. Patent WO 20160328578, 10 November 2016. [Google Scholar]
- Wang, Y.; Malysa, G.; Wu, S.; Yu, W.-K.; Suh, G.; Kan, E. Flash Memory for Ubiquitous Hardware Security Functions: TRNGs and Device Fingerprints. In Proceedings of the 2012 IEEE Symposium on Security and Privacy, San Francisco, CA, USA, 20–23 May 2012; pp. 33–47. [Google Scholar] [CrossRef] [Green Version]
- Prabhu, P.; Akel, A.; Grupp, L.; Yu, W.-K.S.; Suh, G.E.; Kan, E.; Swanson, S. Extracting Device Fingerprints from Flash Memory by Exploiting Physical Variations. In Proceedings of the 4th International Conference on Trust and Trustworthy Computing, Pittsburg, PA, USA, 22–24 June 2011. [Google Scholar]
- Vatajelu, E.I.; Di Natale, G.; Barbareschi, M.; Torres, L.; Indaco, M.; Prinetto, P. STT-MRAM-Based PUF Architecture exploiting MTJ Fabrication-Induced Variability. ACM J. Emerg. Technol. Comput. Syst. 2017, 13, 1–21. [Google Scholar] [CrossRef]
- Zhu, X.; Millendorf, S.; Guo, X.; Jacobson, D.; Lee, K.; Kang, S.; Nowak, M. Physically Unclonable Function Based on Programming Voltage of Magneto-Resistive Random-Access Memory. U.S. Patent 9,343,135, 17 May 2016. [Google Scholar]
- Cambou, B.; Orlowski, M. PUFs Designed with Ternary States; ACM: New York, NY, USA, 2016; ISBN 978-1-4503-3752-6/16/04. [Google Scholar]
- Cambou, B.; Telesca, D. Ternary Computing to Strengthen Cybersecurity, Development of Ternary State based Public Key Exchange. In SAI Computing Conference; IEEE: London, UK, 17 July 2018. [Google Scholar]
- Delvaux, J.; Gu, D.; Schellekens, D.; Verbauwhede, I. Helper Data Algorithms for PUF-Based Key Generation: Overview and Analysis. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 2015, 34, 889–902. [Google Scholar] [CrossRef] [Green Version]
- Taniguchi, M.; Shiozaki, M.; Kubo, H.; Fujino, T. A stable key generation from PUF responses with a Fuzzy Extractor for cryptographic authentications. In Proceedings of the IEEE 2nd Global Conference on Consumer Electronics (GCCE), Tokyo, Japan, 1–4 October 2013. [Google Scholar]
- Kang, H.; Hori, Y.; Katashita, T.; Hagiwara, M.; Iwamura, K. Cryptographic key generation from PUF data using efficient fuzzy extractors. In Proceedings of the 16th International Conference on Advanced Communication Technology, Pyeongchang, Korea, 16–19 February 2014. [Google Scholar]
- Boehm, H. Error Correction Coding for Physical Unclonable Functions: Austrochip. In Proceedings of the Workshop in Microelectronics, Vienna, Austria, 1 January 2010. [Google Scholar]
- Chen, T.; Willems, F.; Maes, R.; Sluis, E.; Selimis, G. A robust SRAM-PUF key generation scheme based on polar codes. arXiv 2017, arXiv:1701.07320. [Google Scholar]
- Maes, R.; Tuyls, P.; Verbauwhede, I. A Soft Decision Helper Data Algorithm for SRAM PUFs. In Proceedings of the 2009 IEEE International Symposium on Information Theory, Seoul, Korea, 28 June–3 July 2009. [Google Scholar]
- Cambou, B.; Philabaum, C.; Booher, D.; Telesca, D. Response-Based Cryptographic Methods with Ternary Physical Unclonable Functions. In Proceedings of the Future of Information and Communication Conference, San Francisco, CA, USA, 14–15 March 2019; Springer: Berlin/Heidelberg, Germany, 2019. [Google Scholar]
- Cambou, B. Unequally powered Cryptography with PUFs for networks of IoTs. In Proceedings of the IEEE Spring Simulation Conference, Tucson, AZ, USA, 29 April–2 May 2019. [Google Scholar]
- Cambou, B.; Mohammadi, M.; Philabaum, C.; Booher, D. Statistical Analysis to Optimize the Generation of Cryptographic Keys from PUFs. In Proceedings of the Science and Information Conference, London, UK, 16–17 July 2020; Springer: Berlin/Heidelberg, Germany, 2020. [Google Scholar]
- Lee, K.; Gowanlock, M.; Cambou, B. SABER-GPU: A Response-Based Cryptography Algorithm for SABER on the GPU. In Proceedings of the 2021 IEEE 26th Pacific Rim International Symposium on Dependable Computing (PRDC), Perth, Australia, 1–4 December 2021. [Google Scholar]
- Wright, J.; Fink, Z.; Gowanlock, M.; Philabaum, C.; Donnelly, B.; Cambou, B. A Symmetric Cipher RBC Engine Accelerated Using GPGPU. In Proceedings of the IEEE virtual CNS conference, Virtual, 4–6 October 2021. [Google Scholar]
- NIST-3rd Round PQC. 22 July 2020. Available online: https://csrc.nist.gov/News/2020/pqc-third-round-candidate-announcement (accessed on 24 January 2022).
- Nejatollahi, H.; Dutt, N.; Ray, S.; Regazzoni, F.; Banerjee, I.; Cammarota, R. Post-Quantum lattice-based cryptography implementations: A survey. ACM Comput. Surv. 2019, 51, 129. [Google Scholar] [CrossRef]
- Ducas, L.; Kiltz, E.; Lepoint, T.; Lyubashevsky, V.; Schwabe, P.; Seiler, G.; Stehlé, D. CRYSTALS-Dilithium Algorithm Specifications and Supporting Documentation. 2019. Available online: https://pq-crystals.org/dilithium (accessed on 1 January 2022).
- Nurshamimi, S.; Kamarulhaili, H. NTRU Public-Key cryptosystem and its variants: An overview. Int. J. Cryptol. Res. 2020, 10, 21. [Google Scholar]
- D’Anvers, J.-P.; Karmakar, A.; Roy, S.; Vercauteren, F. Saber: Module-LWR based key exchange, CPA-secure encryption and CCA-secure KEM. In International Conference on Cryptology in Africa; Cryptology ePrint Archive, Report 2018/230; Springer: Berlin/Heidelberg, Germany, 2018; Available online: https://eprint.iacr.org/2018/230 (accessed on 15 December 2021).
- Casanova, A.; Faugere, J.-C.; Macario-Rat, G.; Patarin, J.; Perret, L.; Ryckeghem, J. GeMSS: A Great Multivariate Short Signature; NIST PQC project round 2; National Institute of Standards and Technology: Gaithersburg, MD, USA, 30 January 2019. Available online: https://csrc.nist.gov/Projects/post-quantum-cryptography/round-2-submissions (accessed on 24 January 2022).
- Fouque, P.-A.; Hoffstein, J.; Kirchner, P.; Lyubashevsky, V.; Pornin, T.; Prest, T.; Ricosset, T.; Seiler, G.; Whyte, W.; Zhang, Z. Falcon: Fast-Fourier Lattice-Based Compact Signatures over NTRU; NIST PQC project round 2, documentation; National Institute of Standards and Technology: Gaithersburg, MD, USA, 2019. [Google Scholar]
- Ding, J.; Chen, M.-S.; Petzoldt, A.; Schmidt, D.; Yang, B.-Y. Rainbow; NIST PQC project round 2, documentation; National Institute of Standards and Technology: Gaithersburg, MD, USA, 2019. [Google Scholar]
- Maes, R.; van der Leest, V. Countering the Effects of Silicon Aging on SRAM PUFs. In Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Arlington, VA, USA, 6–7 May 2014. [Google Scholar]
- Grossi, A.; Calligaro, C.; Perez, E.; Schmidt, J.; Teply, F.; Mausolf, T.; Zambelli, C.; Olivo, P.; Wenger, C. Radiation hard design of HfO2 based 1T1R cells and memory arrays. In Proceedings of the 2015 International Conference on Memristive Systems (MEMRISYS), Paphos, Cyprus, 8–10 November 2015. [Google Scholar]
PUF | Challenges | Responses | ||
---|---|---|---|---|
T | IDAccess | |||
RO | To point at a set of M pairs of ROs | To point at a subset of N pairs of RO (N < M) | To avoid pairs oscillating at a similar frequency | Each N pair of ROs generates a 0 or 1 |
Arbiter | M sets of instructions driving MUXs in the up or down position | To point at a subset of N instructions (N < M) | To avoid the sets of instructions known to be unstable | Each N set of instructions generates a 0 or 1 |
SRAM | To point at M addresses in the SRAM array | To point at a subset of N addresses (N < M) | To avoid the SRAM cells known to be unstable | Each N cell of SRAM array generates a 0 or 1 |
ReRAM | To point at M addresses in the ReRAM array | To point at a subset of N addresses (N < M) | To avoid the ReRAM cells known to be unstable | Each N cell of ReRAM array generates a 0 or 1 |
Factor | 256 Kb SRAM | 2 × 4 Kb ReRAM |
---|---|---|
Commercial availability | Broad | Limited |
Entropy: number of cells/pairs | 256 k cells | 128 M pairs |
BER responses | 2 × 10−6 | 1 × 10−8 |
Latencies: enrollment cycle | 7 h | 15 min |
Latencies: responses/256 bits | 10 µs | 10 ms |
Crypto-analysis | 5 min | 4.4 h |
Sense attack | No | Yes |
Self-destroy | No | With 1.5 V |
Radiation hardness | Limited | Yes |
Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. |
© 2022 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
Share and Cite
Cambou, B.F.; Jain, S. Key Recovery for Content Protection Using Ternary PUFs Designed with Pre-Formed ReRAM. Appl. Sci. 2022, 12, 1785. https://doi.org/10.3390/app12041785
Cambou BF, Jain S. Key Recovery for Content Protection Using Ternary PUFs Designed with Pre-Formed ReRAM. Applied Sciences. 2022; 12(4):1785. https://doi.org/10.3390/app12041785
Chicago/Turabian StyleCambou, Bertrand Francis, and Saloni Jain. 2022. "Key Recovery for Content Protection Using Ternary PUFs Designed with Pre-Formed ReRAM" Applied Sciences 12, no. 4: 1785. https://doi.org/10.3390/app12041785
APA StyleCambou, B. F., & Jain, S. (2022). Key Recovery for Content Protection Using Ternary PUFs Designed with Pre-Formed ReRAM. Applied Sciences, 12(4), 1785. https://doi.org/10.3390/app12041785