Next Article in Journal
Quantum Private Comparison Based on Four-Particle Cluster State
Previous Article in Journal
Energy Consumption Prediction for Drilling Pumps Based on a Long Short-Term Memory Attention Method
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

DC-DC Buck Converters with Quasi-Online Estimation of Filter Capacitor Equivalent Parameters

by
Dadiana-Valeria Căiman
*,
Corneliu Bărbulescu
,
Sorin Nanu
and
Toma-Leonida Dragomir
Faculty of Automation and Applied Informatics, Politehnica University Timișoara, Bulevardul Vasile Pârvan, nr. 2, 300223 Timişoara, Romania
*
Author to whom correspondence should be addressed.
Appl. Sci. 2024, 14(22), 10756; https://doi.org/10.3390/app142210756
Submission received: 9 October 2024 / Revised: 8 November 2024 / Accepted: 18 November 2024 / Published: 20 November 2024

Abstract

:
The article focuses on devising solutions for monitoring the condition of the filter capacitors of DC-DC converters. The article introduces two novel DC-DC buck converter designs that monitor the equivalent series resistance (ESR) and the capacitance of capacitors using a parameter observer (PO) and simple variable electrical networks (VEN). For the first scheme, the PO processes in real time the voltage at the capacitor terminals during a discharge-charge cycle. For the second scheme, the filtering is performed with two or more capacitors in parallel, and the PO processes the voltage at the terminals of each capacitor during two discharge processes without interrupting the filtering operation of the converter. The paper presents the principles and theoretical support on which the two schemes of DC-DC buck converters are based, design details regarding PO and VEN, as well as experiments performed with each of the schemes. In the experimental schemes, the PO is implemented with a microcontroller, and the parameters of some aluminum electrolytic filter capacitors are calculated in a real-time manner of about 40   m s . The calculation accuracy of the equivalent capacity is very good. Regarding the calculation accuracy of the ESR, it is shown that it depends on the fulfillment of certain ratios between the VEN resistances, on the one hand, as well as between them and the ESR, on the other hand.

1. Introduction

DC-DC converters are electronic subassemblies used in a huge amount of equipment in numerous fields of activity. The online knowledge of the behavior of the circuits or components and the knowledge of their state-of-health serve in operation as a prerequisite both for the adjustment and adaptation of the control of the converters and for predictive maintenance [1,2]. In the design and operation of DC-DC converters, it is important to model them, completely or partially, i.e., only some of the main components, mostly the output filter capacitor [3]. It can be found both at buck [4] and boost converter [5]. The filter capacitor behavior is described by models with schemes of varying complexity, depending on the details of the physical phenomena with impact on the system functioning [6,7,8,9]. The most used model is the R-C series one [10,11,12].
The R-C series simplified model is suitable for capacitor functions in a low-band frequency [3]. Regarding the monitoring of a capacitor, the equivalent series resistance (ESR) and the equivalent capacitance are frequently used as diagnostic parameters [13]. Always, in applications, the ESR and capacitance vary over a frequency range determined by the spectrum of the current corresponding to the operating regime [13]. In this context, the “equivalent” attribute underlines, in addition to the “effective” attribute used, for example, in [14], the fact that the estimated values of the two parameters characterize the behavior of the capacitor across an entire operating regime [15].
Condition monitoring of capacitors basically includes two phases: the estimation of the equivalent parameters, followed by the use of the estimated values to assess the capacitor condition [2,16,17]. The classifications of estimation techniques and evaluation methods are also addressed in papers [3,18]. In [19], attention is paid to the classification of condition monitoring techniques for aluminum electrolytic capacitors (AEC) in offline, online, and quasi-online techniques.
In control systems engineering and system analysis, mathematical models called observers are frequently used to estimate individual or hybrid variables (combinations of states and input signals) from real systems, called master systems. The inputs of an observer are the measurable inputs and outputs of the master system [20]. Observers are essentially subsystems tracking one or more measurable outputs of the master system.
Numerous studies on DC-DC converters and their components imply observers for estimation, performance control, and fault detection [1,21,22,23,24,25,26]. In [21], specific observers are used in a buck converter for the fault diagnosis, inductance, and capacitance estimations. In reference [22], the observer serves to control a switching-mode DC-DC converter. The study [25] proposes distinct observers for the ESR and for the capacitance C of the output capacitor of a boost converter. In [1], a state observer is proposed to counterbalance the errors with an ideal model of a boost converter. The paper [23] introduces a piecewise linear observer designed for fault-sensitive detection filters for power electronics systems and exemplified for a dual-redundant buck converter. The study in [24] focuses on the design, analysis, and experimental integration of an enhanced robust adaptive parameter identifier for DC-DC converter applications, based on a closed-loop linear switched state observer. This identifier is designed considering for the capacitor a simple C-model. An observer for estimating the load resistance of a DC-DC buck converter is presented in [26].
In [15] is proposed a new type of observer, distinct from those typically employed in control systems, in particular from those used in DC-DC converters, designed to estimate the time constant of a first-order system. The PO was implemented by the authors to estimate the capacitor parameters of a buck converter based on discharging the capacitor in two stages: over the load resistance in the first stage and over the load resistance connected in parallel with additional resistance in the second stage [27]. The PO uses as input only the measured output of the master system, namely, the voltage at the terminals of the filter capacitor.
This article aims to introduce novel DC-DC buck converter schemes provided with the capability to estimate the equivalent parameters of one or more filter capacitors using a parameter observer (PO).
The main contribution of this paper consists of:
(i) The proposal of two new schemes of DC-DC buck converters from the category of those estimating the parameters of the R-C series capacitor impedance model using the principle of non-periodic large-signal charging/discharging profiles [17]. From the point of view of the contribution of the monitored capacitor to the filtering operation during the estimation of the parameters, the schemes are working in a quasi-online mode of operation.
(ii) The implementation of a new monitoring principle for the equivalent parameters with PO based on a capacitor discharge/charge process. Compared to the converter in [26], where the PO monitors a two-stage discharge process, in the new scheme the time to disconnect the capacitor and the load from the converter is reduced. Also, compared to the technique described in [19], current injection into the capacitor is avoided.
(iii) The implementation of the monitoring principle with PO by performing the filtering with two capacitors connected in parallel instead of a single capacitor.
(iv) The experimental validation of the proposed principles on converters with electrolytic filter capacitors.
The following sections of the paper comprise: the theoretical and analytical support of the POs used in DC-DC buck converters (Section 2), the principles of designing the novel schemes (Section 3.1), and the depiction of the converters’ schematics along with their experimental validation methods (Section 3.2 and Section 3.3), discussing the theoretical and experimental results (Section 4), and finally summarizing the conclusions. The article ends with an Appendix A, important in terms of outlining the conditions that must be met to reduce the estimation errors of the filter capacitors’ equivalent parameters.

2. Materials and Methods

2.1. Analytical Support of the Estimation Methods Used in the Schemes Proposed in This Article

The schemes proposed in this article use the estimation method in [15] that estimates the parameter T(t) of the observed (master) system (1) from its free response with PO (2). The observation is made starting from the initial moment t o when y has the value   y o .
T t · y ˙ t + y t = 0 ,   y t o = y o   .
P O :   z t = l n y t , d z ^ t d t = c ^ t ,     z ^ 0 = z ^ o , ε t = z t z ^ ( t ) , c ^ t = K p ε t + K i 0 t ε t ~ d t ~ + c ^ o   ,       T ^ t = 1 c ^ t   .
PO (2) is a stable second-order tracking system of the variable z t = l n y t . It has the state variables z ^ and c ^ . The variable c ^ provides through the opposite of its inverse the estimated T ^ of T. The variable ε represents the tracking error, z ^ o and c ^ o are the initial values of the state variables, and K p = 2 · ω 0 and K i = ω 0 2 are adjustable parameters of the PI block of the PO. They are adjusted so that the tracking process stabilizes as quickly as possible. For this purpose, ω o is chosen so that τ · ω o 10 , τ being the length of the time interval after which it is desired to install the tracking regime.
The above principle is applied in Section 3 to the filter capacitors of two buck converters. For the first converter, the principle is used for a capacitor charge/discharge process, while for the second converter, the principle is only applied for processes of discharge, as in [15].
For the first scheme, the principle is applied to estimate the time constants T 1 and T 2 of a process with a variable structure of the form (3):
T t v ˙ t + v t = u t ,     w i t h   T t = T 1 , u t = 0 , t t 0 , t 1 , v t 0 = v 0 T t = T 2 , u t = K ,   t t 1 , t 2   .
The signals u t and v t are the input and output of the system (3). The modification of the structure occurs at the moment t 1 , simultaneously with the step variation, of amplitude K > 0 , of the input signal. The initial state of the system is   v 0 . Through a simple calculation, it results that the output signal has the expression (4), to which corresponds the curve in V from Figure 1. On the descending portion, the signal has the time constant T 1 , and on the ascending portion, the time constant T 2 .
v t = v 0 · e t t 0 T 1 ,             t t 0 , t 1 v 0 · e t 1 t 0 T 1 + K v 0 · e t 1 t 0 T 1 · 1 e t t 1 T 2 ,           t t 1 , t 2  
To adapt the PO to an input signal of the form (4), we use the fact that this signal can be considered as the output of the exogenous system with variable structure (5).
T t · y ˙ t + y t = 0 ,             y t 0 = v o ,             T t = T 1 ,   t t 0 , t 1   T 2 ,   t t 1 , t 2     v t = y t ,                     t t 0 , t 1       K y t ,         t t 1 , t 2               .
If the signal v t of system (3) is measurable, then interpreting it also as the output of system (5) allows T t to be estimated using a PO. The statement is based on two observations: (i) if the signal v t is measurable, then the signal y t can be determined from it according to Equation (6) obtained from the system output Equation (5); (ii) given the signal y t the parameter T t can be estimated using a PO based on the state equation in (5).
y t = v t , t t 0 , t 1 K v t , t t 1 , t 2 .
The block diagram in Figure 2 is obtained by concatenating observations (i) and (ii). Block S contains the observed system (OS) with model (3) and the operations in (6) necessary to obtain y t . The K and 0 blocks generate the constant values written inside. SW is a switch initially in position 2. At time t 1 it switches to position 1.
Figure 3 exemplifies the behavior of the system in Figure 2 when v ( t ) has Equation (7). The signal v ( t ) is represented in Figure 3a and the system response in Figure 3b. The results were obtained by simulation in the Matlab/Simulink environment.
v t = 2.5 · e t 0.002 ,             t 0 ,   0.008 2.5 · e 4 + 3 K 2.5 · e 4 · 1 e t 0.008 0.001 ,           t 0.008 ,   0.014  
From the perspective of Equation (4) and Figure 2, signal (7) is characterized by the parameters   T 1 = 2 · 10 3   s , T 2 = 10 3   s , K = 3 , t 0 = 0   s , t 1 = 8 · 10 3   s , and PO (2) by the parameters   z ^ o = 0 ,   c ^ o = 0 ,   τ = 0.001   s ,   ω 0 = 50 / τ , Kp = 100,000 s−1, Ki = 2.5 · 10 9   s 2 . As expected, PO returns the values   T ^ 1 = 2 · 10 3   s and T ^ 2 = 10 3   s with a short delay due to the transients, unavoidable regimes that occur at the start of the estimation and at the change of the monotony of signal v ( t ) .
Omitting the OS block, the structure in Figure 2 can be integrated into a new PO as in Figure 4a. This new structure, intended to operate both on the falling edge of the v ( t ) signal and on the rising edge, we call it a parameter observer on two edges (PO2). In the practical case, the processing of the signal v ( t ) is carried out in discrete time, so the connection of PO2 to the OS is carried out as in Figure 4b, PO2 operating according to Equation (8). The used notations have the following meanings: h is the sampling time with which v ( t ) is acquired and operates PO2, IA—Input Adapter, I—Integrator (modified model of OS), C—Comparator (provides tracking error ε ), PI—Tracking Controller type PI, OA—Output Adapter.
P O 2 :     ( I A ) : y k = v k , t t c , t d K v k , t t d , t f ,   z k = l n ( y k ) , ( I ) :     z ^ k = z ^ k 1 + h · c ^ k ,       z ^ 0 = z ^ o , ( C ) :     ε k = z k z ^ k , ( P I ) :     c ^ k = K p ε k ε k 1 + h K i ε k 1 + c ^ k 1 ,   c ^ 0 = c ^ o , O A :     T ^ k = 1 c ^ k .

2.2. Parameter K of PO2

The parameter K in Equation (8) represents the limit value of the asymptotic increasing exponential variation of the observed signal v ( t ) of Equation (4), i.e., of the signal that the designer supposes to apply to the PO2 input.
In practical applications, the correct use of PO2 requires an accurate estimation of the value of K related to the applied signal v ( t ) . As a motivation of this statement, Figure 5 is considered. The exponential in the figure has the equation K · e t / T with K = K 0 The parameter T being constant, its value is equal to the length of the subtangent corresponding to the current point A on the exponential curve, i.e., to the segment B 0 C 0 measured on the asymptote v t = K 0 . When A changes its position, successively passing through the positions A and A , the length of the subtangent does not change. If we wrongly consider for the same exponential that the asymptote is in another position, i.e., that the parameter K has a value different from K 0 , the property is no longer preserved. Thus, if we consider K = K 1 > K 0 the length of the subtangent, B 1 C 1   is greater than the subtangent B 0 C 0 ; moreover, as A passes through the positions A , A , …, it increases tending to infinity. If we consider that K = K 2 < K 0 , the length of the subtangent B 2 C 2 is smaller than the subtangent B 0 C 0 . When the exponential reaches the value   K 2 the length of the subtangent takes the value   0 , and then disappears.
Analytically, the above discussion translates into the analysis of Equation (9), where v K 0 t is the signal interpreted by PO2 when K is tuned correctly, i.e., K = K 0 , and v K t is the signal interpreted by PO2 when K is not tuned correctly, i.e., K K 0 .
v K t = v K 0 t + K K 0 1 e t T ,     t 0   .
The effect of the additional term in (9) is illustrated in Figure 6. In Figure 6a are displayed more characteristics of the type such as that in Figure 3b, of parameter K , generated by PO2 when the signals of Equation (7) were applied to its input with K 2.9 , 2.95 , 2.98 , 2.99 , 3 , 3.01 , 3.02 , 3.05 , 3.1 . The group includes the K   = 3 case. With T ^ 1 , K ( t ) we denote the segments of T ^ ( t ) on the time interval on which v t decreases and with T ^ 2 , K ( t ) the segments corresponding to the time interval on which v t increases. The latter are detailed in Figure 6b. All estimates T ^ 1 , K ( t ) overlap and stabilize at the value T ^ 1 = 2 · 10 3   s . This is explained by the fact that in processing the decreasing variations of v t PO2 does not use the value of K . Among the curves T ^ 2 , K t , only the curve T ^ 2,3 ( t ) stabilizes at the correct value T ^ 2 = 10 3   s . All other curves fail to stabilize. After the damping of the transients that appears starting from the moment t = 0.8 · 10 3   s they have either a monotonically increasing or a monotonically decreasing shape, as K takes values lower or higher than the value 3.
The practical conclusion from the above presentation is:
To apply PO2 to a physical system, it is necessary to tune the value of the parameter K in Equation (8) as precisely as possible to match the value that the same-named parameter assumes in the observed signal (4) generated by the physical system. We call this condition “PO2—tuning condition of K ”.
The PO2—tuning condition of K is more experimental. Tuning can be completed in several ways. The simplest way is to consider K equal to v t final value after stabilization. K can also be determined according to the above discussion of Figure 6.
Once K is tuned, the values of   T 1 and   T 2 in (4) can be estimated with PO2 using the method presented in [27]. According to it, the estimates T ^ i ,   i = 1 ,   2 of the time constants T i ,   i = 1 ,   2 are found as solutions of the equation in (10):
T ^ i = t > t i T ^ i , K t = α · t t i   , i = 1 ,   2 ,
where
α = 2.5 .
The procedure is illustrated in Figure 6b with reference to determination of T ^ 2 using the curve segments     T ^ 2 , K t . The values of T ^ 2 are given by the ordinates of the intersection points of these segments with the semi-straight line of slope α originating from the coordinate point t 2 ,   0 . The results are presented in Table 1. It also contains the percentage errors T ^ 2 % in relation to the value of   T 2 in (7).
The obtained results confirm the findings related to Figure 5.

2.3. Calculation of the Equivalent Parameters of a Capacitor

Discharging a capacitor, modeled by an R-C series connection, across a resistor or charging it from a constant voltage source through a resistor are processes described by first-order systems (1) and (5), respectively. The time constants T 1 and T 2 correspond to the product of the equivalent capacitance C e of the capacitor and the total resistance of the circuit according to Equation (12).
T 1 = C e · R s e + R e x t 1 ,     T 2 = C e · R s e + R e x t 2 .
R s e represents the equivalent ESR, and R e x t 1 and R e x t 2 the resistances in the discharge/charge circuit external to the capacitor.
PO or PO2 provides the estimates T ^ 1   and T ^ 2 of the time constants and calculates the estimates C ^ e and R ^ s e of the equivalent parameters as the solutions of system (13):
C ^ e · R ^ s e + R e x t 1 = T ^ 1 C ^ e · R ^ s e + R e x t 2 = T ^ 2
The calculation formulas of C ^ e and R ^ s e resulting from system (13) show different sensitivities in relation to the errors affecting the values of T ^ 1 ,   T ^ 2 , R e x t 1 and R e x t 2 . The statement is substantiated by the analysis undertaken in Appendix A. While the value of C ^ e is a little sensitive in relation to these errors, the value of R ^ s e presents a high sensitivity. From this perspective, ensuring the PO2—tuning condition of K becomes a mandatory requirement for the implementation of PO2, as it affects the value of T ^ 2 .

3. Two Schemes of DC-DC Buck Converter with Estimation of Equivalent Parameters of Filter Capacitor Using PO

The two buck converter configurations proposed in the principle schemes in Figure 7a,d are obtained by adding a variable electrical network (VEN) [28] and a microcontroller to a switching regulator circuit based on the LM2596 integrated circuit [29]. They allow the implementation of the measurement process, the mentioned observers, and the management of the VENs. In the first scheme, an auxiliary source of stabilized DC voltage is included as well. The schemes are shown in Section 3.2 and Section 3.3. The part represented in black corresponds to the basic scheme in [29], and the part represented in red includes the performed adaptations. The POs are implemented in the microcontroller in the discrete-time system version (8).

3.1. Principle Schemes

From the point of view of the continuous supply of the converter load, the proposed schemes are of two categories: schemes with short-term disconnection of the load from the converter and schemes without disconnection of the load from the converter. The schemes in Figure 7a,b belong to the first category, and those in Figure 7c,d to the second category. The load and the filter capacitor are connected to the converter via terminal T. In all schemes, the filter capacitor is modeled by the serial equivalent circuit R s e C e . POs are implemented in the measurement and processing (EMP) device. They calculate the estimates   C ^ e and   R ^ s e by processing the voltage at the capacitor terminals denoted, as appropriate, by V 0 ,   V 01 ,   V 02 . The values of R e x t 1 , R e x t 2 , R 1 and R 2 are chosen considering the requirements mentioned at the end of Appendix A. Schemes in the second category have the advantage of not including the converter load in the capacitor discharge sequences, thereby not being constrained by the requirements of Appendix A.
In the schemes of the first category, the parameters of the capacitor are obtained during a discharge/charge process using PO2 of Equation (8). The charging of the capacitor is carried out at the voltage u i from a stabilized voltage source and not from the converter. When switches sw1 and sw2 are in the ON position and sw3 is in the OFF position, the circuits are in normal operation mode (DC-DC mode). Switching sw1 from the OFF position to the ON position results in transients at the load level.
Figure 8 illustrates the V 0 ( t ) signal in an estimation cycle associated with a discharge/charge process corresponding to the schemes in Figure 7a,b. During the I interval, the schemes operate in DC-DC mode. In intervals III and V, PO2 estimates the equivalent time constants. In intervals II and IV, of duration t n , PO2 acquires the voltage V 0 ( t ) but does not calculate T ^ 1 e and   T ^ 2 e . The VI interval corresponds to a transient regime of DC-DC mode restoration. Table 2 shows the sequence of switch states and regimes for an estimation cycle of the scheme in Figure 7a.
In second-category schemes, capacitor parameters are obtained using the discrete-time variant of PO (2) during two separate discharges of the capacitor through resistors R e x t 1 and R e x t 2 , which have different values. Between discharges, the monitored capacitor is recharged via the T terminal from the converter when the T-sw1 switch is closed and the LM2596 is ON. Reconnections of the capacitor to the converter result in this case also with transient regimes at the load level. In Figure 7d, the filtering is performed using a capacitance created by connecting two capacitors in parallel. Each capacitor is monitored separately. During monitoring of one capacitor, the other capacitor provides filtering by remaining connected to the converter. This option is advantageous for at least two reasons: (i) the scheme ensures filtering throughout the estimation; (ii) the transients caused by the disconnection and reconnection of the capacitors to the converter are mitigated. The principle can be generalized for batteries of filter capacitors or schemes where “dividing” the filter capacity in at least two capacities can offer technical benefits. Table 3 shows for the scheme in Figure 7d the sequence of regimes that occur when estimating the parameters of capacitor 1 (regimes R1–R9) and of capacitor 2 (regimes R1’–R9’). The manner in which time is handled during discharges is detailed below within Section 3.3. in the explanations regarding the proposed converter as an application to the diagram in Figure 7d.

3.2. Scheme Based on the Implementation of the Principle from Figure 7a

The proposed scheme is the one in Figure 9. The converter supplies the resistive load   R L and C 2 is the filtering capacitor. It is a 220   μ F / 50   V electrolytic capacitor. Its frequency characteristics, measured using a BK Precision RLC-bridge, are illustrated in Figure 10a,b. The transistors T-sw1, T-sw2, and T-sw3 are used to realize the switches sw1, sw2, and sw3 in Figure 7a. The LDO is a voltage regulator that provides the voltage u i = 3.291   V for charging C 2 through the resistor   R c h . A microcontroller with computing power based on the Cortex®-M7 architecture was used for measuring and processing. The signal V 0 ( t ) was acquired with the sampling time h = 20   μ s . The microcontroller sends signals towards the LM2596 circuit and switches using the digital ports P1, P2, P3, and P4 and measures the voltage V 0 at capacitor and load terminals using the analog port AIN. To estimate the capacitor’s equivalent parameters, the microcontroller executes the successive operation of the regimes R1–R7 in Table 2. In stages III and V (Figure 8), PO2 implemented in the microcontroller calculates T ^ 1 ,   T ^ 2 ,   C ^ e and   R ^ s e . To achieve a more accurate diagnosis of the capacitor’s condition, a sensor Sθ is thermally coupled with the capacitor and interfaced with the microcontroller. The measured result is sent together with the estimated values of the capacitor parameters using a serial SOUT interface towards external assessment of C 2 .
Below are some practical results that validate the structure in Figure 9. Experimentally, by commuting and maintaining the Figure 9 scheme in the R4 regime from Table 2, a value of K = u i = 3.291   V was obtained. To determine the values of C ^ e and R ^ s e six sets of 25 discharge/charge experiments of C 2 were performed. In each set, the experiments were repeated with a frequency of 3.33   H z . Each discharge/charge process took 40 ms. In Figure 11a is illustrated how the voltage V 0 varies in an experiment, and in Figure 11b the corresponding characteristics     T ^ 1,3.291 ( t ) and   T ^ 2,3.291 ( t ) are represented. The values resulting from the experiment are     T ^ 1 = 0.0183244   s and     T ^ 2 = 0.000690196   s . From the perspective of Figure 1, for Figure 11a: t 0 = 0.00919 s, t 1 = 0.03855 s, t 2 = 0.3935 s. The calculation of the characteristics     T ^ 1,3.291 ( t ) and   T ^ 2,3.291 ( t ) is turned off when the condition in Equations (10) and (11) is met, resulting in the moments 0.1655   s and 0.3935   s . The time t 0 is an arbitrary time according to the series of experiments mentioned below. The time t 1 , when the capacitor commutes from discharging to charging corresponds to the moment when V 0 reaches the value of 0.6   V , so that for the calculation of     T ^ 2 remains available a voltage interval of approx. 2   V . Time t 2 corresponds to the moment when     T ^ 2 is obtained. It is observed that the value of V 0 from the moment when OP2 provides     T ^ 1 is approx. 2   V . If t 1 had been associated with this moment, then for the calculation of     T ^ 2 there would have been a rather small tension interval available, of approx. 1 V .
Figure 11. C 2 capacitor charging/discharging signal in Figure 9 and the result of its processing with PO2: (a) The signal V 0 ( t ) on capacitor terminal; (b) T ^ 1 , K ( t ) and T ^ 2 , K ( t ) , K = 3.291   V characteristics generated by PO2.
Figure 11. C 2 capacitor charging/discharging signal in Figure 9 and the result of its processing with PO2: (a) The signal V 0 ( t ) on capacitor terminal; (b) T ^ 1 , K ( t ) and T ^ 2 , K ( t ) , K = 3.291   V characteristics generated by PO2.
Applsci 14 10756 g011
Across the 150 experiments, the parameters fell within the ranges in Table 4, corresponding to the average values indicated by (14).
According to the frequency characteristics in Figure 10a,b, the equivalent values C ^ e and R ^ s e from (14) correspond to frequencies of approx. 55.6 Hz and 59.5 Hz, respectively.
T ^ 1 = 18.474   m s , T ^ 2 = 0.71193   m s ,   C ^ e = 202.15   μ F , R ^ s e = 0.21054   Ω .
To investigate the impact of K ’s assignment errors on the values of C ^ e and R ^ s e obtained with PO2, six series of 25 capacitor discharge/charge experiments were performed for six different K values within the range [3.2836, 3.3036]. The parameter ω 0 of PO2 was set to the values of 7000 s 1 for the discharge phase, and 11,000   s 1 for the charge phase. The experiments confirmed the aspects revealed by Figure 5 and Appendix A: T ^ 2 is increased due to the increase of K , C ^ e variations are reduced, R ^ s e is pronouncedly increased, and the dispersion intervals of the parameters are reduced.

3.3. Scheme Based on the Implementation of the Principle from Figure 7d

The proposed scheme has the configuration of Figure 12. The converter supplies a load that is not purely resistive. The circuit was made for   R 1 = 0 and   R 2 = 0 . In Figure 7d, the switches swij were implemented with T-swij transistors. Each of the capacitors C 21 and C 22 of the filter capacitor bank independently discharges across the resistors of the VEN, initially across the resistance   R e x t 1 , then across the resistance   R e x t 2 R e x t 1 . Any discharge of a capacitor is immediately followed by a recharge of it from the converter, triggered when the PO completes the determination of the discharge time constant. Equivalent parameters C ^ e _ i and R ^ s e _ i of the two capacitors C 2 i ,   i = 1,2 are calculated as solutions of the systems of Equation (15). The load impedance does not appear in the equations.
C ^ e _ i · R ^ s e i + R e x t 1 = T ^ 1 _ i C ^ e _ i · R ^ s e i + R e x t 2 = T ^ 2 _ i ,             i = 1 ,   2 .
Unlike the scheme in Figure 9, the scheme in Figure 12 contains two temperature sensors S θ 1 and S θ 2 that measure the operational temperature of each capacitor.
The proposed scheme has three key advantages: (i) The load is permanently connected to the buck converter; (ii) The time constants T ^ 1 _ i and T ^ 2 _ i , i = 1 ,   2 are determined on the beginning portions of the discharge waves V 0 ( t ) , i.e., on the portions least affected by acquisition errors, with a favorable signal/noise ratio; (iii) The duration of an estimation process is of the order of the time constant.
A more complete picture of the behavior of the scheme in Figure 12 is given by the validation experiments presented below. The two stages differ in the nature of the converter load. In both stages, the parameter ω 0 of the PO was set to the value 10,000   s 1 .
Stage 1: Background: The converter feeds a resistive load R L = 20   Ω at a voltage V 1 = 3.307   V . Filtering is performed with the pair of electrolytic capacitors C 21 470   μ F / 25   V , C 22 220   μ F / 25   V having the frequency characteristics in Figure 13. The external resistances of VEN have the values   R e x t 1 = 3.321   Ω and   R e x t 2 = 89.16   Ω . For processing, the same microcontroller as in Figure 9 was used, the signal V 0 ( t ) being acquired with an equivalent sampling time h = 20   μ s .
Figure 14 shows an estimation process. Portions ①, ②, ③ and ④ in Figure 14a represent the characteristics,     T ^ 1 _ 1 ( t ) ,   T ^ 2 _ 1 ( t ) , T ^ 1 _ 2 ( t ) and T ^ 2 _ 2 ( t ) provided by PO by processing the voltage   V 0 ( t ) during the progress of the four partial discharges in Figure 14b. The values of   T ^ 1 _ 1 , …, T ^ 2 _ 2 from Equation (15) are given by the amplitudes of     T ^ 1 _ 1 ( t ) , …,   T ^ 2 _ 2 ( t ) from the final moments of the portions when the conditions of Equations (10) and (11) are checked. However, the moments of fulfillment of these conditions define the durations of the portions ①, ②, ③ and ④ not being necessary to monitor the time or voltage level V0. The time intervals between portions (① and ②, …, ③ and ④) correspond to the charging of the capacitors and the transient regimes in the PO. Within these intervals, PO monitors the voltage   V 0 ( t ) but does not calculate     T ^ 1 _ i ( t ) and   T ^ 2 _ 2 ( t ) . The effect of connecting/disconnecting capacitors C 21 and C 22 on the voltage V L measured from the load terminals of the microcontroller is shown in Figure 14c. The average voltage at the load terminals, V L ¯ , has different values depending slightly on the active filtering capacitor: V L ¯ = 3.2895   V in portions ① and ② where filtering is performed with C 22 , V L ¯ = 3.2907   V in portions ③ and ④ where filtering is performed with C 21 and V L ¯ = 3.2974   V in normal operation when filtering is completed with both capacitors.
In Table 5, the results obtained for six sets of 25 experiments are systematized. The average values of the parameters on the set of 150 experiments have the values in (16). Each set of experiments was repeated again with a period 0.3   s   ( 3.33   H z ) . Also, the duration of an experiment did not exceed 40 ms.
C ^ e _ 1 = 460.4057   μ F , R ^ s e _ 1 = 0.345   Ω .   C ^ e _ 2 = 210.8587   μ F ,   R ^ s e _ 2 = 0.86953   Ω .
The values C ^ e _ 1 and R ^ s e _ 1 roughly correspond to the frequency range 65   H z   ÷ 80   H z from the frequency characteristics in Figure 13a,b. The different values of the frequencies are due to the non-sinusoidal nature of the experimental regime and from the measurement errors mentioned in Appendix A.
Stage 2: Context: The converter feeds a resistive-inductive load. In series with the load resistance R L = 20   Ω were connected separately, in series, then in parallel, two coils with R = 1.775   Ω / L = 0.463   m H and R = 1.8   Ω / L = 0.426   m H . For each of the 4 cases, six series of 25 experiments were performed. On the set of 600 experiments, the average values were obtained: C ^ e _ 1 ¯ = 465.8374   μ F R ^ s e _ 1 ¯ = 0.3123   Ω for C 21 and C ^ e _ 2 ¯ = 211.34   μ F , R ^ s e _ 2 ¯ = 0.87595   Ω for C 22 . The equivalent capacitance values are practically within ±1% of those in Table 5, while the ESR values are within much higher limits.

4. Discussion

1. The paper proposes two new DC-DC buck converter schemes shown in Figure 9 and Figure 12. They are intended for real-time simultaneous estimation of the equivalent capacitance and the ESR of the converter filter capacitor. In both schemes, a PO coded on a microcontroller is used for estimation purposes. The schemes differ from the original converter scheme [29] by adding a microcontroller, some VENs composed of discharge or charge resistors with the related switches and temperature sensors, and in the first case also a stabilized voltage source. The VEN resistances are adopted taking into account the recommendations in Appendix A. Failure to comply with these recommendations results in high values of the dispersion of R s e , therefore, ESR calculation. Both schemes work in a quasi-online mode. This means that while estimating, the connection between the monitored capacitor and the converter load is interrupted for a few milliseconds. From the point of view of the continuity of the connection between the load and the converter during estimation, the first scheme operates in a quasi-online mode, while the second operates in an online mode.
2. The first scheme (Section 3.2) provides the equivalent parameters of the capacitor based on the estimation with a PO2 of the values of the equivalent time constants related to the discharge/charge process of the capacitor. The VEN only serves to charge the capacitor. Its discharge is carried out through the load resistance of the converter. Estimating the time constant of the charging process with a PO2 (Section 2.1) is a novel approach that requires prior experimental calibration of the K parameter, according to the capacitor charging conditions (Section 2.2). During parameter estimation, the scheme is in quasi-online mode of operation, characterized by the short-term disconnection (approx. 0.040 s) of the capacitor and the load from the converter. This means that the proposed scheme can trigger the estimation of the capacitor parameters only when the load is disconnected from the converter. Depending on the power load tolerance, this can be performed intermittently, more or less often, or when the converter is off.
Compared to the conditions in Appendix A, in the experiments presented in the paper, we worked with ρ R = 27.54 and ρ 2 = 0.06358 . As such, the condition ρ R 1 was met, while the condition for ρ 2 to be as close as possible to 1 could not be met for reasons of limiting the current through the circuit. This fact influenced the dispersion of the calculated R ^ s e values, the average value being 6.58677%. Consequently, the experiments with the scheme in Figure 9 show that PO2 can determine with a very good approximation the value of the equivalent capacity through a single discharge/charge process. Since the value of ρ 2 is small, the determination of the ESR value, however, requires performing a series of successive experiments and averaging the obtained values.
3. The second DC-DC buck converter configuration (Section 3.3) uses a pair of capacitors for filtering, connected in parallel, and a VEN consisting of two resistors. The estimation of the parameters of each capacitor is completed alternatively by processing the discharge voltage of each capacitor across each of the resistances of the VEN. The novelty of the proposed scheme lies in the sequential investigation of the two capacitors. The estimation of the equivalent parameters is completed for one capacitor at a time, while the load, together with the second capacitor, remains connected to the converter output. As a result, the scheme operates in a quasi-online measurement regime during which neither the filtering operation nor the load supply from the converter is interrupted. In this process, the filtering capacity changes in steps.
From the perspective of the conditions in Appendix A, the scheme used in the experiments was characterized by ρ R = 26.92 and ρ 2 _ 1 = 0.10419 for the 470   μ F capacitor C 21 and ρ 2 _ 2 = 0.2626 for the 220   μ F capacitor C 22 . In this case also, the scheme lends itself to determining with a good approximation the value of the equivalent capacities. For a purely resistive load of the converter, the impact of the higher values of ρ 2 _ 1 and ρ 2 _ 2 , in relation to the diagram in Figure 9 is visible: the dispersion of R ^ s e _ 1 values are 1.31531%, and that of R ^ s e _ 2 only 0.307099%. As a result, the values of the equivalent parameters of the filter capacitors, obtained in the mentioned experimental conditions, confirm the validity of the proposed scheme.
Theoretically, the proposed converter scheme can be applied regardless of the type of load: resistive or resistive-inductive. Experimentally, it was found that in the presence of the resistive-inductive load, the dispersion ranges of the values of R ^ s e _ 1   and R ^ s e _ 2 increased by approx. 5 times. The experiments carried out in this context failed to identify a cause that could explain this effect.
Finally, it should be noted that the method underlying the scheme in Figure 12 can also be used when the output filter of the converter is a battery of at least two capacitors connected in parallel.
4. Both schemes estimate equivalent parameters C e ,   R s e and measure operating temperatures θ or θ 1 and θ 2 of the filter capacitors and send them out. The operating temperature is necessary to take into account its influence on the estimated values of the equivalent parameters [2]. Since the estimating process of the capacitor parameters with POs takes less than one second, the temperature of the investigated capacitor can be considered constant during the estimation.
5. The proposed DC-DC buck converter schemes are designed by completing the basic scheme of the converter (represented in black in Figure 9 and Figure 12) with new components, including a microcontroller (represented in red in the two figures). This means additional costs for the converter. However, they offer the benefit of enabling predictive maintenance for the converter, leading to reduced operational costs in applications where increased reliability is required.
6. Each of the DC-DC buck converter schemes proposed in this paper is suitable for integration into a specialized integrated circuit. For example, in Figure 12, the integration can be based on the segmentation in Figure 15. The components within the boxed part of Figure 15 have been selected both for their technological integration feasibility and because they do not require parameterization in the application design process. Outside the integrable part are connected components that cannot be integrated (Load and coil L1) and components whose parameters depend on the application (capacitors C 21 , C 22 , external resistors   R e x t 1 ,   R e x t 2 and temperature sensors S θ 1 and S θ 2 ).

5. Conclusions

The article proposes two novel DC-DC buck converter schemes designed to monitor the ESR and equivalent capacitance of filter capacitors. For this purpose, parameter observers are used to calculate the equivalent parameter values of the capacitors quasi-online.
In the first scheme, the capacitor parameters are calculated by real-time processing of the voltage at the capacitor terminals during a discharge/charge process. By using the charging sequence, the duration of the estimation operation is reduced.
The second scheme achieves the output filtering by using two or more capacitors connected in parallel. In this way, the monitoring of the filter capacitors receives the advantage of the continuous supply of the load from the converter. The advantage of this connection type is that at least one filter capacitor remains connected and assures a non-interrupted supply of energy to the load. The equivalent parameters of each component capacitor are estimated in real time using two monitored discharges.
The experiments performed with both schemes, using electrolytic filter capacitors, shows that: (i) the estimation processes take approx. 40 ms; (ii) the equivalent capacity value is estimated with a precision of less than 0.25%; (iii) the estimation of the ESR value is performed with a precision dependent on both ESR and VEN resistor values.
The implementation of both schemes is associated with the acceptance of some compromises, such as limitations in the design of VENs imposed by the correlated values of the load resistance, as well as transient regimes of small amplitude occurring during the monitoring of the filter capacitor.
The estimation principles used in the two schemes are not limited to the proposed DC-DC buck converters. They are applicable in similar situations that need capacitor monitoring. Several future research opportunities open in this context, primarily by the application of the principles described in the proposed schemes for power converters and by the implementation of one of the two monitoring principles.

Author Contributions

Conceptualization, D.-V.C., C.B., S.N. and T.-L.D.; methodology, T.-L.D.; software, D.-V.C. and C.B.; validation, D.-V.C., C.B., S.N. and T.-L.D.; formal analysis, D.-V.C. and S.N.; investigation, C.B. and T.-L.D.; resources, C.B.; data curation, D.-V.C. and C.B.; writing—original draft preparation, T.-L.D.; writing—review and editing, D.-V.C., C.B. and S.N.; visualization, D.-V.C. and S.N.; supervision, T.-L.D. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

The original contributions presented in the study are included in the article, further inquiries can be directed to the corresponding author.

Conflicts of Interest

The authors declare no conflicts of interest.

Abbreviations

EMPElectronic Measurement and Processing Device
ESR Equivalent Serial Resistance
POParameter Observer
PO2Parameter observer on two edges
VENVariable Electrical Network

Appendix A

Computing formulas R ^ s e and C ^ e obtained from system (13) have the expression (A1)
  R ^ s e = T ^ 2 · R e x t 1 T ^ 1 · R e x t 2 T ^ 1 T ^ 2 ,       C ^ e = T ^ 1 T ^ 2 R e x t 1 R e x t 2   .
They are valid in the following working assumptions:
  • The values of R s e , C e , R e x t 1 and R e x t 2 are constant during the measurement of T ^ 1 and T ^ 2 from the signal V 0 ( t ) and have the same value for both transients.
  • The values of R e x t 1 and R e x t 2 are measured beforehand at a temperature equal to that during the measurement of T ^ 1 and T ^ 2 .
Let x be the measured value of a variable in (A1) or a calculated value for R ^ s e or C ^ e , x ˇ the true value of x and ε x the measurement or calculation error of x defined by formula (A2):
ε x = x x ˇ x ˇ   ,       x R e x t 1 , R e x t 2 ,   T ^ 1 e , T ^ 2 e .
By applying this formula to R ^ s e și C ^ e in (A1), the Formulas (A3) and (A4) for error calculation ε R ^ s e and ε C ^ e are derived. They used the notations (A5):
ε R ^ s e = ρ R 1 + ε T ^ 2 1 + ε R e x t 1 ρ τ 1 + ε T ^ 1 ( 1 + ε R e x t 2 ) ρ 2 [ ρ τ 1 + ε T ^ 1 ( 1 + ε T ^ 2 ) ] 1 ,
ε C ^ e = 1 + ρ 1 1 + ε T ^ 1 1 + ε T ^ 2 e ρ τ 1 + ε R e x t 1 1 + ε R e x t 2 ρ R 1 ,
ρ R = R e x t 1 ˇ R e x t 2 ˇ ,         ρ T e = T ^ 1 ˇ T ^ 2 ˇ   ,         ρ 1 = R ^ s e ˇ R e x t 1 ˇ ,         ρ 2 = R ^ s e ˇ R e x t 2 ˇ   .
To obtain a picture of the problem, we consider the experimental data in columns 2 and 3 of Table A1, taken from [28], Table VI. They refer to five electrolytic capacitors and were obtained using a VEN who provided R e x t 1 ≅ 980.7692 Ω and R e x t 2 ≅ 0.08999984 Ω. In columns 4 and 5, the values obtained with formulas (A1) are inserted.
Table A1. Equivalent time constants experimentally determined in [28] for five electrolytic capacitors and equivalent capacitor parameters calculated with Formulas (A1).
Table A1. Equivalent time constants experimentally determined in [28] for five electrolytic capacitors and equivalent capacitor parameters calculated with Formulas (A1).
Capacitor T ^ 1 s T ^ 2 m s R ^ s e m Ω C ^ e μ F
C17.9410.8688117.308096.56
C27.8620.8576316.908016.01
C37.9460.8984720.908101.63
C46.2090.6734016.376330.63
C54.7740.5630625.674867.48
To roughly establish the error ranges in which the calculated values for R ^ s e and C ^ e fall, we assume that the measurement errors of T ^ 1 e , T ^ 2 e , R e x t 1 and R e x t 2   are located in the ranges ε T ^ 1 ∈ [−0.01, 0.01], ε T ^ 2 ∈ [−0.02, 0.02], ε R e x t 1 ∈ [−0.01, 0.01] and ε R e x t 2 ∈ [−0.02, 0.02], that T ^ 1 ˇ and T ^ 2 ˇ take exactly the values from Table A1, and R e x t 1 ˇ and R e x t 2 ˇ have the values of R e x t 1 and R e x t 2 specified above. Consequently, using Equation (A5) yields the results in Table A2.
Table A2. Error ranges for calculated values of capacitors in Table A1.
Table A2. Error ranges for calculated values of capacitors in Table A1.
Capacitor ρ R
ρ T e
ρ 1
ρ 2
[ ε R ^ s e _ m i n , ε R ^ s e _ m a x ] [ ε C ^ e _ m i n , ε C ^ e _ m a x ]
C1 10897.45
9140.88
1.76 · 10 5
0.192
[ 0.344708 , 0.351977 ] [ 0.019908 , 0.020208 ]
C2 10897.45
9167.123
1.73 · 10 5
0.188
[ 0.355805 , 0.363399 ] [ 0.019908 , 0.020208 ]
C3 10897.45
8843.924
2.13 · 10 5
0.232
[ 0.295129 , 0.301498 ] [ 0.019908 , 0.020208 ]
C4 10897.45
9140.88
1.67 · 10 5
0.182
[ 0.367653 , 0.375486 ] [ 0.019908 , 1.020208 ]
C5 10897.45
8478.67
2.61 · 10 5
0.285
[ 0.248404 , 0.253828 ] [ 0.01990 , 1.020208 ]
Two observations emerge from these results for the case when ρ 1 1 and 3 ÷ 4 ρ 2 1 :
3.
The estimation errors of C e with Formula (A1) are within ±2%.
4.
R s e estimation errors with Formula (A1) vary practically between limits of ±25% to ±37%.
The wide error limits from the last observation are due to the relatively small values of the ρ 2 ratio. This finding is corroborated by (A3) which highlights a hyperbolic variation of ε R ^ s e with respect to ρ 2 . The lower the ρ 2 , the higher the ε R ^ s e . In the range ρ 2 ∈ [0.2, 1] inverse 1 / ρ 2 decreases from the value 5 to the value 1.
The objective pursued in the estimation methods of the equivalent parameters of a capacitor modeled by a serial connection R − C is to achieve the approximations R ^ s e R ^ s e ˇ and C ^ e C ^ e ˇ , i.e., ε R ^ s e 0 and ε C ^ e 0 . Assuming that the measurement errors can be minimized from a technical point of view, the means of achieving the objective consists in the appropriate manipulation of the values of the ratios ρ R ρ T e and ρ 1 or ρ 2 , practically of the values of the resistances R e x t 1 and R e x t 2 .
To obtain ε R ^ s e as close as possible to 0 the value of R e x t 2 must be adopted as low as possible, so that ρ 2   is as high as possible. Ensuring high values of ρ 2 is in principle a critical problem from the electrical point of view because discharging the capacitor over a resistance of value 2 × R s e , from an initial voltage V 0 ( 0 ) suitable for measurement, is equivalent to short-circuiting it. Moreover, the value of T 2 becoming very small, the time available for measuring T 2   becomes very short, which could also become a critical problem for the online implementation of the measurement method in order to monitor the capacitor parameters. Also, a small value of T 2   is likely to cause an increase in the absolute value of the measurement error ε T ^ 2 . Hence, R e x t 2   should be chosen so that the initial current V 0 ( 0 ) / ( R e x t 2 + R s e ) is, on the one hand, as high as possible, and on the other hand, it does not endanger the capacitor and the resistor. To obtain a ε C ^ e as close as possible to 0 the ratio ρ R must have a value as high as possible. Once R e x t 2 is adopted, there are no problems adopting the value of R e x t 1 .
In conclusion, for designing the monitoring circuit, in order to provide the best estimates for both Formula (A1), it is necessary to assure:
5.
ρ R 1 , i.e., R e x t 1 R e x t 2 ;
6.
ρ 2 , i.e., R ^ s e ˇ / R e x t 2 ˇ , as close as possible to 1.
If these requirements are not met, the R ^ s e formula leads to erroneous estimates, strongly influenced by the errors in the measurements of T ^ 1 e , T ^ 2 e , R e x t 1 and R e x t 2 , even when they are only a few percent. In this case, the formula of C ^ e will also produce errors outside the range of ±2%.
For DC-DC buck converters in this paper, the following values were used:
  • Converter in Figure 9: R e x t 1 = R L = 91.19   Ω ,   R e x t 2 = 3.311   Ω , R ^ s e = 0.21054   Ω , ρ R = 27.54 and ρ 2 = 0.06358 ;
  • Converter in Figure 12:   R e x t 1 = 3.311   Ω ,   R e x t 2 = 89.16   Ω , R ^ s e _ 1 = 0.345   Ω ,   R ^ s e _ 2 = 0.86953   Ω , ρ R = 26.92 , ρ 2 _ 1 = 0.10419 for C 21 and ρ 2 _ 2 = 0.2626 for C 22 .

References

  1. Renaudineau, H.; Martin, J.P.; Nahid-Mobarakeh, B.; Pierfederici, S. DC-DC Converters Dynamic Modeling with State Observer-Based Parameter Estimation. IEEE Trans. Power Electron. 2015, 30, 3356–3363. [Google Scholar] [CrossRef]
  2. Muhammed Ramees, M.K.P.; Ahmad, M.D.W. Advances in Capacitor Health Monitoring Techniques for Power Converters: A Review. IEEE Access 2023, 11, 133540–133576. [Google Scholar] [CrossRef]
  3. Dang, H.L.; Kwak, S. Review of Health Monitoring Techniques for Capacitors Used in Power Electronics Converters. Sensors 2020, 20, 3740. [Google Scholar] [CrossRef] [PubMed]
  4. Cecchetto, F.; Lentola, L.; Orietti, E.; Giorgi, G. Fault Detection in DC-DC Converter: A Solution Based on Kalman Filtering. In Proceedings of the 2024 IEEE International Instrumentation and Measurement Technology Conference (I2MTC), Glasgow, UK, 20–23 May 2024. [Google Scholar] [CrossRef]
  5. Su, Q.; Wang, Z.; Xu, J.; Li, C.; Li, J. Fault Detection for DC-DC Converters Using Adaptive Parameter Identification. J. Franklin Inst. 2022, 359, 5778–5797. [Google Scholar] [CrossRef]
  6. Kovacs, L.; Kohlrusz, G.; Enisz, K.; Fodor, D. Aluminium Electrolytic Capacitor Model for Capacitor Materials Structure Transformation Analysis in PWM Applications. In Proceedings of the 2018 IEEE 18th International Power Electronics and Motion Control Conference (PEMC), Budapest, Hungary, 26–30 August 2018; pp. 888–893. [Google Scholar] [CrossRef]
  7. Both, J. The Modern Era of Aluminum Electrolytic Capacitors. IEEE Electr. Insul. Mag. 2015, 31, 24–33. [Google Scholar] [CrossRef]
  8. Abdennadher, K.; Venet, P.; Rojat, G.; Rétif, J.M.; Rosset, C. A Real-Time Predictive-Maintenance System of Aluminum Electrolytic Capacitors Used in Uninterrupted Power Supplies. IEEE Trans. Ind. Appl. 2010, 46, 1644–1652. [Google Scholar] [CrossRef]
  9. Torki, J.; Joubert, C.; Sari, A. Electrolytic Capacitor: Properties and Operation. J. Energy Storage 2023, 58, 106330. [Google Scholar] [CrossRef]
  10. Lahyani, A.; Braham, A.; Bouhachem, A. Power Loss Estimation of Electrolytic Capacitor Using Genetic Algorithm. In Proceedings of the INTELEC 07—29th International Telecommunications Energy Conference, Rome, Italy, 30 September–4 October 2007; pp. 875–879. [Google Scholar] [CrossRef]
  11. Iet Labs Inc. Application Note-Equivalent Series Resistance (ESR) of Capacitors. 2019, 1–5. Available online: https://www.ietlabs.com/pdf/application_notes/035002%20Equivalent%20Series%20Resistance%20(ESR)%20of%20Capacitors%201920.pdf (accessed on 8 October 2024).
  12. Kulkarni, C.; Biswas, G.; Celaya, J.; Goebel, K. Prognostics Techniques for Capacitor Degradation and Health Monitoring. In Proceedings of the Maintenance & Reliability Conference, Denver, CO, USA, 24–27 May 2011. [Google Scholar]
  13. Hao, M.; Wang, L. Fault Diagnosis and Failure Prediction of Aluminum Electrolytic Capacitors in Power Electronic Converters. In Proceedings of the 31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005, Raleigh, NC, USA, 6–10 November 2005; Volume 2005, pp. 842–847. [Google Scholar] [CrossRef]
  14. Preethi Sharma, K.; Vijayakumar, T. Study of Capacitor & Diode Aging Effects on Output Ripple in Voltage Regulators and Prognostic Detection of Failure. Int. J. Electron. Telecommun. 2022, 68, 281–286. [Google Scholar]
  15. Bărbulescu, C.; Căiman, D.V.; Dragomir, T.L. Parameter Observer Useable for the Condition Monitoring of a Capacitor. Appl. Sci. 2022, 12, 4891. [Google Scholar] [CrossRef]
  16. Soliman, H.; Wang, H.; Blaabjerg, F. A Review of the Condition Monitoring of Capacitors in Power Electronic Converters. IEEE Trans. Ind. Appl. 2016, 52, 4976–4989. [Google Scholar] [CrossRef]
  17. Zhao, Z.; Davari, P.; Lu, W.; Wang, H.; Blaabjerg, F. An Overview of Condition Monitoring Techniques for Capacitors in DC-Link Applications. IEEE Trans. Power Electron. 2021, 36, 3692–3716. [Google Scholar] [CrossRef]
  18. Nathan, L.P.A.; Hemamalini, R.R.; Jeremiah, R.J.R.; Partheeban, P. Review of Condition Monitoring Methods for Capacitors Used in Power Converters. Microelectron. Reliab. 2023, 145, 115003. [Google Scholar] [CrossRef]
  19. Agarwal, N.; Ahmad, M.W.; Anand, S. Quasi-Online Technique for Health Monitoring of Capacitor in Single-Phase Solar Inverter. IEEE Trans. Power Electron. 2018, 33, 5283–5291. [Google Scholar] [CrossRef]
  20. Tripathi, M.; Moysis, L.; Gupta, M.K.; Fragulis, G.F.; Volos, C. Observer Design for Nonlinear Descriptor Systems: A Survey on System Nonlinearities. Circuits Syst. Signal Process. 2024, 43, 2853–2872. [Google Scholar] [CrossRef]
  21. Cen, Z.; Stewart, P. Condition Parameter Estimation for Photovoltaic Buck Converters Based on Adaptive Model Observers. IEEE Trans. Reliab. 2017, 66, 148–160. [Google Scholar] [CrossRef]
  22. Gonzalez-Fonseca, N.; de Leon-Morales, J.; Leyva-Ramos, J. Observer-Based Controller for Switch-Mode Dc-Dc Converters. In Proceedings of the 44th IEEE Conference on Decision and Control, Seville, Spain, 12–15 December 2005; pp. 4773–4778. [Google Scholar]
  23. Levin, K.T.; Hope, E.M.; Domínguez-García, A.D. Observer-Based Fault Diagnosis of Power Electronics Systems. In Proceedings of the 2010 IEEE Energy Conversion Congress and Exposition, ECCE 2010—Proceedings, Atlanta, GA, USA, 12–16 September 2010; pp. 4434–4440. [Google Scholar] [CrossRef]
  24. Jain, P.; Poon, J.; Jian, L.; Spanos, C.; Sanders, S.R.; Xu, J.X.; Panda, S.K. An Improved Robust Adaptive Parameter Identifier for DC-DC Converters Using H-Infinity Design. In Proceedings of the 2018 IEEE Applied Power Electronics Conference and Exposition (APEC), San Antonio, TX, USA, 4–8 March 2018; pp. 2922–2926. [Google Scholar] [CrossRef]
  25. Meng, J.; Chen, E.X.; Ge, S.J. Online E-Cap Condition Monitoring Method Based on State Observer. In Proceedings of the 2018 IEEE International Power Electronics and Application Conference and Exposition, PEAC 2018, Shenzhen, China, 4–7 November 2018; pp. 1–6. [Google Scholar] [CrossRef]
  26. Tian, X.; Tao, F.; Fu, Z.; Wang, N.; Song, S. Fixed Time Control Based on Finite Time Observer for Buck Converter System with Load Disturbance. Control Eng. Appl. Informatics 2023, 25, 3–11. [Google Scholar]
  27. Corneliu, B.; Dadiana-Valeria, C.; Nanu, S.; Toma-Leonida, D. Power Supply with Condition Monitoring of the Output Capacitor via Parametric Observer. In Proceedings of the 2023 11th International Conference on Control, Mechatronics and Automation (ICCMA), Grimstad, Norway, 1–3 November 2023; pp. 358–363. [Google Scholar] [CrossRef]
  28. Wu, Y.; Du, X. A VEN Condition Monitoring Method of DC-Link Capacitors for Power Converters. IEEE Trans. Ind. Electron. 2019, 66, 1296–1306. [Google Scholar] [CrossRef]
  29. Texas Instruments LM2596 SIMPLE SWITCHER ® Power Converter 150-KHz 3-A Step-Down Voltage Regulator. LM2596 SIMPLE Switch. Power Convert. 150-kHz 3-A Step-Down Volt. Regul. 2023, 1, 1–47. Available online: https://www.ti.com/lit/ds/symlink/lm2596.pdf (accessed on 8 October 2024).
Figure 1. V curve of Equation (4).
Figure 1. V curve of Equation (4).
Applsci 14 10756 g001
Figure 2. The connection of PO to the observed system OS in order to estimate the parameter T t . For   t t 0 , t 1 the switch SW is in position 2, and for t t 1 , t 2 in position 1.
Figure 2. The connection of PO to the observed system OS in order to estimate the parameter T t . For   t t 0 , t 1 the switch SW is in position 2, and for t t 1 , t 2 in position 1.
Applsci 14 10756 g002
Figure 3. The behavior of the system in Figure 2 when v ( t ) has the Equation (7): (a) input signal; (b) the estimated time constant   T ^ t .
Figure 3. The behavior of the system in Figure 2 when v ( t ) has the Equation (7): (a) input signal; (b) the estimated time constant   T ^ t .
Applsci 14 10756 g003
Figure 4. Parameter observer on two edges: (a) the structure of PO2; (b) the block diagram of the connection OS-PO2 for discrete time processing.
Figure 4. Parameter observer on two edges: (a) the structure of PO2; (b) the block diagram of the connection OS-PO2 for discrete time processing.
Applsci 14 10756 g004
Figure 5. The influence of the K parameter of PO2 on   T value.
Figure 5. The influence of the K parameter of PO2 on   T value.
Applsci 14 10756 g005
Figure 6. A group of characteristics T ^ ( t ) of parameter K for the case when the system observed in Figure 4b generates the signal (7); K 2.9 , 2.95 , 2.98 , 2.99 , 3 , 3.01 , 3.02 , 3.05 , 3.1 : (a) Highlighting the segments T ^ 1 , K t și   T ^ 2 , K t ; (b) Obtaining T ^ 2 estimates from segments     T ^ 2 , K t .
Figure 6. A group of characteristics T ^ ( t ) of parameter K for the case when the system observed in Figure 4b generates the signal (7); K 2.9 , 2.95 , 2.98 , 2.99 , 3 , 3.01 , 3.02 , 3.05 , 3.1 : (a) Highlighting the segments T ^ 1 , K t și   T ^ 2 , K t ; (b) Obtaining T ^ 2 estimates from segments     T ^ 2 , K t .
Applsci 14 10756 g006
Figure 7. Principle schemes used for the realization of DC-DC buck converters with the estimation of the equivalent parameters of the filter capacitors: (a,b) Schemes with the monitoring of the discharging and charging of the capacitor using PO2 (c,d) Schemes with monitoring of two distinct discharges using PO.
Figure 7. Principle schemes used for the realization of DC-DC buck converters with the estimation of the equivalent parameters of the filter capacitors: (a,b) Schemes with the monitoring of the discharging and charging of the capacitor using PO2 (c,d) Schemes with monitoring of two distinct discharges using PO.
Applsci 14 10756 g007
Figure 8. The time sequence for filtering capacitor parameter estimation by a discharge/charge process.
Figure 8. The time sequence for filtering capacitor parameter estimation by a discharge/charge process.
Applsci 14 10756 g008
Figure 9. Buck converter scheme made based on the principle scheme in Figure 7a.
Figure 9. Buck converter scheme made based on the principle scheme in Figure 7a.
Applsci 14 10756 g009
Figure 10. Frequency characteristics of the filter capacitor C 2 of the converter in Figure 9: (a) C ( f ) characteristic; (b) Characteristic R s ( f ) .
Figure 10. Frequency characteristics of the filter capacitor C 2 of the converter in Figure 9: (a) C ( f ) characteristic; (b) Characteristic R s ( f ) .
Applsci 14 10756 g010
Figure 12. Buck converter scheme made based on the principle scheme in Figure 7d.
Figure 12. Buck converter scheme made based on the principle scheme in Figure 7d.
Applsci 14 10756 g012
Figure 13. Frequency characteristics of the filter capacitors in Figure 12: (a,b) C ( f ) and R s ( f ) characteristics of the electrolytic capacitor C 21 ( 470   μ F / 25   V ) ; (c,d) C ( f ) and R s ( f ) characteristics of electrolytic capacitor C 22 ( 220   μ F / 25   V ).
Figure 13. Frequency characteristics of the filter capacitors in Figure 12: (a,b) C ( f ) and R s ( f ) characteristics of the electrolytic capacitor C 21 ( 470   μ F / 25   V ) ; (c,d) C ( f ) and R s ( f ) characteristics of electrolytic capacitor C 22 ( 220   μ F / 25   V ).
Applsci 14 10756 g013
Figure 14. Experiment performed with the converter from Figure 12 in stage 1: (a) Characteristics     T ^ 1 _ 1 ( t ) , T ^ 2 _ 1 ( t ) , T ^ 1 _ 2 ( t ) și T ^ 2 _ 2 ( t ) ; (b) Voltage variation   V 0 ( t ) from the terminals of capacitors C 21 and C 22 ; (c) Voltage variation   V L ( t ) at the load terminals.
Figure 14. Experiment performed with the converter from Figure 12 in stage 1: (a) Characteristics     T ^ 1 _ 1 ( t ) , T ^ 2 _ 1 ( t ) , T ^ 1 _ 2 ( t ) și T ^ 2 _ 2 ( t ) ; (b) Voltage variation   V 0 ( t ) from the terminals of capacitors C 21 and C 22 ; (c) Voltage variation   V L ( t ) at the load terminals.
Applsci 14 10756 g014
Figure 15. Integrated circuit diagram associated with the DC-DC buck converter in Figure 12. The integrated chip includes 6 switches (T-swij, i,j = {1,2}; T-swi, i = {3,4}), the LM2596 circuit, the LDO circuit, and the microcontroller. The unembedded components are the filtering capacitors C 21 , C 22 , the VEN resistors   R e x t 1 ,   R e x t 2 , the temperature sensors, the inductance L1, and the input capacitors C 1 , C 2 .
Figure 15. Integrated circuit diagram associated with the DC-DC buck converter in Figure 12. The integrated chip includes 6 switches (T-swij, i,j = {1,2}; T-swi, i = {3,4}), the LM2596 circuit, the LDO circuit, and the microcontroller. The unembedded components are the filtering capacitors C 21 , C 22 , the VEN resistors   R e x t 1 ,   R e x t 2 , the temperature sensors, the inductance L1, and the input capacitors C 1 , C 2 .
Applsci 14 10756 g015
Table 1. Estimated   T 2 values according to the K parameter of PO2 for the cases in Figure 6.
Table 1. Estimated   T 2 values according to the K parameter of PO2 for the cases in Figure 6.
K T ^ 2 s T ^ 2 %
2.90.0009306.970
2.950.0009653.540
2.980.0009881.420
2.990.0009930.713
3.000.0010000.000
3.010.001007−0.720
3.020.001014−1.440
3.050.001036−3.630
3.100.001074−7.360
Table 2. Regimes of schematic from Figure 7a in the estimation process.
Table 2. Regimes of schematic from Figure 7a in the estimation process.
RegimeRegime/Zones in Figure 8sw1sw2sw3
R1DC-DC mode on/I1↑ *10
R2DC-DC mode off, discharging the capacitor through R e x t 2 /II, III01↑1
R3Stopping the capacitor’s discharging000↓
R4 Charging   the   capacitor   from   u i   through   R e x t 1 /IV, V001↑
R5Stopping capacitor charging0↓00
R6Further capacitor’s charging through T/VI10↓0
R7DC-DC mode on/I110
* The meaning of the notations: 0—open, 1—closed, ↑/↓—the switch opens/closes to switch the scheme to the new operating mode.
Table 3. Scheme regimes from Figure 7d in the estimation process.
Table 3. Scheme regimes from Figure 7d in the estimation process.
Regimesw11sw12sw21sw22sw3sw4Regimesw11sw12sw21sw22sw3sw4
R11↑ *10000R1’11↑ *0000
R2010↓00↓0R2’1000↓00↓
R301101↑0R3’100101↑
R40↓11000R4’10↓0100
R51↑ *11000R5’11↑ *0100
R6011000↓R6’10010↓0
R7011↑001↑R7’1001↑1↑0
R80↓10000R8’10↓0000
R9110000R9’110000
* The meaning of the notations: 0—open, 1—closed, ↑/↓—the switch opens/closes to switch the scheme to the new operating mode.
Table 4. Ranges for the parameters of C 2 in Figure 9 determined by PO2 for K = 3.291   V and their standard deviations.
Table 4. Ranges for the parameters of C 2 in Figure 9 determined by PO2 for K = 3.291   V and their standard deviations.
T ^ 1 [ms]
σ T ^ 1 [%]
T ^ 2 [ms]
σ T ^ 2 [%]
C ^ e [μF]
σ C ^ e [%]
R ^ s e [Ω]
σ R ^ s e [%]
[18.4718 ÷ 18.4822]
[0.13774 ÷ 0.19571]
[0.71102 ÷ 0.71285]
[0.27062 ÷ 0.46067]
[202.088 ÷ 202.213]
[0.14702 ÷ 0.20012]
[0.20516 ÷ 0.21592]
[4.90394 ÷ 8.2696]
Table 5. Parameters estimated with PO for the buck converter in Figure 12 (average values, average squared deviations in absolute values, and in percentages compared to the average value) for the case C 21 470   μ F / 25   V , C 22 220   μ F / 25   V .
Table 5. Parameters estimated with PO for the buck converter in Figure 12 (average values, average squared deviations in absolute values, and in percentages compared to the average value) for the case C 21 470   μ F / 25   V , C 22 220   μ F / 25   V .
Capacitor Parameter   ( P ) P ¯ σ P σ P %
C 21 T ^ 1 _ 1 m s 1.687720.000518160.030702
T ^ 2 _ 1 m s 41.208480.038518040.066143
C ^ e _ 1 μ F 460.4057 0.4527170.09833
R ^ s e _ 1 0.345 0.0045381.315316
C 22 T ^ 1 _ 2 m s 0.88365960.0005064250.05731
T ^ 2 _ 2 m s 18.983590.0058949270.031053
C ^ e _ 2 μ F 210.8587 0.0672570.0319
R ^ s e _ 2 0.869533 0.002670.307099
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content.

Share and Cite

MDPI and ACS Style

Căiman, D.-V.; Bărbulescu, C.; Nanu, S.; Dragomir, T.-L. DC-DC Buck Converters with Quasi-Online Estimation of Filter Capacitor Equivalent Parameters. Appl. Sci. 2024, 14, 10756. https://doi.org/10.3390/app142210756

AMA Style

Căiman D-V, Bărbulescu C, Nanu S, Dragomir T-L. DC-DC Buck Converters with Quasi-Online Estimation of Filter Capacitor Equivalent Parameters. Applied Sciences. 2024; 14(22):10756. https://doi.org/10.3390/app142210756

Chicago/Turabian Style

Căiman, Dadiana-Valeria, Corneliu Bărbulescu, Sorin Nanu, and Toma-Leonida Dragomir. 2024. "DC-DC Buck Converters with Quasi-Online Estimation of Filter Capacitor Equivalent Parameters" Applied Sciences 14, no. 22: 10756. https://doi.org/10.3390/app142210756

APA Style

Căiman, D. -V., Bărbulescu, C., Nanu, S., & Dragomir, T. -L. (2024). DC-DC Buck Converters with Quasi-Online Estimation of Filter Capacitor Equivalent Parameters. Applied Sciences, 14(22), 10756. https://doi.org/10.3390/app142210756

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop