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Article

Asymmetric Doherty Power Amplifier with Input Phase/Power Adjustment and Envelope Tracking

by
Fei Yang
1,
Jun Li
1,
Hongxi Yu
1,
Sen Yan
2,*,
Anxue Zhang
2,
Kaida Xu
2 and
Zhonghe Jin
3
1
China Academy of Space Technology (Xi’an), Xi’an 710100, China
2
School of Information and Communications Engineering, Xi’an Jiaotong University, Xi’an 710049, China
3
School of Aeronautics and Astronautics, Zhejiang University, Hangzhou 310027, China
*
Author to whom correspondence should be addressed.
Electronics 2021, 10(19), 2327; https://doi.org/10.3390/electronics10192327
Submission received: 7 August 2021 / Revised: 14 September 2021 / Accepted: 15 September 2021 / Published: 23 September 2021
(This article belongs to the Section Microwave and Wireless Communications)
Browse Figures
Versions Notes

Abstract

:
In this paper, the design and implementation of a Doherty power amplifier (DPA) are proposed using gallium nitride high electron mobility transistors (GaN HEMTs). Class-F and Class-C modes are combined to obtain an asymmetric DPA. The precise active load-pull controlling of fundamental and harmonic terminations of the DPA is simulated and analyzed, including the parasitics of the transistors. The measurements of the DPA with the phase difference, input power ratio adjustment, and envelope tracking of the auxiliary PA are discussed in detail in order to achieve a competitive performance. A greater than 63% drain efficiency is obtained within the 10-dB input power dynamic range at 2.1 GHz. The peak of the drain efficiency reaches 73%, with a corresponding output power of 46 dBm.

1. Introduction

The high order modulations and the multi-carrier schemes, which are widely adopted to improve data rates and spectral efficiency in modern communication standards, have resulted in signal characteristics with large peak to average power ratios (PAPR). In order to meet the demand for minimized transmitter energy consumption, power control has become a key requirement in modern microwave frequency communication stations, and, thus, the power amplifier (PA) must provide a high efficiency when in the output power back-off (OPBO) condition [1].
The Doherty PA (DPA), first proposed in 1936, was primarily an efficiency enhancement technique, as shown in Figure 1a [1,2]. The interesting aspect of the Doherty configuration is the active load-pull technique, but the conventional DPA can provide only a 6-dB back-off level [3,4,5,6,7]. Owing to the requirement to operate at a power level of 10-dB back-off from the peak, several asymmetrical Doherty structures were introduced [8,9,10,11,12].
The quarter-wavelength transformer is normally utilized for the impedance matching of the main PA, which is also the main limitation of the bandwidth of the DPA, since the performances of the quarter-wavelength transformer is associated with the frequency. In order to extend the working bandwidth, some new techniques have been employed to the impedance transformers. As communication standards are currently spreading in different carrier frequencies, research efforts aiming to realize DPAs with ultra-wideband or multiband behaviors are urgently desired [13,14,15,16,17,18,19,20,21,22]. Multi-band DPAs allow the DPAs to optimize the performance in each carrier frequency, as demonstrated by both dual- and tri-band, which mainly focus on the optimization of the output combiners and the PAs [23,24,25,26].
Another important issue for Doherty matching is the non-negligible linear/nonlinear parasitic components of the high-power packaged devices, as shown in Figure 1b. The active load-pull effect should be designed in the current source plane (Igen plane), rather than the package plane. The most effective way for de-embedding the parasitics is by considering the output matching. In this paper, all of the parasitics will be de-embedded during the design procedure to accurately extract the performances of the fundamental and harmonic impedances at the Igen plane.
Many works on DPAs have been carried out recently for both miniature and high frequencies. MMICs in GaAs, GaN, and CMOS processing are proposed in the recent literatures [27,28,29,30,31], which also show good performances by using some compact matching techniques.
To further enhance the efficiency of DPAs, the input power ratio and phase difference can be utilized to optimize the dynamic range efficiency performance and overcome the soft tune-on of the auxiliary PA [30,32]. Envelop tracking (ET) is also developed for main or auxiliary PA in order to significantly improve the efficiency during the wide input power range [33,34]. The turn-on time of the auxiliary amplifier can be controlled by the gate bias variation as well, which always cooperates with the power ratio adjustment method [35,36,37].
To mainly address the issue of the efficiency enhancement in the wide power dynamic range, we experimentally demonstrate an asymmetrical DPA with ET of the auxiliary amplifier in this paper, in order to keep a high efficiency over a wider range of output powers compared to classical Doherty designs. The paper is organized as follows. In Section 2, a DPA with a 10-W Class-F PA as the main amplifier and a 25-W Class-C PA as the auxiliary amplifier is proposed. The parasitics is included in the matching. The load-pull affection is carefully discussed, based on not only the fundamental termination, but also on the harmonic terminations. Then, the measurement of the DPA is discussed in Section 3. To further enhance the efficiency of the DPA, the adjustments of the input phase and the power ratio are utilized to optimize the efficiency performance during the dynamic range and overcome the soft tune-on of the auxiliary PA [2]. ET is also developed for the auxiliary PA to significantly improve the efficiency during the wide power range. A short conclusion is given in Section 4.

2. Doherty Amplifier Design

2.1. Asymmetrical DPA Theory

Figure 1 shows the basic structure of the proposed DPA and the corresponding equivalent circuit diagram. The characteristic impedance of the transformer and the resistance of the load can be carefully chosen to enable the main device to saturate at a point that corresponds to the maximum drain voltage waveform. This point is termed the transition point, and corresponds to an output power of nearly 10-dB less than the maximum output power in our design.
The currents in the common point are I 1 and I 2 , and the load resistor is R L . To obtain the maximum output power point, I 2 ≈ 2 × I 1 , so the voltage across R L is:
V o u t = ( I 1 + I 2 ) × R L = 3 I 1 × R L
The impedance seen from the plane A is:
Z 1 = V o u t / I 1 = 3 × R L
At the 10-dB back-off point, i.e., I 2 = 0 , the impedance seen from the plane A is:
Z 1 = R L
Thus, the output matching network of the main PA should be used in order to make sure that Z 1 changes from R L to 3 × R L as the power increases, which indicates that the efficiency can be maintained in the maximum level.

2.2. Class-F Main PA Design

The output and input matching networks of the Class-F mode PA are shown in Figure 2a. The substrate chooses Rogers RT5880, with a thickness of 0.254 mm and a relative permittivity of 2.2. The input matching is utilized to mainly consider the gain and the stability. The output matching is designed at the Igen plane with parasitics de-embedded for three steps:
  • Firstly, the open stubs (Line9 and Line7) are utilized in order to realize the second harmonic impedance short circuited and the third harmonic impedance open circuited, which are the harmonic suppression requirements of a third order Class-F mode PA, as shown in Figure 2b;
  • Secondly, the fundamental matching for the optimum output power is designed as Ropt = 33 Ohm from the Igen plane;
  • Finally, the output impedance at the Igen plane is also inverse to the load fundamental impedance in order to keep the maximum voltage sweep range and the maximum efficiency at the power back-off condition. This is the key part for the load-pull function to the main PA. With the variation of R L , the impedance is seen from the Igen plane at f 0 , and Z1, is inversed to the R L . As shown in Figure 2b, as R L shifts from 30 Ohm to 15 Ohm, Real (Z1) @ f 0 changes from 33 Ohm to 64 Ohm, while the second harmonic impedance is kept in the nearly short condition (Real (Z1) @ 2 f 0 = 4 Ohm) during the load-pull process, and the third harmonic impedance is fixed to be closed to the open condition (Real (Z1) @ 3 f 0 = 830 Ohm).
The main PA is biased with a gate voltage (Vgs) of −3.2 V, corresponding to a class-B operation condition. The drain voltage (Vds) is 28 V. The simulation results at the designed frequency of 2.1 GHz are summarized in Figure 2 as well. The drain waveform and the load-line are proposed in Figure 2c. The output power, gain, and efficiency are compared in Figure 2d at the back-off and the maximum output condition, respectively, corresponding to the load resistors R L of 15 Ohm and 30 Ohm. The peak efficiency of the Class-F main PA is 72.5% at an output power of 40.8 dBm, corresponding to a power gain of 16.8 dB. At a 10-dB back-off condition, the voltage waveform at R L = 10 Ohm is obviously higher than the condition of the no load-pull effect ( R L = 30 Ohm). The drain efficiency increases from 34.4% to 49.2%, as the output power rises, as well as from 31.3 dBm to 31.7 dBm.

2.3. Class-C Auxiliary PA Design

The Class-C auxiliary amplifier is realized by the similar procedure. The matching structure and the simulation performance are shown in Figure 3. The bias of the proposed Class-C PA is Vgs = −4 V and Vds = 28 V. The substrate also chooses Rogers RT5880, with a thickness of 0.254 mm and a relative permittivity of 2.2. Focusing on the frequency of 2.1 GHz, the simulation result of the Class-C PA delivers an efficiency greater than 78% at the maximum output power of 44 dBm, corresponding to a gain of 13 dB. As discussed in the Class-C PA bias condition, the gain drops quickly as the input power decreases, as shown in Figure 3c. This issue satisfies the requirement of the Doherty theory that the auxiliary PA is nearly tuned-off at the 10-dB back-off condition.

2.4. Doherty PA Realization

The DPA can then be designed by combining the Class-F 10-W and Class-C 25-W PAs. The two amplifiers’ input ports are independent. By using separate coherent signal sources to drive the independent main and auxiliary inputs, it is possible to adjust the relative magnitudes and phases of the input ports. It will be shown later that the measured efficiency can be further enhanced at the power back-off condition.
Figure 4a shows the simulated waveform and the load-line of the main PA during the upper 10-dB dynamic range. Figure 4b summarizes the fundamental impedance variation and the corresponding output power according to the changing of the input power. Figure 4c shows the gain and the efficiency of the DPA in a 20-dB input power back-off range. All of the simulations by the CAD software are discussed in the Igen plane to clearly show the variation characteristics of the waveform, the load-line, and the impedance.
From the simulation results, we can figure out that, as the input power Pin decreases from the maximum condition, the auxiliary amplifier’s load-pull effect to the main amplifier makes the fundamental output impedance Z1 change from 32 Ohm to 93 Ohm, i.e., almost three times the amount, (Figure 4c), and the voltage within the maximum sweep range is stable, as shown in Figure 4a. Correspondingly, the efficiency of the main amplifier is kept in the maximum condition.

3. Fabrication and Measurement

The photograph of the presented DPA is shown in Figure 5a. The inputs of the main and auxiliary PAs are independent in order for a more detailed measurement of the phase and the power ratio variation effect to search for the maximum efficiency. The optimum phase shift, the input power adjustment, and the Vds of the auxiliary PA are depicted according to the input power level in Figure 5b, in order to obtain the efficiency enhancement. In this figure, the phase difference and the power ratio at the maximum output condition is termed as the reference point.
Figure 5c,d depicts the measured output power, the gain, and the drain efficiency of the proposed DPA at a frequency of 2.1 GHz, when it is driven by a single continuous wave and over the 20-dB input power range. In Figure 5c,d, the blue lines show the measurement results without any adjustment. The red lines show the phase adjusted results. The green lines show the input power adjusted results, and the purple lines show the envelope tracking results.
As depicted in Figure 5d, when the phase is defined at the maximum output power, an efficiency of over 71% can be attributed with an output power of 46 dBm. However, at the back-off range, the efficiency drops sharply. At the 10-dB input power back-off, the efficiency is only 28%. This means that the active load-pull between the main amplifier and the auxiliary amplifier is not fully effective. By tuning the phase difference between the two single-ended PAs, the efficiency can be significantly improved from 28% to nearly 42%, and the average efficiency is also enhanced within the 10-dB range. Thus, the phase deviation that is caused by the amplitude variation effect is an unneglected characteristic for the DPA, as the main and the auxiliary PAs are not biased at the same condition. However, this is unfortunately always true, especially considering the auto turn-on/off requirement of the auxiliary PA at the back-off condition.
The measurement results of the appropriate power adjustment are also depicted as a green line in Figure 5d, which shows the typical and excellent DPA performances. Within the input power range of 10-dB, the efficiency is higher than 52%. Due to the fact that more power is offered to the main PA during the dynamic range, the attribution to the DPA’s efficiency and the output power from the auxiliary PA at the back-off condition are decreased, especially in the back range from 6-dB to 10-dB.
Figure 5d also includes the proposed DPA results with the ET of the auxiliary amplifier. By comparing with the power adjustment results, we can clearly see that the efficiency performance is improved when ET is used. Within the upper 10-dB operation range, the auxiliary PA’s drain voltage decreases from 28 V to 10 V, which can ensure an efficiency higher than 60%. The main PA’s efficiency is maintained in the maximum condition due to the active load-pull effect from the auxiliary PA. ET has been shown to be a powerful methodology of efficiency enhancement, in order to overcome the soft tune-on, and the efficiency drops in the middle of the input power dynamic range.
In our system, the efficiency is mainly enhanced by the DPA, and a digital processor is used to perform the predistortion, i.e., the input power assignment and also the phase controlling. As shown in Figure 6, the baseband signal is also pre-distorted to improve the linearity. The data of how to adjust the input power and phase to enhance the efficiency, as well as the drain voltage of the auxiliary PA, are stored in the digital processor.
The third-order intermodulation (IM3) is measured at an input power of 30 dBm (1 dB’s back-off from saturation point, corresponding to a single tone of 27 dBm, with 5 MHz interval). The IM3 is better than 19.88 dBc, which shows a very good linearity result. Furthermore, the adjacent channel power ratio (ACPR) is measured at the condition of the envelop peaking power at the saturation point (input power of 31 dBm). The input EDGE signal has a 200 KHz channel bandwidth and a 3.6 dB peak-to-average power ratio (PAPR). An ACPR of −37.8 dBc has been measured at 2.1 GHz. The IM3 and ACPR are summarized in Table 1 and displayed in Figure 7.

4. Conclusions

In this paper, we have given the design, implementation, and experimental results of an asymmetric DPA using a Class-F main PA and Class-C auxiliary PA. The main and auxiliary PAs’ design and the load-pull effect within the Doherty schematic are proposed by precisely controlling the harmonic impedances during the dynamic range. Then, detailed measurements and discussions have been taken to further enhance the efficiency by using the phase adjustment, input power ratio variation, and envelope tracking of the auxiliary PA. A greater than 63% efficiency within the upper 10-dB input power dynamic range is achieved. The peak efficiency reaches 73% with a corresponding output power of 46 dBm. Finally, in Table 2, the proposed PA is compared with other DPAs in terms of the operation frequency, dynamic range, output power, and efficiency. It can be seen that the presented DPA has a competitive efficiency performance within the 10-dB power range.

Author Contributions

Conceptualization, F.Y. and S.Y.; methodology, F.Y.; software design, F.Y.; validation, F.Y., S.Y. and K.X.; formal analysis, F.Y.; investigation, F.Y.; resources, J.L., H.Y. and Z.J.; data curation, K.X.; writing—original draft preparation, F.Y.; writing—review and editing, S.Y. and K.X.; supervision, A.Z. and Z.J.; project administration, F.Y.; funding acquisition, H.Y. All authors have read and agreed to the published version of the manuscript.

Funding

Innovation support program of Shaanxi Province, China: 2020KJXX-070.

Conflicts of Interest

The authors declare no conflict of interest.

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Electronics 10 02327 g001 550
Figure 1. The schematic diagram of DPA: (a) schematic of Doherty; (b) equalized active load-pull effect.
Figure 1. The schematic diagram of DPA: (a) schematic of Doherty; (b) equalized active load-pull effect.
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Figure 2. The simulation structure and results of Class-F PA: (a) simulation structure; (b) the real part of output impedances at Igen plane Real (Z1) with the load impedance RL shifting from 30 Ohm to 15 Ohm; (c) waveform and load-line, (d) gain, output power, and efficiency of the simulation results of Class-F PA with the load impedance RL of 10 Ohm and 30 Ohm, respectively.
Figure 2. The simulation structure and results of Class-F PA: (a) simulation structure; (b) the real part of output impedances at Igen plane Real (Z1) with the load impedance RL shifting from 30 Ohm to 15 Ohm; (c) waveform and load-line, (d) gain, output power, and efficiency of the simulation results of Class-F PA with the load impedance RL of 10 Ohm and 30 Ohm, respectively.
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Figure 3. The simulation structure and results of the Class-C 25 watts auxiliary PA: (a) structure of Class-C PA; (b) waveform; (c) gain, output power, and drain efficiency.
Figure 3. The simulation structure and results of the Class-C 25 watts auxiliary PA: (a) structure of Class-C PA; (b) waveform; (c) gain, output power, and drain efficiency.
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Figure 4. The simulation result of DPA: (a) the waveform and the load-line, (b) output power and fundamental impedance in the upper 10-dB input power range; (c) gain and efficiency of the DPA in 20-dB input back-off range.
Figure 4. The simulation result of DPA: (a) the waveform and the load-line, (b) output power and fundamental impedance in the upper 10-dB input power range; (c) gain and efficiency of the DPA in 20-dB input back-off range.
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Figure 5. The measurement result of DPA: (a) photograph of the fabricated DPA; (b) phase and input power adjustment of auxiliary PA, Vds of auxiliary PA for ET; measurement results of (c) output power and (d) drain efficiency.
Figure 5. The measurement result of DPA: (a) photograph of the fabricated DPA; (b) phase and input power adjustment of auxiliary PA, Vds of auxiliary PA for ET; measurement results of (c) output power and (d) drain efficiency.
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Figure 6. The system schematic with digital processor, D/A and DPA.
Figure 6. The system schematic with digital processor, D/A and DPA.
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Figure 7. The linearity performance of DPA with DPD at 2.1 GHz: (a) IM3 measurement result of DPA with DPD at 30 dBm input power condition (two tones); (b) ACPR measurement result of DPA with DPD at peaking power of saturation condition.
Figure 7. The linearity performance of DPA with DPD at 2.1 GHz: (a) IM3 measurement result of DPA with DPD at 30 dBm input power condition (two tones); (b) ACPR measurement result of DPA with DPD at peaking power of saturation condition.
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Table
Table 1. Linearity measurement results.
Table 1. Linearity measurement results.
Freq. (GHz)2.1Narrow-Band Designed
IM3 (dBc)19.88Two tones input power of 30 dBm (1-dB back-off from saturation point)
ACPR (dBc)37.8EDGE signal of 200 KHz channel bandwidth and 3.6 dB PAPR, envelop peak at saturation point
Table
Table 2. Comparison with latest literatures.
Table 2. Comparison with latest literatures.
Ref.Frequency
(GHz)		Dynamic Range
(dB)		Output Power
(dBm)		Drain Efficiency
(%)
2021 [12]1.994654.6–75.5
2021 [10]2.191046.347–72.1
2021 [37]3.51041.651–63 (PAE)
This work2.1104663–73
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Yang, F.; Li, J.; Yu, H.; Yan, S.; Zhang, A.; Xu, K.; Jin, Z. Asymmetric Doherty Power Amplifier with Input Phase/Power Adjustment and Envelope Tracking. Electronics 2021, 10, 2327. https://doi.org/10.3390/electronics10192327

AMA Style

Yang F, Li J, Yu H, Yan S, Zhang A, Xu K, Jin Z. Asymmetric Doherty Power Amplifier with Input Phase/Power Adjustment and Envelope Tracking. Electronics. 2021; 10(19):2327. https://doi.org/10.3390/electronics10192327

Chicago/Turabian Style

Yang, Fei, Jun Li, Hongxi Yu, Sen Yan, Anxue Zhang, Kaida Xu, and Zhonghe Jin. 2021. "Asymmetric Doherty Power Amplifier with Input Phase/Power Adjustment and Envelope Tracking" Electronics 10, no. 19: 2327. https://doi.org/10.3390/electronics10192327

APA Style

Yang, F., Li, J., Yu, H., Yan, S., Zhang, A., Xu, K., & Jin, Z. (2021). Asymmetric Doherty Power Amplifier with Input Phase/Power Adjustment and Envelope Tracking. Electronics, 10(19), 2327. https://doi.org/10.3390/electronics10192327

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