Wang, Y.; Liu, Y.; Xu, H.; Li, Z.; Li, Z.
A Wideband and Low Reference Spur PLL with Clock Feedthrough Suppressed and Low Current Mismatch Charge Pump and Symmetrical CML Divider. Electronics 2023, 12, 4164.
https://doi.org/10.3390/electronics12194164
AMA Style
Wang Y, Liu Y, Xu H, Li Z, Li Z.
A Wideband and Low Reference Spur PLL with Clock Feedthrough Suppressed and Low Current Mismatch Charge Pump and Symmetrical CML Divider. Electronics. 2023; 12(19):4164.
https://doi.org/10.3390/electronics12194164
Chicago/Turabian Style
Wang, Yingxi, Yueyue Liu, Haotang Xu, Zhongmao Li, and Zhiqiang Li.
2023. "A Wideband and Low Reference Spur PLL with Clock Feedthrough Suppressed and Low Current Mismatch Charge Pump and Symmetrical CML Divider" Electronics 12, no. 19: 4164.
https://doi.org/10.3390/electronics12194164
APA Style
Wang, Y., Liu, Y., Xu, H., Li, Z., & Li, Z.
(2023). A Wideband and Low Reference Spur PLL with Clock Feedthrough Suppressed and Low Current Mismatch Charge Pump and Symmetrical CML Divider. Electronics, 12(19), 4164.
https://doi.org/10.3390/electronics12194164