1. Introduction
Electrical Impedance Tomography (EIT) is a low-cost, safe and fast imaging technique which reconstructs the conductivity distribution of an examined object encircled by a cluster of electrodes, by injecting a low frequency current. Even though EIT is mainly used for medical purposes, its applications are extended to geophysical research and non-destructive evaluation.
Although this method is characterized by critically-low spatial resolution, especially near the center of the examined volume where the field sensitivity is decreased, its temporal resolution can reach exceptional levels, making EIT a great solution for real-time and time variant applications [
1,
2]. In addition, in the case of medical applications where conventional imaging methods such as CT, MRI and ultrasound cannot be used frequently and repeatedly on a patient (due to radiation, high cost, non-portability etc), EIT is a possible low cost alternative; EIT can serve as a complementary diagnostic and monitoring tool between two examinations from the previous methods.
Many EIT hardware systems with specific clinical applications have been developed over the last 3 decades, such as the Sheffield MK (v1 1987, v3.5 2001) [
3], the Dartmouth breast imaging system (1998, 2001, 2008) [
4,
5,
6], the ACT 3 and 4 EIT system (1994, 2005) [
7,
8], the Swisstom active electrode system (2012), the KHU Mark 2.5 system (2014) [
9] and the ACE1 pulmonary real-time imaging system(2019) [
1]. Over the years, many design and configuration improvements have taken place, targeted to the acquired medical images’ quality.
The image reconstruction problem of EIT is typically ill-posed and ill-conditioned, which means that even relatively low noise levels at the measurements could lead to significant reconstruction artifacts [
10,
11]. Therefore, apart from the essential mathematical modelling of the problem, the measured data need to be as accurate as possible with the minimum noise level. Intrinsic electrical bio-signals and unwanted motion of the electrodes (e.g., breathing or heartbeat) introduce noise in addition to noise due to electronic hardware [
1,
12]. Many of these cannot be easily predicted during the hardware design process. This creates the necessity for proper simulation before proceeding to the system design. Although many tools have been used for either the simulation of the tissue’s behavior in time and frequency (MATLAB-EIDORS tool, COMSOL, ANSYS, etc), of the contact impedance’s impact [
13]; or the simulation of the hardware (SPICE for the current source behavior [
14,
15]), there is no complete effort to merge hardware (digital and analog), software and the subject’s properties on a single simulation core.
A preliminary parametric study has been presented in [
11] where a whole EIT system circuitry has been simulated in LT Spice, including some 2D phantom equivalent circuits. It has been observed how possible problems such as increased signal noise and large contact impedance variation or more critical issues (electrode disconnections, short-circuits) contribute to imaging errors.
This work extends [
11] in the following directions: A) It considers a more detailed model of the current source by including its output impedance,
, depending on frequency
. Typically
decreases in magnitude with
diverting from the ideal model, B) Digital to Analog Converter’s (DAC) quantization noise is included in the analysis, C) Proper analog filtering for antializing is included in the analysis, D) In addition to 2D, 3D Finite Element structures are developed in MATLAB and are imported into LT Spice as
N-port equivalent circuits (
N is the number of electrodes used.) to better simulate the EM field effects, and finally, E) The data acquisition system, including both the analog (filters, instrumentation amplifiers, voltage shifting in LT Spice) and digital (Analog to Digital Converter (ADC), data processing, image reconstruction in MATLAB) parts has been simulated. In addition, the transient effects, current injection and voltage acquisition channels switching times as well as the ADC noise, setting times and sampling rates have been taken into consideration [
16].
A parametric study has been performed, modifying properties of the Voltage Controlled Current Source (VCCS), the electrodes, the structure (measuring subject) and the acquisition system within a frequency range of [10,100] kHz, in an effort to optimize the performance of an EIT system. Although there is difficulty in specifying hardware parameters in such complex systems, the presented simulations can be effective tools for system spec-determination and preliminary design; something that requires increased attention in EIT, since ostensibly small deviations or issues could lead to failure in the image reconstruction.
The paper is organized as follows: In
Section 2 the EIT mathematical model along with the forward and inverse problems are briefly described. In
Section 3, the simulated hardware in LT Spice is presented, highlighting the signal generation, the current source part, the subject equivalent circuit and the data acquisition process. In
Section 4, EIT simulations are performed for selected VCCS topologies, frequencies, 3D tank phantoms, ADC sampling rates and resolutions, and the corresponding results are presented. The results are compared and discussed in
Section 5. In the final section, conclusions are drawn.
3. EIT Hardware
It has been shown that the tetrapolar measurement technique is the most suitable for EIT especially in bio-impedance instrumentation [
17]. To implement is, a sinusoidal (or bi-frequency) current source (up to 1 mA, 10 kHz–100 kHz) is needed, followed by a multiplexing array to drive and sink the current from an electrode pair and take differential measurements from all electrode pairs. More details about the complete system architecture can be found in [
11].
Here, we focus on (a) the current source topology and its properties, and, the their impact on the measurements and image reconstruction quality, on (b) the development of an electrical equivalent model of a typical phantom used for evaluating the performance of EIT image reconstruction algorithms, and on (c) the impact of the data converters properties on the image reconstruction quality.
3.1. The Current Source
The current source circuitry part described here includes the (voltage) signal generation, the filtering stage and the Voltage Controlled Current Source (VCCS).
3.1.1. Signal Generation
For signal generation, a Direct Digital Synthesis (DDS) block is usually a suitable solution. This includes a DAC driven by a sinusoidal or more complex waveform, typically stored in a Look-Up-Table (LUT). The analog output signal-to-noise ratio (SNR), considering only the quantization noise, of an L-bit DAC is [
11]
where
is the oversampling ratio. In this study, we simulated a 16 bit DAC (14 bit ENOB) with a sampling frequency of 16 times the desired signal frequency
, i.e., with
. Data were written on a text file (.txt) which was used as a PWL LT Spice voltage source.
The DAC’s output is filtered by an analog low-pass or band-pass filter. In our case, we use a 2nd order multiple feedback active band-pass filter with a central frequency of
and quality factor of
[
19]. The filter (shown in
Figure 1a) was simulated using the ADA4625 Opamp (analog devices).
3.1.2. Voltage-to-Current Conversion
The design of an appropriate VCCS is one of the most challenging parts in an EIT system design, since the specifications must satisfy high output impedance
, Common Mode Rejection Ratio (CMRR) and sufficient current amplitude (low enough for the patients’ safety and high enough to avoid notable noise rates) for as high frequency range as possible. In this study the topologies simulated are based on the modified Howland current source, described in [
14,
20,
21]. Specifically, two main approaches have been tested: (a) the grounded load and (b) the mirrored modified Howland VCCS [
20]. Their topologies are shown in
Figure 1b,c correspondingly. The mirrored VCCS is driven from a THS4130 fully differential amplifier, which follows the analog filter and offers low noise levels (1.3 nV/
) and an acceptable slew rate (51 V/
s). The Common Mode Voltage
was connected to ground. All ICs were supplied with +/− 15 Volts. In addition, since the mirrored VCCS needs to be symmetric, the corresponding resistors are of the same value (
in
Figure 1c). In order to be able to measure the input current to the load, an instrumentation amplifier (AD8421) stage has been added with a fixed sense resistor
between its inputs and a configurable gain
resistor [
22].
The output impedance
of Howland current sources depends on the balance of the resistors
which is extremely sensitive. Therefore the resistors above need to be characterized by very low tolerance (
). Furthermore, they are affected by the open loop gain of the Opamp (A), which is exposed to factors such as frequency and temperature. Those dependencies can be expressed at an approximate way by the following equations for the grounded load case: [
20]
From the equations above it is concluded that small perturbations of the resistor-coefficients not only could result in a much smaller than expected
but also to unstable oscillations (since the Opamp already has a positive feedback) [
20,
23]. Another important issue occurs from the parasitic impedances while
increases, that lead to a severely decreased
and intense changes of the phase shift. The phase shift can be easily estimated from simulation and circuit testing and be added as a parameter when necessary in the acquisition part. Nevertheless,
can hardly be kept above 200 k
for
kHz, which leads to a large percentage of current steer before the load. Simulations performed show that increasing
, optimises the condition for the larger frequencies at the cost of current amplitude reduction that results in lower measurement SNR due to white noise and lower resolution.
The mirrored Howland VCCS improves on these issues, since it has larger
which arises from the sum of the two single ended circuits
[
20]. The current amplitude is also larger and can be adjusted from the THS4310’s gain (setting
and
to proper values). In
Figure 2, simulations show the
and the current amplitudes for the two topologies, using the ADA4625 and OPAx210 Opamps. Additionally, a transient simulation that includes the DAC, filter and VCCS output for parametric
resistor is displayed. A 300
resistor in series with a
uF capacitor were used as load. The resistor values and tolerances selected are shown in
Table 1.
From the simulation displayed, it is shown that with a mirrored VCCS
can reach 400 k
using the ADA4625 Opamp and even 700 k
using the OPAx210 Opamp with
4 k
. The load current amplitudes are also kept at levels around
uA which are appropriate levels. In reality, the corresponding real
values have some randomness and may differ, however those simulations demonstrate the order of their magnitude [
20], which is an important factor to be taken into consideration during EIT designing.
In the literature, the first EIT systems developed in the late 1980s–early 1990s used single-ended current sources [
3,
24]. Due to the degradation caused by the relatively low output impedance, combined with parasitic capacitances, calibration stages (negative impedances at first and Generalized Impedance Converters (GICs) later in the mid-2000 s) were used for the cancellation of stray capacitances and maximization of the
[
4,
5,
6,
7,
8,
9,
25]. This approach assisted on achieving superior output impedance values (up to 2 M
at 100 kHz [
9]), allowing proper operation at frequencies up to 1 MHz [
4,
5,
6]. Small modifications have also been performed on the Howland VCCSs in order to prevent oscillations (capacitors parallel to the negative feedback [
9]).Some other implementations included the mirrored VCCS [
1,
26] or other approaches (Bragos) [
27,
28]. In [
28] the current imbalance between source and sink is addressed by measuring the current and adjusting its amplitude. Most of those systems are characterized by
from a hundred to several hundreds of k
at [10,100] kHz.
However, negative impedance circuits might suffer instability due to overcompensation of stray capacitance, [
29]. Furthermore GICs need continuous calibration and are incapable of performing over large frequency spans simultaneously (limited bandwidth) [
9]. Thus, often multiple GICs are essential, where each one covers a small specific frequency range. On the other hand, differential VCCSs need precise resistor matching with very low tolerances and cause higher white noise levels due to the large number (and values) of resistors used [
26]. In each case, the designer has to estimate the pros and cons of his choice, taking into consideration the application targeted and its standards.
3.2. Equivalent Circuits
The subject circuit equivalent can be formed by transforming the FEM mesh along with its element admittance values to a N-electrode port RLC circuit. Nevertheless, apart from the examined volume’s properties, it is important to include the effect of the electrode properties which contain: (a) their displacement and area, which affects the order of the measured impedance and (b) their contact impedances that need to be balanced and depend on the electrode material. The CEM described in
Section 2, assists to this direction, since it considers about the electrode geometry and
. However, in terms of this study, we included only the displacement in the FEM mesh; whereas the electrode equivalent circuit was simulated separately at LT Spice before the N-port inputs, in order to observe each individual component’s effect at the measurements, and not just the
value’s one.
3.2.1. Electrode Equivalent
Briefly, the simplest electrode equivalent circuit model consists of a parallel combination of a resistor
and an interface capacitance
(actually a constant phase component), in series with a solution resistor
which indicates the impedance between electrode and subject’s surface (skin) [
11,
30]. More detailed electrode equivalent models can be found in [
30,
31,
32]. In this particular study, simulations are reduced to 3D salted water tanks, therefore very small
values have been chosen (<2
). In addition, crosstalk capacitances of less than
pF have also been included (see
Figure 3), representing the electrode lead wire capacitive effects as well as the multiplexer’s stray capacitances. The parasitic effects caused by the electrodes, switches and lead wires can be greatly reduced with the usage of active electrodes [
1,
2,
33]. However, an active electrode system implementation can highly increase the total hardware cost.
3.2.2. Subject Equivalent
Let as consider the simulated FEM system equation, which gives the nodal voltages
, for
nodes:
where
has resulted from the local element matrices assembling,
and
from the boundary conditions (
2)–(
4) and
refers only to the nodes where the measurements are taken [
10].
indicate the measurements and
the current injected. Let us write
. Then, by expanding the system (
9):
Solving for the nodal potentials and the measurements we get:
The last equation is written:
corresponds to the sparse and almost symmetric conductivity matrix considering each measuring point as a node [
34]. Thus, the result is a N-port system, where each impedance between two nodes
i and
j is computed as:
[
35].
3.3. Data Acquisition
In order to get an EIT image frame, when using a current skip-i pattern and a voltage skip-j pattern [
36],
measurements are conventionally needed if
or
else. Each measurement is traditionally taken for a particular set up of current source, sink and voltage measuring electrodes. Between each couple of measurements, a transient effect takes place due to the analog multiplexer switching, the network’s parasitic behavior and subject’s admittance behavior. After those effects ceased the output signal comes to Steady-State (SS) and an integer number of periods has to be properly sampled by an ADC (as shown in
Figure 4).
Spice EIT transient simulation is set as follows: the multiplexers’ digital inputs are defined by PWL sources. The pulse rising times have also been considered, according to the multiplexer’s specifications (ADG426). After each multiplexer’s change, a time is inserted as the needed time to reach the SS. During the ADC can be initialized or send the previous samples to a DSP/MCU and set to the proper state to sample. usually lasts about 200–300 and can be extended if the essential configurations have not already finished.
When
ends, the corresponding
time point is written at a .txt file by MATLAB. Then follows the
(conversion time) which is the time ADC needs to sample the output signal when at SS. It is recommended to be an integer number
k (5 to 10) of the signal’s period
. After the sampling is finished,
time point is written to the text file.
time (in the order of ns) is then needed for the multiplexers to get the order and change their state. For each measurement we have
and the total time needed for the acquisition of a single measurement is:
If a particular measurement is taken after a current source position change this duration is increased as follows:
The total time when using pairwise injection protocol (adjacent/ skip-0) is:
obviously depends on the electrode number N, the input signal frequency and the ability of the ADC to send the samples quickly to the MCU. It is assumed that any post-acquisition signal processing is performed after the acquisition process has been completed.
The output voltage signal
is sent to MATLAB after the SPICE transient simulation has ended. Then sampling is performed between each
and
time point, using a cost minimization function between the desired and the actual sampling times, since Spice simulators do not use constant time steps [
37]. Only the first 14 Most Significant Bits (MSB) out of 16 bits of the simulated ADC are used (ENOB), since the two Least Significant Bits (LSBs) are considered as noisy and distorted.
For each measuring window an amplitude is obtained by the difference of the medians between the five maximum and the five minimum voltage values from the ADC sampled voltage values . The amplitude values are stored in the vector, which is usually normalized, by setting its maximum value to 1. vector is then utilized as raw data for the image reconstruction. In order to get a reliable result from the process described above, it is strongly recommended that , where is the minimum Spice sampling frequency, which is defined as the inverse of the maximum Spice time step.
5. Discussion
From the simulations described, it is observed that both the reconstructed image artifacts and the measurement and imaging errors along with
are potentially decreased in cases when high-
VCCS and high-
ADC are combined. Specifically, the minimum errors are obtained in test case T3b (
Figure 6h shows the object completely in the red circle), where we used a mirrored Modified Howland VCCS with a
estimated just over than 1 M
at
kHz according to the results in
Section 3. Furthermore, the
is 1 MSps which is over 64 times the input signal frequency
. The corresponding
was estimated at
(pointed with a green triangle in
Figure 8). That satisfies the EIT literature hardware standards (
for typical performance,
for high performance) [
5,
9,
28].
When the input signal frequency (
) is increased to 100 kHz and measurements are taken at the same structure, the mirrored VCCS
is decreased to 400 k
, causing current distortion. Moreover, the sampling rates of 1 MSps and 2 MSps cannot be characterized as oversampling when
kHz. This results in larger measurement errors (case T3f in
Figure 6l where the case of
kHz exhibits greater error than case T3b in
Figure 6d where
kHz, while both tests use Mirrored VCCS; same happens with cases T3d and T3g). Overall, increasing the input frequency from 10 kHz to 100 kHz causes a measurement SNR reduction from 5 dB [
6] to 20 dB [
9] at implemented hardware EIT systems, resulting in a corresponding image quality reduction [
9].
In addition, when increasing
concentration in the water, the mean value and range of the background’s
is increased (see
Figure 5b,c). This results in lower impedance values between each electrode channel and thus very small measuring amplitudes. Even with a 54 dB-gain instrumentation amplifier (an AD8421 with
= 20
), the measured amplitudes barely reach the value of 1 mV when the measure is performed far from the current injected electrodes. Taking into account the signal’s noise and the ADC’s capabilities, the raw voltage input to the reconstruction algorithm suffers from very low SNR. This has an obvious impact on the
and
values as shown in
Table 2 and the imaging precision and quality as shown in
Figure 6: Low
cases (T2a, T2b, T3a, T3b, T3e, T3f) have been reconstructed with greater success than the high
ones: (T2c, T2d, T3c, T3d, T3g, T3h); the results are independent of the hardware specifications used in the simulations. Since the measurement accuracy has been reduced, the
has increased accordingly, reaching the unacceptable for typical EIT design levels of 4–5% (see the 4 highest values in
Figure 8). However, in the literature
is measured at homogeneous saline tanks of
S/m to
S/m [
5,
9,
28]; a value much lower than the current value of
S/m. Therefore, the low salt concentration
levels are more representative for the hardware’s performance. It is also confirmed that higher measurement errors generally lead to higher imaging errors. However, this relation is not proportional; it is rather characterized by a non-linearity which is correlated to the inverse problem’s non-linear nature.
The Diametric Conductivity Plots (DCP,
Figure 7b,c) show that most cases detect the decreased conductivity in the red circle area. However, the reconstruction algorithm is not able to properly centralize the minimum conductivity point of the target (which occurs at
x = 6.5 cm), even at the EM simulation (test case T1). This can be explained by the 3D nature of our set-up; the target object is located some centimeters down from the electrode slice (z-layer). Therefore, the currents streamlines go through longer distance in the field until they come across the plastic object and change direction. This results in a deviation between the object’s detected position and the actual horizontal position. Moreover, artifacts occur for
cm, where the actual conductivity change
is negligible. The
in most cases follows the corresponding
and
, since (as referred earlier) larger deviations in measurements lead to further imaging artifacts. A hard exception occurs for the T3b case (Mirrored VCCS, low salt concentration,
kHz,
MSps), where despite featuring the least erroneous measurements and the minimum
, it has a modest DCP error. However, an observation of the corresponding image reconstruction (
Figure 6h) shows that the total image artifacts are less intense than most other cases where
is larger and
smaller. Besides, the red circle area identifies the low conductive blue one.
Examining the test case T4, it is shown (
Figure 6o) that due to an electrode disconnection the reconstruction completely fails: the target object cannot even be distinguished. However, a-priori knowledge of the structure’s behavior (a non-conductive object is supposed to appear near the red circle), combined with careful examination of the image leads to the hypothesis that there is a major error near the electrodes 9–10. Properly modifying the measurement weight
W matrix, we get a new measurement set, fully uncorrelated with electrode 10, which contains 156 measurements instead of the initial set of 208 measurements. The improvement in
Figure 6p is significant, since the majority of artifacts has been erased. For case T4b, the
was estimated using only the 156 valid measurements. Thus, the
was not estimated for this test case.
In general, the design of an EIT hardware system is a process where numerous parameters have to be taken into consideration and the specifications are deeply depended on its application field. For instance, a real-time thoracic-imaging EIT system needs to be characterized by very high framing speed [
1,
33]; this requires higher current signal frequencies, in order to accelerate the acquisition pipeline described in
Section 3. This leads to the necessity of designing a high-
VCCS over a large frequency range; moreover, the designer must combine the high-perfomance VCCS with an ADC with high throughput rates. Another example is a brain-imaging EIT system, where lower frequencies are utilized; however, due to the skull’s very large impedance the
dramatically increases and the current source should be capable of driving much higher impedances [
28].
In all cases, the use of single-ended Howland current pumps without any negative impedance calibration or calibration via current amplitude measurement should be avoided. On the other hand, if the designer chooses a mirrored Howland architecture he must consider carefully the resistors matching and the amount of Johnson noise (trade-off between balance suceeded with high valued, low tolerance resistors and low noise achieved by low value resistors). Furthermore, the ADC sampling rates are strongly recommended to exceed the signal’s frequency over 10 times, a condition that has been adopted by most EIT systems [
1,
6,
17,
28,
33]. Both factors (high
, acquisition rates) have a significant impact on the measurements quality.