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Electronics
Special Issues
Safe and Secure Embedded Systems
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Safe and Secure Embedded Systems

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Computer Science & Engineering".

Deadline for manuscript submissions: closed (1 January 2019) | Viewed by 21192

Special Issue Editors

Prof. Dr. Mikael Sjödin

E-Mail Website
Guest Editor
Mälardalen Real-Time Research Centre, Mälardalen University, Eskilstuna 63105, Sweden
Interests: embedded systems; software engineering; real-time systems
Prof. Dr. Masoud Daneshtalab

E-Mail Website
Guest Editor
School of Innovation, Design and Engineering, Division of Intelligent Future Technologies, Mälardalen University, 72218 Västerås, Sweden
Interests: design and optimization of deep neural networks; neural architecture search

Special Issue Information

Dear Colleagues,

Today’s embedded systems are, to an increasing degree, being deployed in contexts where the safety and security of a system are paramount. The systems need to be demonstrably safe, meaning that they should not instigate an unacceptable risk to humans, environment, or equipment. Often, an independent certification agency must assess safety. At the same time, systems must be secure, meaning that they should be resilient to tampering and malicious attempts to access or control the system. In the connected world, security measures to prevent attacks of the Internet are necessary. Thread and hazard analysis of embedded systems usually depend on the recognition of vulnerable software and hardware components, where the failure of these can cause accidents or successful attacks. While both safety and security are difficult and expensive to achieve in their own rights, their combination in provable safe and secure embedded systems remains largely unsolved. Hence, this Special Issue solicits novel research in topics that include, but are not limited to:

  • modeling of safety and security concerns in embedded systems
  • interdependencies between safety and security in embedded systems
  • integrated approaches safety and security
  • security in safety-critical systems
  • run-time mechanisms in hardware and software to support safety and security
  • safety and security in parallel and/or heterogeneous computing platforms
  • methods, tools, and techniques for modeling, design, and verification of safe and secure embedded systems
  • implications of regulation and certification on safety and security in embedded systems
  • thread and hazard analysis of hardware and software components
  • fault tolerant designs for safe and secure embedded systems
  • hardware and software co-design and specialization for safe and secure embedded systems

Prof. Dr. Mikael Sjödin
Dr. Masoud Daneshtalab
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • Embedded systems
  • safety
  • security
  • hardware and software co-design

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Published Papers (4 papers)

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Research

20 pages, 1030 KiB  
Article
SSCFM: Separate Signature-Based Control Flow Error Monitoring for Multi-Threaded and Multi-Core Environments
by Kiho Choi, Daejin Park and Jeonghun Cho
Electronics 2019, 8(2), 166; https://doi.org/10.3390/electronics8020166 - 1 Feb 2019
Cited by 4 | Viewed by 3507
Abstract
Soft error is a key challenge in computer systems. Without soft error mitigation, control flow error (CFE) can lead to system crash. Signature-based CFE monitoring scheme is a representative technique for detecting CFEs during runtime. However, most of the signature-based CFE monitoring schemes [...] Read more.
Soft error is a key challenge in computer systems. Without soft error mitigation, control flow error (CFE) can lead to system crash. Signature-based CFE monitoring scheme is a representative technique for detecting CFEs during runtime. However, most of the signature-based CFE monitoring schemes proposed thus far are based on a single thread. Currently, the widely used multi-threaded and multi-core environments have greatly improved the performance of the computing system, but, if the these schemes are applied in these environments, performance improvement is difficult to achieve, or rather performance degradation may occur. In this paper, we propose a separate signature-based CFE monitoring (SSCFM) scheme that separates the signature update and the signature verification on the thread level. The signature update is combined with application thread and signature verification and executed on separate monitor threads, so that we can expect performance improvements in multi-threaded or multi-core environments. Furthermore, the SSCFM scheme can fully cover inter-procedural CFE not covered by many signature-based CFE monitoring schemes by using inter-procedural control flow analysis. With the proposed SSCFM scheme, the execution time overhead is reduced by approximately 26.67% on average from the SEDSR scheme, and the average CFE detection rate with SSCFM is approximately 93.69%. In addition, this paper also introduces the LLVM compiler-based SSCFM generator that makes it easy to apply the SSCFM scheme to software applications. Full article
(This article belongs to the Special Issue Safe and Secure Embedded Systems)
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20 pages, 2192 KiB  
Article
Hardware-Enhanced Protection for the Runtime Data Security in Embedded Systems
by Weike Wang, Xiaobing Zhang, Qiang Hao, Zhun Zhang, Bin Xu, Haifeng Dong, Tongsheng Xia and Xiang Wang
Electronics 2019, 8(1), 52; https://doi.org/10.3390/electronics8010052 - 2 Jan 2019
Cited by 17 | Viewed by 5481
Abstract
At present, the embedded systems are facing various kinds of attacks, especially for the data stored in the external memories. This paper presents a hardware-enhanced protection method to protect the data integrity and confidentiality at runtime, preventing the data from spoofing attack, splicing [...] Read more.
At present, the embedded systems are facing various kinds of attacks, especially for the data stored in the external memories. This paper presents a hardware-enhanced protection method to protect the data integrity and confidentiality at runtime, preventing the data from spoofing attack, splicing attack, replay attack, and some malicious analysis. For the integrity protection, the signature is calculated by the hardware implemented Lhash engine before the data sending off the chip, and the signature of the data block is recalculated and compared with the decrypted one at the load time. For the confidentiality protection, an AES encryption engine is used to generate the key stream, the plain data and the cipher data can translate through a simple XOR operation. The hardware cryptographic engines are optimized to work simultaneously with the memory access operation, which reduces the hardware overhead and the performance overhead. We implement the proposed architecture within OR1200 processor on Xilinx Virtex 5 FPGA platform. The experiment results show that the proposed hardware-enhanced protection method can preserve the integrity and confidentiality of the runtime data in the embedded systems with low power consumption and a marginal area footprint. The performance overhead is less than 2.27% according to the selected benchmarks. Full article
(This article belongs to the Special Issue Safe and Secure Embedded Systems)
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14 pages, 3969 KiB  
Article
Two-Dimensional (2D) Slices Encryption-Based Security Solution for Three-Dimensional (3D) Printing Industry
by Giao N. Pham, Suk-Hwan Lee, Oh-Heum Kwon and Ki-Ryong Kwon
Electronics 2018, 7(5), 64; https://doi.org/10.3390/electronics7050064 - 7 May 2018
Cited by 5 | Viewed by 5662
Abstract
Nowadays, three-dimensional (3D) printing technology is applied to many areas of life and changes the world based on the creation of complex structures and shapes that were not feasible in the past. But, the data of 3D printing is often attacked in the [...] Read more.
Nowadays, three-dimensional (3D) printing technology is applied to many areas of life and changes the world based on the creation of complex structures and shapes that were not feasible in the past. But, the data of 3D printing is often attacked in the storage and transmission processes. Therefore, 3D printing must be ensured security in the manufacturing process, especially the data of 3D printing to prevent attacks from hackers. This paper presents a security solution for 3D printing based on two-dimensional (2D) slices encryption. The 2D slices of 3D printing data is encrypted in the frequency domain or in the spatial domain by the secret key to generate the encrypted data of 3D printing. We implemented the proposed solution in both the frequency domain based on the Discrete Cosine Transform and the spatial domain based on geometric transform. The entire 2D slices of 3D printing data is altered and secured after the encryption process. The proposed solution is responsive to the security requirements for the secured storage and transmission. Experimental results also verified that the proposed solution is effective to 3D printing data and is independent on the format of 3D printing models. When compared to the conventional works, the security and performance of the proposed solution is also better. Full article
(This article belongs to the Special Issue Safe and Secure Embedded Systems)
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23 pages, 3554 KiB  
Article
Analysis of Network Attack and Defense Strategies Based on Pareto Optimum
by Yang Sun, Wei Xiong, Zhonghua Yao, Krishna Moniz and Ahmed Zahir
Electronics 2018, 7(3), 36; https://doi.org/10.3390/electronics7030036 - 7 Mar 2018
Cited by 9 | Viewed by 5439
Abstract
Improving network security is a difficult problem that requires balancing several goals, such as defense cost and need for network efficiency, to achieve proper results. Modeling the network as a game and using optimization problems to select the best move in such a [...] Read more.
Improving network security is a difficult problem that requires balancing several goals, such as defense cost and need for network efficiency, to achieve proper results. Modeling the network as a game and using optimization problems to select the best move in such a game can assist network administrators in determining an ideal defense strategy. However, most approaches for determining optimal game solutions tend to focus on either single objective games or merely scalarize the multiple objectives to a single of objective. In this paper, we devise a method for modeling network attacks in a zero-sum multi-objective game without scalarizing the objectives. We use Pareto Fronts to determine the most harmful attacks and Pareto Optimization to find the best defense against those attacks. By determining the optimal solutions through those means, we allow network administrators to make the final defense decision from a much smaller set of defense options. The included experiment uses minimum distance as selection method and compares the results with a minimax algorithm for the determination of the Nash Equilibrium. The proposed algorithm should help network administrators in search of a hands-on method of improving network security. Full article
(This article belongs to the Special Issue Safe and Secure Embedded Systems)
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