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Micromachines
Special Issues
System-on-a-Chip (SoC): Design and Applications
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System-on-a-Chip (SoC): Design and Applications

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "E：Engineering and Technology".

Deadline for manuscript submissions: closed (10 July 2023) | Viewed by 10513

Special Issue Editors

Prof. Dr. Hua Tang

E-Mail Website
Guest Editor
Department of Electrical Engineering, University of Minnesota Duluth, Duluth, MN 55812, USA
Interests: analog/mixed-signal IC design; SoC design; VLSI computer aided design; vision-based intelligent systems
Prof. Dr. Wen-Jyi Hwang

E-Mail Website
Guest Editor
Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei 10610, Taiwan
Interests: internet of things; system on a chip; artificial intelligence; gesture recognition
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

System-on-a-Chip (SoC) is a highly integrated and heterogeneous computer system that is typically composed of analog, digital, optical, radio frequency (RF), micro-electro-mechanical systems (MEMS) etc. Today, it is widely used in communication, biomedical, and mobile applications. With the ever-increasing use of Artificial Intelligence (AI) and deep-learning-enabled applications, today’s SoC finds new opportunities and challenges in architectures/platforms, systems, circuits design, design tools, and applications.

This Special Issue seeks to showcase research papers, communications, and review articles on recent advances/developments in SoC focusing on design and applications.

The topics of this Special Issue include but are not limited to:

  1. New architectures/platforms for SoC design;
  2. New SoC applications in diverse areas;
  3. New circuits for 5G/6G;
  4. Green circuits and systems for emerging energy/power applications;
  5. New design methodologies and tools for SoC;
  6. Design validation and verification and test for SoC;
  7. Network-on-Chip in SoC;
  8. Low-power SoC design for mobile applications.

Prof. Dr. Hua Tang
Prof. Dr. Wen-Jyi Hwang
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • SoC architecture
  • SoC design
  • communication circuits
  • green circuits
  • SoC design tools
  • SoC design verification
  • network-on-chip
  • low-power

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Published Papers (4 papers)

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Research

16 pages, 4138 KiB  
Article
Intelligent Monitoring System with Privacy Preservation Based on Edge AI
by Soohee Kim, Joungmin Park, Youngwoo Jeong and Seung Eun Lee
Micromachines 2023, 14(9), 1749; https://doi.org/10.3390/mi14091749 - 7 Sep 2023
Cited by 4 | Viewed by 1716
Abstract
Currently, the trend of elderly people living alone is rising due to rapid aging and shifts in family structures. Accordingly, the efficient implementation and management of monitoring systems tailored for elderly people living alone have become paramount. Monitoring systems are generally implemented based [...] Read more.
Currently, the trend of elderly people living alone is rising due to rapid aging and shifts in family structures. Accordingly, the efficient implementation and management of monitoring systems tailored for elderly people living alone have become paramount. Monitoring systems are generally implemented based on multiple sensors, and the collected data are processed on a server to provide monitoring services to users. Due to the use of multiple sensors and a reliance on servers, there are limitations to economical maintenance and a risk of highly personal information being leaked. In this paper, we propose an intelligent monitoring system with privacy preservation based on edge AI. The proposed system achieves cost competitiveness and ensures high security by blocking communication between the camera module and the server with an edge AI module. Additionally, applying edge computing technology allows for the efficient processing of data traffic. The edge AI module was designed with Verilog HDL and was implemented on a field-programmable gate array (FPGA). Through experiments conducted on 6144 frames, we achieved 95.34% accuracy. Synthesis results in a 180 nm CMOS technology indicated a gate count of 1516 K and a power consumption of 344.44 mW. Full article
(This article belongs to the Special Issue System-on-a-Chip (SoC): Design and Applications)
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15 pages, 11615 KiB  
Article
A Fully Integrated RFID Reader SoC
by Jian-Guo Hu, Wen-Zhuo Mei, Jin Wu, Jia-Wei Li and De-Ming Wang
Micromachines 2023, 14(9), 1691; https://doi.org/10.3390/mi14091691 - 29 Aug 2023
Cited by 2 | Viewed by 1864
Abstract
The traditional RFID reader module relies on a discrete original design. This design integrates a microcontroller, high-frequency RFID reader IC and other multiple chips onto a PCB board, leading to bottlenecks in cost, power consumption, stability and reliability. To align with the trend [...] Read more.
The traditional RFID reader module relies on a discrete original design. This design integrates a microcontroller, high-frequency RFID reader IC and other multiple chips onto a PCB board, leading to bottlenecks in cost, power consumption, stability and reliability. To align with the trend towards high integration, miniaturization and low power consumption in RFID reader, this paper introduces a fully integrated RFID Reader SoC. The SoC employs the open-source Cortex-M0 core to integrate the RF transceiver, analog circuits, baseband protocol processing, memory and interface circuits into one chip. It’s compatible with ISO/IEC 14443 A-type and B-type and ISO/IEC 15693 transmission protocols and rates. Manufactured using a 0.18 μm process, the chip is compatible with multiple standards. The optimized design of the digital baseband control circuit results in a chip area of only 11.95 mm2 offering clear advantages in both area and integration compared to similar work. Full article
(This article belongs to the Special Issue System-on-a-Chip (SoC): Design and Applications)
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13 pages, 5228 KiB  
Article
A High-Precision Current-Mode Bandgap Reference with Nonlinear Temperature Compensation
by Zhizhi Chen, Qian Wang, Xi Li, Sannian Song, Houpeng Chen and Zhitang Song
Micromachines 2023, 14(7), 1420; https://doi.org/10.3390/mi14071420 - 14 Jul 2023
Cited by 2 | Viewed by 3932
Abstract
A high-precision current-mode bandgap reference (BGR) circuit with a high-order temperature compensation is presented in this paper. In order to achieve a high-precision BGR circuit, the equation of the nonlinear current has been modified and the high-order term of the current flowing into [...] Read more.
A high-precision current-mode bandgap reference (BGR) circuit with a high-order temperature compensation is presented in this paper. In order to achieve a high-precision BGR circuit, the equation of the nonlinear current has been modified and the high-order term of the current flowing into the nonlinear compensation bipolar junction transistor (NLCBJT) is compensated further. According to the modified equation, two solutions are designed to improve the output accuracy of BGR circuits. The first solution is to divide the NLCBJT branch into two branches to reduce the coefficient of the nonlinear temperature compensation current. The second solution is to inject the nonlinear current into the two branches based on the first one to further eliminate the temperature coefficient (TC) of the current flowing into the NLCBJT. The proposed BGR circuit has been designed using the Semiconductor Manufacturing International Corporation (SMIC) 55 nm CMOS process. The simulation results show that the variations in currents flowing into NLCBJTs improved from 148.41 nA to 69.35 nA and 7.4 nA, respectively, the TC of the output reference current of the proposed circuit is approximately 3.78 ppm/°C at a temperature range of −50 °C to 120 °C with a supply voltage of 3.3 V, the quiescent current consumption of the entire BGR circuit is 42.13 μA, and the size of the BGR layout is 0.044 mm2, leading to the development of a high-precision BGR circuit. Full article
(This article belongs to the Special Issue System-on-a-Chip (SoC): Design and Applications)
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15 pages, 11333 KiB  
Article
Photoplethysmography-Based Distance Estimation for True Wireless Stereo
by Youngwoo Jeong, Joungmin Park, Sun Beom Kwon and Seung Eun Lee
Micromachines 2023, 14(2), 252; https://doi.org/10.3390/mi14020252 - 19 Jan 2023
Cited by 1 | Viewed by 2225
Abstract
Recently, supplying healthcare services with wearable devices has been investigated. To realize this for true wireless stereo (TWS), which has limited resources (e.g. space, power consumption, and area), implementing multiple functions with one sensor simultaneously is required. The Photoplethysmography (PPG) sensor is a [...] Read more.
Recently, supplying healthcare services with wearable devices has been investigated. To realize this for true wireless stereo (TWS), which has limited resources (e.g. space, power consumption, and area), implementing multiple functions with one sensor simultaneously is required. The Photoplethysmography (PPG) sensor is a representative healthcare sensor that measures repeated data according to the heart rate. However, since the PPG data are biological, they are influenced by motion artifact and subject characteristics. Hence, noise reduction is needed for PPG data. In this paper, we propose the distance estimation algorithm for PPG signals of TWS. For distance estimation, we designed a waveform adjustment (WA) filter that minimizes noise while maintaining the relationship between before and after data, a lightweight deep learning model called MobileNet, and a PPG monitoring testbed. The number of criteria for distance estimation was set to three. In order to verify the proposed algorithm, we compared several metrics with other filters and AI models. The highest accuracy, precision, recall, and f1 score of the proposed algorithm were 92.5%, 92.6%, 92.8%, and 0.927, respectively, when the signal length was 15. Experimental results of other algorithms showed higher metrics than the proposed algorithm in some cases, but the proposed model showed the fastest inference time. Full article
(This article belongs to the Special Issue System-on-a-Chip (SoC): Design and Applications)
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