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Article

A Temperature-Compensation Technique for Improving Resolver Accuracy

by
Wandee Petchmaneelumka
,
Vanchai Riewruja
*,
Kanoknuch Songsuwankit
and
Apinai Rerkratn
School of Engineering, King Mongkut’s Institute of Technology Ladkrabang, Ladkrabang, Bangkok 10520, Thailand
*
Author to whom correspondence should be addressed.
Sensors 2021, 21(18), 6069; https://doi.org/10.3390/s21186069
Submission received: 6 August 2021 / Revised: 4 September 2021 / Accepted: 8 September 2021 / Published: 10 September 2021
(This article belongs to the Collection Instrument and Measurement)

Abstract

:
Variation in the ambient temperature deteriorates the accuracy of a resolver. In this paper, a temperature-compensation technique is introduced to improve resolver accuracy. The ambient temperature causes deviations in the resolver signal; therefore, the disturbed signal is investigated through the change in current in the primary winding of the resolver. For the proposed technique, the primary winding of the resolver is driven by a class-AB output stage of an operational amplifier (opamp), where the primary winding current forms part of the supply current of the opamp. The opamp supply-current sensing technique is used to extract the primary winding current. The error of the resolver signal due to temperature variations is directly evaluated from the supply current of the opamp. Therefore, the proposed technique does not require a temperature-sensitive device. Using the proposed technique, the error of the resolver signal when the ambient temperature increases to 70 °C can be minimized from 1.463% without temperature compensation to 0.017% with temperature compensation. The performance of the proposed technique is discussed in detail and is confirmed by experimental implementation using commercial devices. The results show that the proposed circuit can compensate for wide variations in ambient temperature.

1. Introduction

A resolver, which is a kind of inductive transducer, is a useful device in instrumentation and measurement systems. The operation of a resolver is identical to a variable transformer, which consists of a primary winding as a rotor and two secondary windings placed at right angles from each other as stators [1,2,3,4]. Resolvers are widely used for the measurements of the angle, position, and speed in instrumentation and control systems. Resolvers provide high reliability, durability, and resolution. Therefore, resolvers are especially suitable for harsh environments. Resolvers have been applied in industries, military equipment, robots, aerospace, radars, electric vehicles, and medical and scientific equipment [5,6,7]. Practically, the primary winding of a resolver is excited by a sinusoidal signal. The resolver signals from the two secondary windings known as the quadrature signals are proportional to the sine and cosine functions of the rotor shaft angle, which are in the form of amplitude modulation with a suppressed carrier. Traditionally, a synchronous demodulator based on an analog multiplier, low-pass filter, or analog switch and integrator has been used to extract the shaft-angle signals from the resolver signals [1,8,9,10]. However, the response time and accuracy of these demodulators deteriorate due to the large time constant and phase shift caused by the dominant pole of the low-pass filter and integrator. To overcome these disadvantages, an alternative technique using a peak-amplitude finder was introduced [3,11,12]. This technique provides a simple configuration and rapid response. Recently, techniques for determining position from a resolver signal in digital form have been proposed in the literature [5,13,14,15,16,17]. Unfortunately, these approaches require the resolver to operate at a constant ambient temperature to achieve this accurately.
Many parameters can affect the accuracy of the resolver, such as phase shifts between the primary winding and secondary windings, amplitude imbalance and imperfect quadrature between two resolver signals, and variation in the ambient temperature [1,3,18]. Amplitude imbalance and imperfect quadrature cause errors in the determination of the shaft angle. Recently, a technique to minimize the error of the shaft-angle determination caused by amplitude imbalance and imperfect quadrature was proposed [18]. However, this technique requires a high-speed processor. Consequently, a complex measurement system structure is required. An amplitude imbalance or phase shift between the primary and secondary winding can be prevented using a technique proposed in the literature [3]. Variation in the ambient temperature influences the resistance of the winding, the mutual inductance, the magnetizing current, and the core loss current of the resolver, causing amplitude error in the resolver signals. The traditional technique to minimize this temperature effect is based on the use of an inverse tangent of the ratio of two resolver signals [1,4,8]. However, the disadvantage of this technique is that a large error occurs when the resolver signal is close or equal to zero. The response time is also rather slow for this technique. An approach based on the use of a temperature-sensitive device was developed to compensate for the temperature effect of inductive transducers [19,20,21,22]. The temperature effect in the technique mentioned above is compensated for in an open-loop procedure, which causes inaccuracies in the resolver signal. Other techniques are based on the modification of the transducer’s structure or material to obtain low-temperature sensitivity [23,24,25], and the use of reference inductance to compensate for the temperature effect [26]. The authors of [27] constructed a closed-loop technique to compensate for the temperature of the inductive transducer without using a temperature sensor. This technique requires the output signals of the transducer to be in linear form, which is only suitable for transducers used for the measurement of linear displacement, such as linear variable differential transformers (LVDTs). In contrast, the resolver signals are in the sine and cosine functions. Therefore, the techniques mentioned above are not applicable to these resolvers.
The purpose of this study was to construct a temperature-compensation technique for a resolver without requiring a temperature-sensitive device. From the transformer principle, the parameters of the secondary winding side can be referred to the primary winding side [28]. Therefore, the error of the resolver signal on the secondary winding side because of temperature can be extracted from the primary winding side. In this study, the error in the resolver signal due to the temperature effect was investigated from the current flowing through the primary winding of the resolver using the opamp supply-current-sensing technique [29,30,31]. The amplitude variation in the resolver signal due to the temperature effect was determined and compensated for using subtract-and-sum topology. The performance of the proposed technique was analyzed and confirmed by experimental implementation. All the devices used in the proposed technique are commercially available. Hence, the attractions of the proposed technique are its performance, simple configuration, and low cost.

2. Principle

The principle of the resolver is shown in Figure 1 [1]. A sinusoidal signal vex = VP sin (ωext) is applied to the primary winding LP, where VP is the peak amplitude voltage, ωex = 2πfex is the angular frequency, and fex is the frequency of the excitation signal. Two secondary windings are terminated by the load resistors RL1 = RL2, and the resolver signals vS1 and vS2 are produced in form of quadrature sinusoidal signals as
v S 1 = k R S v e x sin ( θ S ) = k R S V P sin ( ω e x t ) sin ( θ S )
v S 2 = k R S v e x cos ( θ S ) = k R S V P sin ( ω e x t ) cos ( θ S )
where kRS denotes the transformation ratio of the resolver and θS is the shaft angle. Practically, the amplitude of the resolver signals is affected by variations in the ambient temperature because the mutual inductance, the resistance of both the primary and secondary windings, the magnetizing current, and the core loss current of the resolver depend on variations in the ambient temperature.
Therefore, the transformation ratio kRS is affected by the ambient temperature. The resolver signals from Equations (1) and (2) can be written as
v S 1 = k R S ( 1 α Δ T ) V P sin ( ω e x t ) sin ( θ S )
v S 2 = k R S ( 1 α Δ T ) V P sin ( ω e x t ) cos ( θ S )
where α and ΔT are the temperature coefficient of the resolver and the temperature deviation from room temperature at 25 °C, respectively. From Equations (3) and (4), sin (ωext) can be simply removed by a synchronous demodulator. Thus, the resolver signals can be expressed as
v S 1 = k R S ( 1 α Δ T ) V P sin ( θ S )
v S 2 = k R S ( 1 α Δ T ) V P cos ( θ S )
The amplitude of the resolver signals depends on variation in the ambient temperature. The variation in the ambient temperature affects all the quantities of the resolver and causes deviation in the transformation ratio kRS. Based on the principle on which transformers function, the secondary winding currents flowing through the load resistors RL1 and RL2 can be referred to the primary side [28]. Therefore, the primary winding current iP can be used to investigate the secondary winding current. The disturbance of the primary winding current iP (which includes the magnetizing current and the core loss current) by the ambient temperature can be approximated as
i P = ( 1 α Δ T ) v e x | Z P L | = ( 1 α Δ T ) k R v e x
where kR = 1/|ZPL|, and ZPL is the combination of the primary-side impedance and the secondary-side impedance referred to the primary side of the resolver. It should be noted that the changes in the magnetizing current and the core loss current due to temperature are very small compared to the change in the secondary winding current, which can be considered as negligible [25,32]. If the temperature effect on the primary winding current is compensated for, then the secondary winding current is compensated simultaneously. Practically, the primary winding LP of the resolver is driven by the opamp, as shown in Figure 2a. From Figure 2a, the output state of the opamp is generally a class-AB configuration where the output current of the opamp exists within its supply current. In this study, a bipolar opamp was used for experimental implementation. From Figure 2a, the supply currents iSP and iSN of the opamp can be expressed as [29,30,31]
i S P = I B + ( i P 2 + 4 I S 2 ) + i P 2 f o r | i P | < 2 I S
and
i S N = I B + ( i P 2 + 4 I S 2 ) i P 2 f o r | i P | < 2 I S
where IB and IS denote the quiescent current and the bias current of the class-AB output state of the opamp, respectively.
For the large-amplitude primary winding current iP or |iP| > 2IS, the currents iSP and iSN can be described by
i S P = { I B + i P f o r i P > 2 I S I B f o r i P < 2 I S
and
i S N = { I B f o r i P > 2 I S I B + i P f o r i P < 2 I S
The primary winding current iP of a resolver affected by temperature can be observed from the supply current of the opamp. The schematic diagram used to achieve the supply current of the opamp is shown in Figure 2b. From the circuit in Figure 2b, if the input signal vex is applied, then the primary winding current iP can be described by vex/ZPL. The resistors RP and RN convert the current signals iSP and iSN to the voltage signals vSP and vSN, respectively. Opamp A2 and the resistors R1, R2, and R3 function as a summing amplifier to sum the voltage signals vSP and vSN [30,31]. Thus, the primary winding current iP of the resolver is determined in the form of the voltage signal vRC. The voltage signal vRC can be stated as
v R C = R P R 3 R 1 i S P + R N R 3 R 2 i S N
Practically, the resistances R1 = R2 and RP = RN are assigned. If the peak amplitude of the current signal iP is greater than 2IS or |iP| > 2IS, then Equation (12) can be written as
v R C = R P R 3 R 1 i P = ( 1 α Δ T ) k C k R v i n
The primary winding current of the resolver can be determined from the voltage signal vRC. Practically, the parameter kC is normally assigned as 1/kR. The simulation result of the circuit depicted in Figure 2b obtained using the PSPICE analog simulation program is shown in Figure 3, where a sinusoidal signal of 3 kHz with a peak amplitude of 2V is applied as the input signal vin. The parameters of the primary winding LP were measured and modeled from the resolver used in this study. From Figure 3, the phase lag θP occurs between the excitation signal vin and the signal vRC due to the behavior of the resolver. Therefore, the resolver behavior can be approximated by a single-pole expression as
v R C ( s ) v i n ( s ) = ( 1 α Δ T ) k C k R ( T R s + 1 )
for
T R = tan θ P ω e x
where TR is the time constant of the resolver. From Equation (14), the circuit in Figure 2b affected by temperature can be represented by the block diagram shown in Figure 2c, where αR = αkR.

3. Temperature-Compensation Technique

A simple closed-loop configuration to compensate for the temperature effect is shown in Figure 4a, where the subtract-and-sum topology is depicted within the dashed-line frame. The phase-lead compensator in Figure 4a is required to compensate for the phase lag θP of the resolver’s behavior. Therefore, the time constant Tl of the phase-lead network is set to equal the time constant TR for the in-phase condition between the signals vF and vin. From Figure 4a, the closed loop transfer function can be stated as
v F ( s ) = ( 1 + k P ) γ k C k F k R ( 1 + γ k C k F k P k R ) ( 1 + γ T l s ( 1 + γ k C k F k P k R ) ) v i n ( s ) γ α R k C k F k R ( 1 + γ k C k F k P k R ) ( 1 + γ T l s ( 1 + γ k C k F k P k R ) ) Δ T
where kP and kF are the proportional gain and the compensation gain, respectively, and γ is the attenuation factor of the phase-lead compensator. Normally, kC = 1/kR and kF = 1/γ are assigned. If kP >> 1 and γkCkFkPkR >> 1, then Equation (15) can be expressed as
v F ( s ) = ( v i n ( s ) α R k P Δ T ) 1 ( 1 + γ T l s k P )
From Equation (16), the magnitude of the signal vF for vin = VPsin(ωext) can be approximated as
| v F ( j ω ) | = ( V P α R k P Δ T ) [ 1 ( 1 + ( γ T l ω e x k P ) 2 ) ]
From Equation (17), the parameters of γ = 0.1, Tl = 67.63 μs, and ωex = 18.85 krad/s were achieved from experimental implementation. Thus, the denominator of the terms in the square brackets in Equation (17) can be approximated as 1. It is evident that the temperature effect of the primary winding current iP on the resolver can be minimized by increasing the gain value kP. The proposed circuit for the block diagram in Figure 4a is shown in Figure 4b. The block diagram of the sum-and-subtract topology in the dashed-line frame in Figure 4a can be replaced by the dashed-line block SS1 in Figure 4b to minimize the active device used for the experimental implementation.
The proposed circuit consists of three opamps as active devices. The operation of the proposed circuit can be explained as follows: from Figure 4b, the opamp A1 and resistors Rf1 and Rf2 function following the sum-and-subtract scheme to obtain the error signal between the input signal vin and the feedback signal vF. The capacitance CC is employed to avoid unstable sum-and-subtract scheme operation [27]. For a small value of the capacitance CC, the output signal vex of the opamp A1 can be stated as
v e x = v i n + R f 2 R f 1 ( v i n v F ) = v i n + k P ( v i n v F )
Notably, the signal vex is provided as the excitation signal for the resolver. From Equation (18), the signal vex is in sum-and-subtract form, corresponding to the sum-and-subtract topology in Figure 4a. The primary winding current iP is detected by the resistors RP and RN in the form of voltage signals vSP and vSN, respectively. Opamp A2 forms the inverting amplifier to obtain the signal vRC from the vSP and vSN signals. The phase-lead compensator formed by capacitor Cl1 and resistors Rl1 and Rl2 provides the phase lead θL to compensate for the phase lag θP caused by the behavior of the resolver. Opamp A3, the resistors RC1 and RC2, and the variable resistor RV provide the compensation gain kF for the phase-lead compensator. The relationship between the voltage signals vRC and vF in Figure 4b for RC1 = RC2 can be expressed as
v F ( s ) v R C ( s ) = 2 ( s + 1 T l ) β ( s + 1 γ T l ) = γ k F ( T l s + 1 ) ( γ T l s + 1 )
where γ = Rl2/(Rl1 + Rl2) is an attenuation factor, kF = 2/β is a compensation factor, and Tl = Rl1Cl1. The compensation factor kF is set to 1/γ for |vF()| = |vRC()|. Notably, the pole at s = −1/γTl must be far from the left of the zero at s = −1/Tl to prevent phase error at the excitation frequency. Therefore, the factor γ ≤ 0.1 is chosen to assign the location of the pole shifted left from the location of the 0 by at least 1 decade. The phase lead θL in Equation (19) can be stated as
θ L = tan 1 ( ω e x T l ) tan 1 ( γ ω e x T l )
If θL = |θP| is set, then the voltage signal vF and the input signal vin are in phase.

4. Performance Analysis

In practical implementation, a deviation from the ideal performance is caused by the non-ideal characteristic of the devices used in the proposed circuit. The tolerances of the resistors and non-identical supply currents of opamp A1, iSP, and iSN contribute to the amplitude error and the DC offset voltage in the vRC and vF signals. The feedback signal vF, which includes error due to the non-ideal characteristic of the devices used in the circuit in Figure 4b, can be written as
v F = γ 2 R 3 R C 2 R P β R 1 R C 1 ( 1 + ε 1 ) i P + V o f f s e t
for
ε 1 = δ A + δ R
and
V o f f s e t = γ 2 R 3 R C 2 R P ( Δ B + Δ S ) β R 1 R C 1
where δA and δR are the tolerances of the resistors R1, and RP, respectively; ΔB and ΔS are the different currents of the quiescent currents (IB1IB2) and the bias currents of the class-AB output state (IS1IS2) of the opamp A1, respectively; and Voffset is a DC offset voltage. Practically, the resistances in Equation (21) are set to RC1 = RC2, RP = 500 Ω, R1 = 10 kΩ, and R3 = 322.7 kΩ, which were chosen for the tolerance of 0.1% or δA = δR = 0.001. From Equation (21), the error ε1 can be calculated as 2 × 10−3. The effect of the error ε1 can be minimized by tuning the compensation factor kF = 2/β. The different currents ΔB and ΔS are measured from opamp A1 as about 3.8 and 2.1 μA, respectively. Therefore, the offset voltage Voffset can be calculated as 95.2 mV for kF = 1/γ. The offset voltage Voffset can be cancelled by adjusting the voltage VC in Figure 4b to an appropriate value. The tolerance of the resistors in the proposed circuit also induces harmonic distortion in the feedback signal vF for the amplitude of the primary winding current iP varying in the range of ±2IS. The total harmonic distortion (THD) as a percentage of the feedback signal vF for −2IS ≤ iP ≤ 2IS can be expressed as
THD = ( δ A + δ R + δ S ) i P 16 ( 1 + δ A + δ R 2 ) I S × 100 %
where δS = ΔS/IS. From Equation (22), the maximum percentage of THD occurs when the amplitude of the primary winding current |iP| is equal to 2IS. If the class-AB bias current IS of opamp A1 is 1.302 mA, then the THD percentage will be about 0.09%. Notably, the effect of THD can be prevented. The second factor is the unstable operation of the proposed circuit caused by intermodulation distortion (IMD) and phase shift due to the behavior of the opamps. IMD occurs on the vex signal due to the intrinsic pole of the opamp A1. To avoid IMD, a capacitance CC is connected in parallel to the resistance Rf2 to generate the dominant pole for the sum-and-subtract SS1. The dynamic behavior of the opamps A1, A2, and A3, caused by the gain bandwidth product (GBP) and the gains kP and kF, introduces a phase shift in the feedback signal vF. Figure 4c shows a block diagram of the proposed circuit where the dynamic behaviors of the opamps are depicted. The time constants T1, T2, and T3 of the opamps A1, A2, and A3, respectively, depend on the amplification gains and GBPs of each opamp. From Figure 4b, the time constant TC = Rf2CC is obtained. In addition, the corner frequency ωC of the term (TCs + 1)−1 should be assigned in the range of 10ωexωC ≤ 0.1GBP1 to avoid the unstable operation of the proposed scheme. Practically, the time constant TC = (0.1GBP1)−1 is assigned. The time constant Tl = TR is provided to compensate for the phase lag of the primary winding in the resolver structure. The time constants T1, T2, and T3 can be stated as
T 1 = ( 1 + k P ) G B P 1
T 2 = ( 1 + k C ) G B P 2
and
T 3 = ( 1 + k F ) G B P 3
where GBPi is the gain bandwidth product of opamp Ai used in this paper. From Equations (23)–(25), the time constants T1, T2, and T3 are proportional to the value of the gains kP, kC, and kF, respectively. Notably, a high value of kP is used to minimize the temperature effect. In addition, high values of kP and kF cause the proposed scheme to operate unstably. The phase shift caused by the pole at s = −1/T1 should approach 0° at the excitation frequency ωex to avoid unstable operation. Therefore, the time constant T1 is assigned to be less than at least 1 decade for the period of the excitation frequency ωex or T1 ≤ 1/10ωex. From Equation (19), the pole at s = −1/γTl of the phase-lead compensator should be placed to the left of the 0 at s = −1/Tl by more than 1 decade by adjusting the factor γ to prevent phase error. Therefore, the maximum values of the amplification factors kP and kF for maintaining the stable operation of the proposed technique can be expressed as
k P = G B P 1 10 ω e x 1
and
k F = G B P 3 10 ω e x 1
From Equations (26) and (27), the maximum value of kP and kF for the stability condition is 132.33 for ωex = 18.85 krad/s GBP1 = GBP2 = GBP3 = 25.13 Mrad/s. From Equations (23) and (25), the time constants T1 and T3 are calculated as 4.02 and 0.44 μs for kP = 100 and kF = 10, respectively. The compensated gain kC is set to 32.27. Therefore, the time constant T2 can be determined from Equation (24) as 1.32 μs. From Figure 4b, the resistances Rf1 and Rf2 are assigned as 2 and 200 kΩ for the proportional gain kP = 100, respectively. If the time constant TC = Rf2CC is set to 0.1GBP1, about 0.4 μs, then the capacitance CC can be determined as 1.99 pF. The phase shifts θ1, θ2, and θ3 of the poles at s = −1/T1, s = −1/T2, and s = −1/T3, respectively, can be described by
θ 1 = tan 1 [ ω e x ( 1 + k P ) G B P 1 ]
θ 2 = tan 1 [ ω e x ( 1 + k C ) G B P 2 ]
and
θ 3 = tan 1 [ ω e x ( 1 + k F ) G B P 3 ]
For kP = 100, kF = 10, and kC = 32.27, the phases θ1, θ2, and θ3 are −4.33°, −1.43°, and –0.47°, respectively. These phase shifts deteriorate the stability of the proposed technique but can be compensated by increasing the phase θL of the phase-lead compensator. Therefore, the time constant Tl of the phase-lead compensator can be written as
T l = tan ( | θ P | + | θ 1 | + | θ 2 | + | θ 3 | ) ω e x
For θP = −51.89°, the time constant Tl can be determined as 85.3 μs.
In addition, the temperature effect causes deviation of the winding inductance, which is exhibited in the phase shift term φD in the primary winding current. The phase shift φD can be approximated by the first-order pole at s = −1/TD, where TD = (tan φD)/ωex. The effect of phase shift φD in the time constant TD can be included in Equation (17) as
| v F ( j ω ) | = ( V P α R k P Δ T ) [ 1 ( 1 + ( ( γ T l + T D ) ω e x k P ) 2 ) ]
Practically, the time constant TD is much less than the time constant γTl and can be omitted. From Equation (32), the denominator of the term in the square brackets can be approximated as 1, corresponding to Equation (17). Therefore, the performance of the proposed scheme is unaffected by the phase shift φD.

5. Experimental Results

The proposed technique was implemented using commercially available devices. The opamps used in this study were LF351 for opamp A1 and LF353, comprising two opamps in the same package for opamps A2 and A3, where LF351 and LF353 provide a GBP of 25.13 Mrad/s. The measured average values of the currents IB, IS, ΔB, and ΔS for opamp A1 were 2.39 mA, 1.3 mA, 3.8 μA, and 2.1 μA, respectively. The passive devices were chosen as R1 = R2 = 10 kΩ, RC1 = RC2 = 30 kΩ, Rf2 = 200 kΩ, Rf1 = 2 kΩ, RP = RN = 500 Ω, CC = 2 pF, and a variable resistor Rv = 1 kΩ. All resistors used in the proposed circuit were selected for having a tolerance of 0.1%. The power supply was set to ±12 V. The resolver used to demonstrate the performance of the proposed technique was a SANYO 101-4100 with a transformation factor kRS of 0.37. The excitation signal was assigned as a 3 kHz sinusoidal wave with 2 V peak amplitude. The load resistors RL1 and RL2 for the resolver were assigned as 100 kΩ. The impedance of the resolver including the impedance of the secondary side referred to the primary side was measured from the primary winding using a HIOKI 3532-50 LCR meter as 16.135 kΩ at room temperature (25 °C). Therefore, the conversion factor kR was determined as 61.977 × 10−6 A/V. From Equation (13), the factor kC = 1/kR = 16.135 × 103 V/A was set. Therefore, the resistor R3 of Equation (13) was determined as 322.7 kΩ for RN = RP = 500 Ω and R1 and R2 = 10 kΩ. The variable resistor was used for the resistor R3 to achieve 322.7 kΩ. The circuit in Figure 2b was used to determine the dynamic behavior of the resolver.
Figure 5 shows the measured result of the phase shift between the signal vin and the primary winding current represented by the signal vRC. From Figure 5, the phase lag θP between signal vin and signal vRC was measured as 51.98° at a room temperature of 25 °C. Therefore, the primary winding impedance including the impedance of the secondary side referred from the primary side can be provided in polar form as 16.135 kΩ ∠ −51.98°. The time constant TR representing the dynamic behavior of the circuit in Figure 2b was calculated from Equation (14) as 67.63 μs. From Figure 4b, the time constant Tl = TR was assigned to compensate for the phase lag due to the total impedance of the resolver. The attenuation factor γ = 0.1 was chosen in this experiment. Subsequently, γTl = 676 μs was obtained. The resistances Rl1 and Rl2 were determined as 6.76 kΩ and 676 Ω, respectively, for Cl1 = 0.01 μF. In this experiment, the resistances Rl1 and Rl2 were chosen as 6.8 k and 680 Ω, respectively. Therefore, the attenuation factor γ was recalculated as 0.09. The feedback gain kF was determined as 11.11 by adjusting the variable resistor Rv. The operation environment of the resolver in this experiment was a chamber capable of varying the temperature from 25 to 70 °C. The shaft angle θS of the resolver was set to 45° to obtain equal amplitudes of the secondary winding signals vS1 and vS2. The experimental setup and the prototype of the proposed circuit in Figure 4b are shown in Figure 6a and 6b, respectively.
If phase θP of the primary winding current at 25 °C is set as a phase reference, the phase shift φD of the primary winding current shift from the phase reference θP can be seen in Figure 7 for the variations in the ambient temperature from 25 to 70 °C. From Figure 7, the maximum value of the phase shift φD at 70 °C is about 1.78°, which corresponds to the time constant TD = 1.649 μs. The time constant γTl = 676 μs is much larger than the time constant TD. Notably, the effect of the phase shift φD on the circuit performance is insignificant and can be neglected.
The phase shift φD can be inferred from the change in the resolver inductance. From Figure 7, the variation in the ambient temperature had little influence on the winding inductance of the resolver, in agreement with a recently reported approach [25]. The measured result of the primary winding current in Figure 2a, represented by the signal vRC versus the variation in the ambient temperature, is shown in Figure 8a, which was used to determine the temperature coefficient α of the resolver. The temperature coefficient α of the resolver in the term of αR was approximated from the signal vRC as −1.71 mV/°C for a 2 V peak amplitude of the excitation signal. The temperature effect on the secondary winding signals vS1 and vS2 was also measured as shown in Figure 8b. The percentage error for this experimental result can be described as
p e r c e n t a g e e r r o r = | e x p e c t e d v a l u e - m e a s u r e d v a l u e | e x p e c t e d v a l u e × 100 %
As shown in Figure 8a,b, the magnitude of signals vRC, vS1, and vS2 decreased with increasing ambient temperature. The percentage errors at 70 °C of the signals vRC, vS1, and vS2 were 3.728%, 1.463%, and 1.44%, respectively. These errors are too high for precision control systems. Therefore, the resolvers require temperature compensation. From Figure 8b, the effect of temperature variation on the resolver signal vS2 was the same as on the resolver signal vS1. Therefore, only the resolver signal vS1 was used to demonstrate the performance of the proposed technique.
The prototype board in Figure 6b was connected to the resolver for the investigation of the circuit’s performance, where the operation environment of the resolver was the same as in the above-described experiment. The experimental results for both signals vRC and vS1 in terms of percentage error are provided in Figure 9a,b, respectively. Figure 9a,b show that the errors of the signal vRC and the resolver signals were significantly reduced. Figure 9c depicts the waveform of the excitation signal vex and the signal vF for an ambient temperature of 70 °C. The signals vex and vF were in phase. From Equation (32), the time constant TD was weighted by the proportional gain kP. Therefore, the performance of the proposed circuit was independent of the time constant TD or the phase shift φD. As shown in Figure 8a and Figure 9a, the percentage error of the primary winding current represented by the signal vRC could be minimized from 3.728% to 0.043% at 70 °C. Additionally, the percentage errors of the resolver signal vS1 in Figure 8b and Figure 9b could be reduced from 1.463% to 0.017%. Obviously, the accuracy of the resolver was improved more than 100-fold using the proposed technique. These experimental results confirm that the proposed circuit provides high-quality performance and offers advantages due to a small and simple circuit configuration. In addition, the proposed circuit can be placed between the resolver and a commercial signal conditioner without disturbing the operation of the system.

Author Contributions

Conceptualization, V.R.; methodology, W.P. and A.R.; validation, V.R., W.P., K.S. and A.R.; writing—original draft preparation, W.P.; writing—review and editing, W.P. and A.R.; visualization, K.S. and A.R.; supervision, V.R. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Principle of the functioning of the resolver.
Figure 1. Principle of the functioning of the resolver.
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Figure 2. (a) Opamp equivalent circuit; (b) opamp supply-current sensing technique; (c) block diagram of primary winding current extraction including the temperature effect.
Figure 2. (a) Opamp equivalent circuit; (b) opamp supply-current sensing technique; (c) block diagram of primary winding current extraction including the temperature effect.
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Figure 3. Simulation result of Figure 2b.
Figure 3. Simulation result of Figure 2b.
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Figure 4. (a) Principle of the temperature-compensation technique; (b) the proposed circuit; (c) block diagram of the proposed circuit.
Figure 4. (a) Principle of the temperature-compensation technique; (b) the proposed circuit; (c) block diagram of the proposed circuit.
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Figure 5. Measured result of signals vRC and vin.
Figure 5. Measured result of signals vRC and vin.
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Figure 6. (a) Experimental setup; (b) prototype of the proposed circuit.
Figure 6. (a) Experimental setup; (b) prototype of the proposed circuit.
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Figure 7. Measured result of phase shift φD.
Figure 7. Measured result of phase shift φD.
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Figure 8. Measured results and percentage errors of resolver signals; (a) voltage signal vRC; (b) resolver signals vS1 and vS2.
Figure 8. Measured results and percentage errors of resolver signals; (a) voltage signal vRC; (b) resolver signals vS1 and vS2.
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Figure 9. Percentage errors of resolver signals with temperature compensation using the proposed technique: (a) voltage signal vRC; (b) resolver signal vS1; (c) waveform of signals vex and vF.
Figure 9. Percentage errors of resolver signals with temperature compensation using the proposed technique: (a) voltage signal vRC; (b) resolver signal vS1; (c) waveform of signals vex and vF.
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MDPI and ACS Style

Petchmaneelumka, W.; Riewruja, V.; Songsuwankit, K.; Rerkratn, A. A Temperature-Compensation Technique for Improving Resolver Accuracy. Sensors 2021, 21, 6069. https://doi.org/10.3390/s21186069

AMA Style

Petchmaneelumka W, Riewruja V, Songsuwankit K, Rerkratn A. A Temperature-Compensation Technique for Improving Resolver Accuracy. Sensors. 2021; 21(18):6069. https://doi.org/10.3390/s21186069

Chicago/Turabian Style

Petchmaneelumka, Wandee, Vanchai Riewruja, Kanoknuch Songsuwankit, and Apinai Rerkratn. 2021. "A Temperature-Compensation Technique for Improving Resolver Accuracy" Sensors 21, no. 18: 6069. https://doi.org/10.3390/s21186069

APA Style

Petchmaneelumka, W., Riewruja, V., Songsuwankit, K., & Rerkratn, A. (2021). A Temperature-Compensation Technique for Improving Resolver Accuracy. Sensors, 21(18), 6069. https://doi.org/10.3390/s21186069

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