A High Frequency Multiphase Modular Hybrid Transformerless DC/DC Converter for High-Voltage-Gain High-Current Applications

Abstract

In order to meet the demands of desirable efficiency, transformerless DC/DC equipment with great voltage step-down are inevitable needed. This research offers a unique type of high-frequency, high-voltage-gain DC/DC converter, which comprises a switched capacitor (SC) converter and a buck converter. Thanks to the transformation of a two-stage converter to a single-stage converter, it has a considerable ratio of step-down voltage transformation and a reasonable duty cycle. In addition, it can permit low voltage stress on the switches. The simple control method and easy driving circuit implementation makes it scalable for high-power-level devices. Low cost can be realized as fewer components are needed. Under all operational circumstances, total soft-charging and low equipment voltage stresses are accomplished. Compared to those classic high-voltage-gain converters, the proposed converter exhibits merits of higher efficiency, higher flexibility, lower ripples, and lower costs. A comprehensive analysis is carried out for the converter’s steady-state operations. With a 1 MHz switching frequency, a 900 W prototype of a 20-time converter is constructed, with a peak efficiency of 92.5%. Simulations and experiments verify the effectiveness of the theoretical investigation of the converter’s operation.

1. Introduction

In an inter-grid scenario with a lot of distributed generation (DG), the traditional power grid architecture, which is made up of numbers of power stations, transmission, and distribution networks, will be displaced by a number of microgrids [1]. For instance, DC microgrids are well used in car, airplane, data center, and boat systems [1,2,3,4,5,6,7]. In many applications, a DC bus is used to distribute power so that lighting systems, motor drives, and devices that store energy can work together. A high-gain converter is needed to ensure that the DC voltage buses feed low-voltage loads, such as those in records centers, in a way that is both efficient and good for the power quality.

Step-down conversion is often carried out using DC/DC buck converters since they have fewer active switches and passive components. However, for high-duty cycle operation, the energy efficiency of the converter decreases substantially. Traditional buck DC/DC converters have a limited voltage gain as they lose a lot of power when the voltage goes very high [4,5]. They are not good for applications that need a lot of voltage gain. To get a huge voltage gain, a two-stage converter consisting of two cascaded buck converters has been suggested [8]. To stop the beat-frequency effect, a set of controllers that work together would have to be used to control the active switches. The controller’s design would become more challenging as a result [8]. Additionally, if the input voltage and load value vary, instability is quite probable [9].

The switched capacitor (SC) converter belongs to a non-isolated DC/DC converter that may boost voltage while preserving efficiency [10,11,12,13,14,15,16,17,18]. SC converters without magnetic components would be tiny and powerful. Dickson, Fibonacci (FIB), series–parallel, and other high-voltage-gain SC converters have been studied previously [19,20,21,22,23,24,25,26,27]. Generally, the SC converter cannot achieve both high efficiency and sufficient line and load regulation [28,29,30,31]. Efficiency will suffer greatly if precision control is sought [28,29,30]. A two-stage DC/DC converter may improve control and voltage gain. The standard buck converter is utilized in the second stage, owing to regulatory considerations and the necessity for high-voltage-gain with few components. Additionally, multi-phase buck converters may provide a significant current capacity for high-power applications. The regulation issue is often solved and voltage gain is increased by using two-stage DC/DC conversion [32]. Figure 1 depicts the system diagram for this two-stage converter topology. A multiphase buck converter with regulation makes up the second stage, whereas the first stage is made up of an uncontrolled SC converter. Most of the high-voltage-gain is produced by the first-stage converter, while precise control is produced by the second stage. The design has two downsides, despite its advantages: (a) the two-stage design has a larger bill of materials (BOM) cost since it has more circuit components; and (b) the efficiency may drastically decrease with two switching stages and large switching losses by the relative components.

For high-voltage and high-current devices, a hybrid transformerless DC/DC converter with great efficiency is discussed in this article. With substantially less switches as well as y control. It has a reasonable duty cycle, and low cost because it combines a two-stage into one stage, which minimizes the number of components needed. To reduce current ripple, the recommended converter employs interleaving control. The principle of the suggested converter is validated, and the improved performance is shown in both simulations and experiments. Fair comparisons among the proposed converter and other popular single-stage converters are given in

Table 1. Comparisons among different single-stage converters.

The Converter Topology in	Voltage Gain (Times)	Output Power (W)	Switching Frequency (kHz)	Peak Efficiency (%)
[33]	15	2000	100	90
[34]	15	2000	100	92
[35]	16.6	100	100	90
[36]	16.6	300	100	92.5
Proposed	20	900	100	92.5

. Here, the star symbols (i.e., “*”) indicate the polarities of the transformer. It is exhibited that even with a larger voltage gain, the suggested circuit can implement a higher efficiency.

2. Operation Principle and Configuration for the Designed DC/DC Converter

This section describes the suggested DC/DC SC-buck converter’s system architecture and modular design. The suggested converter’s operating theory is then described.

2.1. System Topology and Modular Scheme

The suggested SC-buck converter is depicted in Figure 2. On the basis of the aforementioned theories, some assumptions are completed first.

• Each switching component in the recommended converter is perfect.
• Voltage variation between the capacitors is ignored; therefore, all capacitors have ideal values to maintain virtually constant holding voltages throughout operation. As a result, the capacitors are assumed as ideal voltage sources.
• The dead-time between activating one switch and deactivating a complimentary switch is minimal compared to the conduction time of each switch, and may therefore be ignored. The dead-time is excluded from the examination of circuit structure in order to make it simpler.
• Every switch within the modules has equal switching frequency while the suggested converter is working in steady-state.

The suggested M-phase converter contains N programmable modules of SC-buck circuits in each of its phases. With the exception of the first module, which is devoid of a flying capacitor, C_B0, each phase is made up of two complementary MOSFETs, a flying MOSFET Φ_i ($i=0, 1, 2, \dots ,-1$) and a bottom MOSFET $\overline{{\Phi }_i}$ ($i=0, 1 ,2, \dots ,N-1$), a flying capacitor C_B(i) ($i=1, 2, \dots , N-1$), and an input capacitor C_i ($i=0, 1, 2, \dots ,N-1$). The design of each module in the proposed converter’s switched-capacitor-buck circuit is shown in Figure 3.

The proposed converter’s input and output voltages are represented by v_IN and v_OUT, respectively; the inductor currents on L_i ($i=0, 1,2, \dots ,N-1$) and the voltages acros C_B(i) ($i=1, 2, \dots ,N-1$) are represented by i_Li ($i=0, 1, 2, \dots ,N-1$) and v_B(i) ($i=1, 2, \dots ,N-1$). Additionally, $\overline{d_i}$ ($i=0, 1, 2, \dots ,N-1$) is used to denote the duty ratios of the MOSFETs. The bottom MOSFETs’ complementary duty ratios d_i ($i=0, 1, 2, \dots ,N-1$) are shown as ${\Phi }_i$ ($i=0, 1, 2, \dots ,N-1$). Evidently, $d_i+\overline{d_i}=1$.

The steady-state functioning of L_i ($i=0, 1 ,2 , \dots ,N-1$) is given by the following expressions to achieve voltage-second balance.

$$\left\{\begin{array}{c}{V}_{\mathrm{OUT}}=\left[V_{\mathrm{B}\left(i+1\right)}-V_{\mathrm{B}\left(i\right)}\right]\\ V_{\mathrm{B}\left(N\right)}=V_{\mathrm{IN}}\\ V_{\mathrm{B}0}=0\end{array}\right. \left(i=0,1,2,\dots ,N-1\right)$$

(1)

On the basis of (1), the voltage gain M can be obtained as

$$M=\frac{V_{\mathrm{OUT}}}{V_{\mathrm{IN}}}\left(i=1,2,3,\dots ,N\right)$$

(2)

To achieve charge equilibrium across all C_B(i), the following expression is derived:

I_L0D₀ = I_L1D₁ = I_L2D₂ = I_L(N−1) D_N−1

(3)

According to (3), each inductor’s steady-state current will be the same because the flying MOSFET’s duty ratios are equal.

The benefits that the modular design can reduce the intricacy of the power converter system and provide uniform thermal distribution are realized in the majority of applications by spreading the inductor currents evenly. It is desirable for the converter to maintain a constant temperature throughout with no hot areas. This means that all devices will experience the same power stress distribution. It allows the converter to provide the most power at the required temperature.

Consequently, the duty ratios, D_i, of each flying MOSFET are all adjusted to the same value.

D₀ = D₁ = D₂ = … = D_N−1 = D

(4)

where D stands for the flying MOSFETs’ consistent duty ratio to ensure equitable current sharing.

Substitute (4) into (1) and (2),

$$M=\frac{V_{\mathrm{OUT}}}{V_{\mathrm{IN}}}=\frac{D}{N}\left(i=1,2,3,\dots ,N\right)$$

(5)

The M in (5) is equivalent to that of an N-phase buck converter with a N:1 ratio SC converter that is duty-cycle-regulated. It should be noted that the duty ratios are designed for the proposed circuit operating at the continuous current mode (CCM).

2.2. Operating Principle

The duty cycle should be near to 1/2 for optimal efficiency in typical buck converters [4]. Based on the design procedure in [33], both the maximum and lowest duty cycles must be constrained to optimize the converter in terms of efficiency, cost, and size. Consequently, the value of N can be obtained from (5). In this research, a three-phase converter with four modules in each phase is used to show the working concept.

Figure 4a depicts the converter in steady-state operation with three phases and four modules working in each phase. The flying MOSFET 0 and 2 are controlled by signal PWM-1, while MOSFET 3 and MOSFET 4 are controlled by PWM-2 that is in reverse phase with PWM-1. The converter’s matching timing diagram is depicted in Figure 4b. In Figure 4a, the converter is shown operating in three phases, with four modules operating in each phase as it would in a typical situation. Signal PWM-1 is in charge of controlling the flying MOSFETs 0 and 2. Signals in PWM-2 that are out of phase with PWM-1 are used to control components 3 and 4. Figure 4 displays the suggested converter’s timing diagram, b.

The switches controlled through PWM-1 will “ON”, whereas the switches controlled through PWM-2 will “OFF” in state I. Consequently, the switches controlled through the complement of PWM-1 will “OFF” and the switches controlled through the complement of PWM-2 will “ON”. According to Figure 5a, V_IN charges the C_OUT and the C_B2 through L₁ and L₃, respectively. For C_B2 and C_OUT, respectively, C_B1 and C_B3 are simultaneously discharged. Meanwhile, V_IN charges L₀ and L₂, storing energy in L₀ and L₂. The voltage on C_OUT powers the load.

Every switch controlled through PWM-1 will “OFF” and every switch controlled through PWM-2 will “ON” in state II. Consequently, the switches operated by PWM-1’s complement will “ON,” while the switches operated by PWM-2’s complement will “OFF.” According to Figure 5b, C_B1 and C_B3 are charged by the V_IN via L₀ and L₂. The load and C_B3 are being concurrently discharged by C_OUT and C_B2, respectively. While this is happening, V_IN charges L₁ and L₃ and stores energy in them.

All switches under PWM-1 control will “OFF”, while the switches under PWM-2 control will “OFF” in state III. The switches that are controlled by PWM-1 and PWM-2’s complementary are therefore “ON”. The flying capacitors do not charge or discharge, since all of the flying MOSFETs are deactivated. V_IN charges and stores energy in inductors L₀–L₃. The simultaneous supply of the load by the voltage on C_OUT is shown in Figure 5c.

The following equations are deduced based on (4) and the assumption that all flying MOSFETs’ duty ratios D_i ($i=1, 2, 3$) are set to be the same to D in order to realize an equitable current sharing condition across L₀–L₃.

$$\left\{\begin{array}{c}{V}_{\mathrm{B}1}D=V_{\mathrm{OUT}}\\ \left(V_{\mathrm{B}2}-V_{\mathrm{B}1}\right)D=V_{\mathrm{OUT}}\\ \left(V_{\mathrm{B}3}-V_{\mathrm{B}2}\right)D=V_{\mathrm{OUT}}\\ \left(V_{\mathrm{IN}}-V_{\mathrm{B}3}\right)D=V_{\mathrm{OUT}}\end{array}\right.$$

(6)

Therefore, (6) can be rewritten as

$$\left\{\begin{array}{c}{V}_{\mathrm{OUT}}=\frac{D}{4}{V}_{\mathrm{IN}}\\ V_{\mathrm{B}1}=\frac{1}{4}{V}_{\mathrm{IN}}\\ V_{\mathrm{B}2}=\frac{2}{4}{V}_{\mathrm{IN}}\\ V_{\mathrm{B}3}=\frac{3}{4}{V}_{\mathrm{IN}}\end{array}\right.$$

(7)

Based on (7), C_B(i) ($i=1,2,3$) throughout this converter owns an offset voltage V_B(i) ($i=1,2,3$) that resembles that of conventional converters.

According to (7), the steady-state voltage gain M with N = 4 is obtained as

$$M=\frac{V_{\mathrm{OUT}}}{V_{\mathrm{IN}}}=\frac{D}{4}$$

(8)

which matches (2) when N equals to 4.

In line with the operating principle illustrated above, each flying capacitor is continually softly charged/discharged, efficiently mitigating the loss made by the flying capacitors’ voltage ripple owning to the converter’s hybrid architecture, which interconnects the buck inductor with the SC stage. In conventional SC-based converters, this crucial function will prevent the inrush current. This eliminates the charge-sharing losses that normally occur during charging. Because of this, the hybrid converter proposed here will always be gently charged, no matter the tolerance of the flying capacitors.

2.3. Interleaving Procedure

With the right gate driving signal control, 360/4 interleaving between each module of the suggested converter might be put into practice. The timing diagram of the gate signals of Φ_i ($i=0, 1 ,2 ,3$) is shown in Figure 6. This circuit combines a four-module switching capacitor converter with a standard four-phase interleaved buck converter. This may lead to the cancellation of four-phase current ripple and a significant decrease in current ripple. As a result, the current stress on the capacitors may be mitigated, and it would be possible to avoid using the enormous capacitor bank that is often needed to buffer the substantial current ripple. The corresponding current and voltage stresses for the switches are provided in

Table 2. Voltage and current stresses of the switches.

Power Switches	Voltage Stress	Current Stresss
ΦN−1	(VOUT/N)	Peak of IL(N−1)
Φi (i = 0, 1, …, N−2)	2(VOUT/N)	Peak of ILi (i = 0, 1, …, N−2)
$\overline{{\Phi }_i }$(i = 0, 1, …, N−1)	(VOUT/N)	Peak of ILi (i = 0, 1, …, N−1)

.

2.4. Circuit Design and Optimization

Switching frequency, the number of modules in the converter, maximum output current, input voltage, and output voltage are the key parameters that need to be specially designed for optimizing the layout of the circuit.

The inductance of the inductor for each module can be calculated using

$$L=\frac{V_{\mathrm{IN}}\cdot \left(1-D\right)}{\mathsf{\Delta }{I}_L\cdot f_s}$$

(9)

where the inductor current ripple is $\mathsf{\Delta }{I}_L=\alpha \cdot I_{O_{MAX}}$ and α is typically 0.2 or 0.3.

The capacitance of the flying capacitor for each module is derived using

$$C=\frac{I_{O_{MAX}}\cdot D}{\mathsf{\Delta }{V}_C\cdot N\cdot f_s}$$

(10)

where $\mathsf{\Delta }{V}_C$ is the voltage ripple across the flying capacitors. The capacitances are determined by the switching frequency, load current, duty cycles of the flying active switches, number of modules, and desired voltage ripples. The voltage ripples are required to be controlled at the lowest level for high efficiency.

For the power switches, the maximum voltages are obtained through a scaling function of N. All switches’ current rating are obtained by the peak value of their inductor currents.

3. Simulation and Experimental Verifications

First, simulation was finished to confirm the facticity of the suggested converter in interleaved operation.

Table 3. Main parameters of the simulation as well as hardware.

Depiction	Symbols	Values
Inductor	L0–L3	0.2 µH
Flying Capacitor	CB1–CB3	47 µF
Resistor Load	ROUT	6.95 mOhm
Output Voltage	VOUT	2.4 V
Output Power	POUT	900 W
Input Voltage	VIN	48 V

displays the simulated parameters. The proposed converter is regulated in the reverse mode. The input voltage of the prototype is 2.4 V, while the output voltage is 48 V, which is a typical DC bus voltage for low-voltage DC microgrids. Figure 7a represents the full-load current waveforms of L₁–L₄. The voltage waveforms of the capacitors C_B1–C_B3 are shown in Figure 7b. The average voltages on C_B1–C_B3 are 12 V, 24 V, and 36 V, respectively, with an output voltage of 48 V, as anticipated in (7). Figure 7c shows the input current and output voltage at full load. The voltage across FET Φ₁ and $\overline{{\Phi }_1}$ is also processed, as shown in Figure 7d. Based on Table 3, the highest voltage stress for FET ${\Phi }_i$ (i = 0, 1, 2) is 24 V. The highest voltage stress for FET $\overline{{\Phi }_i}$ (i = 0, 1, 2, 3) and Φ₃ is 12 V.

A prototype of the suggested hybrid DC/DC converter was built with M = 3, meaning three phases were active, and N = 4, meaning four modules were activated in each phase (see Figure 8). The hardware prototype consists of three stages. The power rating of each phase equals to 300 W, and V_OUT equals to 2.4 V; thus, the output current of each phase equals to 125 A. Each step of the prototype model consists of four parts. With an output voltage of 2.4 V, each module’s flying capacitors and power inductor will carry around 31 A of current, while each module’s power inductor will carry about 31 A of current. Three different types of components are used: (a) power MOSFETs, (b) inductors, and (c) capacitors. Three PCB boards, such as a DSP control board, a power stage board, and a signal processing board, are used in each step of the setup. The power stage board also comprises six components. The board can function in a four-module configuration when four modules are active and two are deactivated. A complete list of the parts used in the setup is provided in

Table 4. Components for the prototype.

Depiction	Part#
Inductor	744323020 (0.2 µH)
Level Shifter	ADUM5240
Switching Device	BSC009NE2LS5
Gate Driver	LTC4440
Flying Capacitor CB1	C3216X7R1H475K160AC
Flying Capacitor CB2	C3216X7R1H475K160AC
Flying Capacitor CB3	C3216X7R1H475K160AC
Digital Controller	TMS320F28335

. The DSP TMS320F28335 is used to build the digital closed-loop controller. BSC009NE2LS5 MOSFETs are being used. The MOSFET has a turn-on resistance of less than 1 mΩ and a rated voltage of 30 V. The drivers and control logic circuitry of the MOSFET would be further manufactured and combined onto a semi-conductor chip to provide a more desirable way. The required ripple voltage, the flying active switches’ duty cycle, the number of modules, and the output current at full-load frequency all affect the flying capacitor’s capacitance. Voltage ripple should be as little as feasible to maximize efficiency. The efficiency of the flying capacitor will be enhanced by its own value. The capacitances of the flying capacitors are 47 µF, with the ripple of the peak-to-peak capacitor voltage being lower than 1 V. Flying capacitors may be thought of as a continuous voltage source/sink because of their low voltage ripple in comparison to their DC value. Electrical properties like input impedance, power losses, etc., are often connected with capacitance levels in the most of DC-DC converters. To produce less voltage ripple than DC flying capacitors, Class-II multilayer ceramic capacitors (MLCCs) with low equivalent series resistance (ESR) would be adopted. Additionally, to achieve a higher power density, class-II MLCCs sometimes provide a high capacitance per unit area. The flying capacitors employed in this setup are Class-II (e.g., X7R, X6S, etc.) MLCC capacitors. More capacitors should be added in parallel if the current rating of the selected capacitor is insufficient. For this setup, ten 4.7 µF MLCCs in parallel connection are adopted for each module, and the total capacitance is 47 µF. The current grade for every MLCC equals 4 A. The size of the MLCC piece is 0.6 mm × 0.3 mm. According to the operating principle of our suggested design, because of the hybrid design of the suggested converter, which connects the buck inductor to the SC stage, each flying capacitor can be softly charged/discharged during all operating periods. In conventional switched capacitor-based converters, this crucial characteristic will prevent the inrush current. Therefore, complete soft-charging functioning and low device strains are accomplished under all working circumstances.

In general, the current ratings of all power MOSFET switches may be derived from the peak inductor current. In reality, all switch current ratings are identical to power inductor current values. The power MOSFET utilized in the experimental setup is manufactured by Infineon and has the component number BSC009NE2LS5. The device’s current flow under full load is substantially less than the maximum continuous drain current of 100 A. Full load current may flow via this MOSFET. This power MOSFET is put in a 4 mm × 4 mm package to power both the bottom and flying MOSFETs. The size of power MOSFETs may be decreased via system integration by further combining a pair of flying MOSFETs and a bottom MOSFET into a single package (which is not shown here to illustrate the concept). The prototype power inductor is a Wurth part with part number 744323020, based on the current that each module’s power inductor conducts. The saturation current of the inductor equals 52 A, which is a lot larger than its peak current. Its dimensions are 10.2 mm by 10.2 mm (with a height equal to 5 mm). The test condition and the simulation condition are the same, as shown in Table 3.

Figure 9 illustrates the observed waveforms of the current and voltage. Figure 9a illustrates the observed PWM signals of Φ_i ($i=0, 1, 2, 3$), and Figure 9b represents the observed waveforms of the output voltage and capacitor voltages C_B1–C_B3. As demonstrated, the voltage on C_B1 is 12 V, C_B2 is 24 V, and C_B3 is 36 V, which corresponds to the previous analysis. Figure 9c illustrates the current waveforms flow through L₀–L₃ under full load conditions (i.e., 900 W for 3 phases). The observed drain-to-source voltage’s waveforms for Φ₁ and $\overline{{\Phi }_1}$ are shown in Figure 9d. The aforementioned findings indicate that the suggested converter can realize a four-phase interleaved operation.

The observed efficiency of the suggested converter switching at 1 MHz while operating in interleaved mode is shown in Figure 10. The input/output voltage are observed through the fluke multimeters under the high-resolution mode to achieve the most accurate results. The output current is tested with programmable chroma loads. The converter’s measured maximum efficiency is 92.5%, as depicted in Figure 10.

Similar investigations were also conducted for the suggested circuit with N = 5. Four modules are with the load conditions in Table 3, and one module is load-free. The switching signals of the four modules with loads are shown in Figure 11a, while the switching signals of the rest module are shown in Figure 11b. The corresponding waveforms of V_OUT, I_OUT, and V_DS for Φ₁ are presented in Figure 12.

4. A Comparison for Several Types of High-Voltage-Gain-Converters

Adopting two-stage DC/DC conversion is one common method for achieving high-current capacity, high-voltage-gain, and appropriate regulation all at the same time, as was previously described. Figure 13a shows a typical two-stage system for high-current and -power applications. A four-phase buck converter is formed as the first stage, while the second is a switched-capacitor converter with a 4:1 ratio. For applications requiring high-voltage-gain, this two-stage converter is often employed. Compared to single-phase buck operation, four-phase buck operation can achieve precise regulation with rapid reaction and readily manage high-power and high-current strains. Figure 13b shows the suggested converter acquiring the same voltage gain and power rating as the two-stage method to allow for a fair comparison. Given the same voltage gain and power rating, the two-stage system has eighteen active switches in each phase, while the suggested hybrid converter has eight active switches in each phase. All switches from the SC converter stage can be saved, resulting in a low BOM cost. With just one switching stage and fewer switching devices needed, the suggested converter may also achieve substantially greater efficiency with only one set of active switches and lower switching losses. In addition,

Table 5. Comparisons for the high-voltage-gain converters.

Converter in	Voltage Gain (Times)	Scalability	Switching Frequency (kHz)	Peak Efficiency (%)
[33]	20	Poor	1000	90%
Cascaded multi-phase buck	20	Medium	1000	91.7%
Proposed	20	Very good	1000	92.5%

compares the performance of the suggested converter to converters from earlier stages. The recommended converter is proven to have a higher efficiency with the same voltage gain.

5. Conclusions

In this work, a novel class of high-frequency transformerless converters is presented for high-efficiency applications that need high-voltage step-down ratios. The characteristics can be summarized as follows.

• A high-voltage step-down ratio that is adjustable and has a medium duty cycle.
• High efficiency due to the employment of low-voltage, high-powered switching devices and the smaller number of MOSFETs in the single merging stage, making it suitable for high-frequency operation.
• Due to the interleaved operation, there is no pulsing current and minimal current ripple.
• The total cost is relatively low because of the hybrid design using less MOSFETs and the integration of two-stage converters to single-stage converters.
• Inherent modularity and scalability for high-power applications.
• Mitigation current and voltage spike issues and electro-magnetic interference (EMI) concerns as a result of the flying capacitors’ soft-charging action.

The research analyzes the recommended converter’s steady-state performance. A 48 V to 2.4 V, 900 W converter system was created to illustrate the benefits of the recommended topology. The highest efficiency was 92.5 percent. The validity of the theoretical analysis was determined by simulation and experimentation. Applications needing a high-current, high-voltage-gain, and high-power hold a lot of potential for the recommended converter. The suggested hybrid converter may therefore be used in power conversion applications.