Archimedes Optimization Algorithm Based Selective Harmonic Elimination in a Cascaded H-Bridge Multilevel Inverter
Abstract
:1. Introduction
2. Cascaded H-Bridge Multilevel Inverter
3. Archimedes Principle
4. Archimedes Optimization Algorithm
4.1. Algorithm Steps
4.1.1. Initialization
Volumes and Densities Update
Density Factor and Transfer Operation
Collision between the Object (Exploration Phase)
4.1.2. No Collision between the Object (Exploitation Phase)
Normalize Acceleration
Position Update
Evaluation
5. Archimedes Optimization Algorithm Implemented in Selective Harmonic Elimination
- Wide converter bandwidth and High voltage gain.
- Low switching frequency to fundamental frequency ratio.
- Lower-order harmonics elimination, with external line filtering networks, which results in no harmonic interference or resonance, frequently found in inverter power supplies.
- Filtering requirements are minimal
- Performance metrics that can be optimized for various areas of quality, such as voltage/current THD.
- To take use of circuit topology, low switching losses with good harmonic control and the capacity to eliminate triple harmonics in a three-phase system are required.
5.1. Calculations of Switching Angles
5.2. Formulation of the SHE Problem
6. Simulation Results
THD Comparison
7. Hardware Results
8. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Data Availability Statement
Acknowledgments
Conflicts of Interest
References
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S. No. | Parameters/Components | Specifications | No. of Components |
---|---|---|---|
1. | Voltage Source (DC) | 180 V, 60 V | Two |
2. | Carrier wave frequency | 1 kHz | One |
3. | Reference signal frequency | 50 Hz | One |
4. | Insulated-Gate Bipolar Transistor (IGBT) | Resistance (Internal) = 110−3 Ω Resistance (Snubber) = 110−5 Ω Capacitance (Snubber) Cs = 0 | Eight |
5. | Load | L = 4510-3H, R = 400 Ω | RL & R type |
Sl. No. | Genetic Algorithm | Differential Evolution | Archimedes Optimization Algorithm (AOA) |
---|---|---|---|
1 | Population = 40 | Population = 40 | Population = 40 |
2 | Mutation Rate = 0.01 | Mutant Factor = 0.01 | , |
3 | Crossover Rate = 0.6 | Crossover Rate = 0.6 | u = 0.9 and l = 0.1 |
S. No. | Components/Parameters | Specifications |
---|---|---|
1. | Insulated-Gate Bipolar Transistor (IGBT) (8) | FGA25N120ANTDTU |
2. | IGBTs Driver circuit | TLP 250, ±12 V, 1 A |
3. | DSP Board | TMS320F28379D (Texas Instruments) |
4. | Digital Storage Oscilloscope | TPS2024 (Tektronix) |
5. | Power Supply (Two) | 0–15 Volts |
6. | Resistive load | 400 Ω |
7. | Inductive load | 500 mH |
8. | Frequency (Switching) | 1 kHz |
9. | Frequency (Fundamental) | 50 Hz |
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Khan, R.A.; Farooqui, S.A.; Sarwar, M.I.; Ahmad, S.; Tariq, M.; Sarwar, A.; Zaid, M.; Ahmad, S.; Shah Noor Mohamed, A. Archimedes Optimization Algorithm Based Selective Harmonic Elimination in a Cascaded H-Bridge Multilevel Inverter. Sustainability 2022, 14, 310. https://doi.org/10.3390/su14010310
Khan RA, Farooqui SA, Sarwar MI, Ahmad S, Tariq M, Sarwar A, Zaid M, Ahmad S, Shah Noor Mohamed A. Archimedes Optimization Algorithm Based Selective Harmonic Elimination in a Cascaded H-Bridge Multilevel Inverter. Sustainability. 2022; 14(1):310. https://doi.org/10.3390/su14010310
Chicago/Turabian StyleKhan, Rashid Ahmed, Shoeb Azam Farooqui, Mohammad Irfan Sarwar, Seerin Ahmad, Mohd Tariq, Adil Sarwar, Mohammad Zaid, Shafiq Ahmad, and Adamali Shah Noor Mohamed. 2022. "Archimedes Optimization Algorithm Based Selective Harmonic Elimination in a Cascaded H-Bridge Multilevel Inverter" Sustainability 14, no. 1: 310. https://doi.org/10.3390/su14010310
APA StyleKhan, R. A., Farooqui, S. A., Sarwar, M. I., Ahmad, S., Tariq, M., Sarwar, A., Zaid, M., Ahmad, S., & Shah Noor Mohamed, A. (2022). Archimedes Optimization Algorithm Based Selective Harmonic Elimination in a Cascaded H-Bridge Multilevel Inverter. Sustainability, 14(1), 310. https://doi.org/10.3390/su14010310