High-Input Impedance Voltage-Mode Multifunction Filter

Abstract

This paper proposes a high-input impedance voltage-mode (VM) multifunction biquad filter which employs three current-feedback amplifiers (CFAs), three resistors, and two grounded capacitors. The proposed VM multifunction biquad filter has single-input and triple-output and can realize non-inverting low-pass (NLP), inverting band-pass (IBP), and non-inverting band-stop (NBS) voltage responses at the same time without increasing component selection. The proposed VM multifunction biquad filter enjoys the orthogonal tunability of angular frequency and quality factor and also provides the advantage of using only two grounded capacitors, high-input impedance and low active/passive sensitivity. The performance of the proposed VM multifunction biquad filter is verified through its hardware implementation and OrCAD PSpice simulation based on AD844-type CFAs. The circuit analysis, sensitivity analysis, and NLP, IBP, and NBS voltage responses are also shown in this paper. The paper presents a method to effectively reduce the active and passive components, maintain good circuit performance, and reduce circuit costs.

1. Introduction

Due to the flexibility and versatility of high-input impedance single-input and triple-output voltage mode (VM) multifunction biquad filters in practical applications, people are increasingly interested in their design. This type of biquad can be used in some systems that employ multiple filter functions. For examples, the multifunction biquads could be applied to high fidelity three-way speaker systems, touch-tone telephone systems, and phase-locked-loop (PLL) frequency-modulation (FM) stereo demodulators [1].

Several VM biquads based on active components have been presented in [1,2,3,4,5,6,7]. The applications and advantages in the realization of the VM biquad filters employing the current-feedback amplifier (CFA) as the active building block have also received considerable attention [8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23]. The circuits in [8,9,10,12,14,16,17,18] propose some CFA-based biquad filters but they cannot simultaneously realize non-inverting low-pass (NLP), inverting band-pass (IBP), and non-inverting band-stop (NBS) voltage responses. The circuit in [19] described a biquad for realizing VM NLP, non-inverting band-pass (NBP), and non-inverting high-pass (NHP) voltage responses simultaneously; but it uses four CFAs, two capacitors, and six resistors. The circuit in [20] described a biquad for realizing VM NLP, NBP, and NHP voltage responses, simultaneously; but it uses three CFAs, three capacitors, and four resistors. The circuit in [21] described another biquad for realizing VM NLP, IBP, NHP, and NBS voltage responses simultaneously; but it uses four CFAs, two capacitors, and four resistors. The circuit in [22] described a biquad that uses three CFAs, two capacitors and four resistors to realize VM inverting low-pass (ILP), NBP, and NHP voltage responses simultaneously. However, the resonance angular frequency (ω_o) and the quality factor (Q) parameters of this circuit cannot be implemented by orthogonal controllability. Recently, a high-input impedance two-input triple-output VM multifunction biquad filter has been proposed in [23], which can simultaneously realize NLP, NBP, and NBS voltage responses at high-input impedance terminal, and the circuit parameters of ω_o and Q offer orthogonal controllability. In this paper, the authors propose another high-input impedance single-input triple-output VM multifunction biquad filter. The proposed circuit employs three CFAs, two grounded capacitors, and three resistors with high-input impedance. It can simultaneously realize NLP, IBP, and NBS responses at high-input impedance terminal and still enjoys the orthogonal controllability of ω_o and Q. The comparison between the proposed biquad and the previous CFA-based biquads is summarized in

Table 1. Comparison of the previously reported voltage-mode (VM) biquads.

Reference	Number CFAs Used	Number of R/C Used	Realize Three Kinds Filter Responses Simultaneously	All-Ground Capacitor	No Capacitor Connected in Series to X Terminal of CFA	Orthogonal ωo & Q Tuning	No Need Matching Condition	High-Input Impedance	Central Frequency (HZ)	1-dB Compression. Point (dBm)	3-Order Intercept Point (dBm)
[8]	2	4/2	no	no	yes	yes	yes	no	8.84 k	none	none
[9]	2	2/2	no	no	yes	no	yes	no	15.9 k	none	none
[10]	2	2/2	no	no	yes	no	yes	no	15.9 k	none	none
[11]	3	3/2	yes	no	yes	yes	yes	no	15.9 k	none	none
[12]	2	3/2	no	no	yes	yes	yes	no	159.2 k	none	none
[13]	4	8/2	yes	yes	yes	no	yes	yes	5.6 k	none	none
[14]	2	4/2	no	no	yes	no	no	no	57 k	none	none
[15]	3	3/2	yes	yes	yes	yes	yes	no	15.9 k	none	none
[16]	3	3/2	no	no	yes	no	no	yes	9.95 k	none	none
[17]	4	5/2	no	yes	yes	yes	no	yes	99.5 k	none	none
[18]	3	5/2	no	yes	yes	yes	no	yes	79.5 k	none	none
[19]	4	6/2	yes	yes	yes	yes	yes	yes	15.9 k	none	none
[20]	3	4/3	yes	yes	no	yes	yes	yes	3.2 k	none	none
[21]	4	4/2	yes	yes	yes	yes	yes	yes	7.96 k	none	none
[22]	3	4/2	yes	yes	no	no	yes	yes	5.68 k	none	none
[23]	3	3/2	yes	yes	yes	yes	yes	yes	39.79 k	11.8	21.59
Proposed	3	3/2	yes	yes	yes	yes	yes	yes	39.79 k	18.8	29.04

.

CFA is equivalent to a positive current conveyor (CCII) cascaded with a unity gain voltage follower (VF) [17,18]. According to the datasheet [24], the integrated circuit (IC) of the commercial AD844 comprises of a CCII cascaded with a unity gain VF. The voltage on the non-inverting input port (V+) is transferred to the inverting input port (V−), and the current flowing to the inverting input port is replicated to the port Tz, and the voltage on the port Tz is transferred to the port W of unity gain VF. Hence, the proposed circuit is implemented using the commercial AD844, which results in high-input impedance, high current drive capability, simplicity, and low cost.

2. Proposed Circuit

The circuit symbol of CFA is shown in Figure 1a. Using standard notation, I_Y = 0, V_X = V_Y, I_Z = I_X, and V_W = V_Z can be used to characterize the port relationship of CFA [18]. Port Y has high-input impedance, and port X has low-input impedance. The input voltage of the X port follows the high-input impedance voltage of the Y port. Port Z has high-output impedance and the output current sinks the input port X current. Port W has low-output impedance and the output voltage follows the port Z voltage. The circuit symbol of AD844 is shown in Figure 1b. The port relationship of AD844 can be characterized by I+ = 0, V− = V+, I_Tz = I−, and V_W = V_Tz [24]. The positive port has high-input impedance and the negative port has low-input impedance. The negative-port input voltage (V−) follows the high-input impedance voltage (V+) of the positive port. Port Tz has high-output impedance and the output current (I_Tz) sinks the negative-port input current (I−). Port W has low-output impedance and the output voltage (V_W) follows the port Tz voltage (V_Tz). Hence, the characteristics of CFA are exactly equivalent to commercial AD844 IC. The proposed high-input impedance single-input triple-output VM multifunction biquad filter is shown in Figure 2. Figure 3 shows a practical implementation of CFA using AD844 IC. As shown in Figure 2 and Figure 3, the input voltage signal is applied to the high-input impedance Y or plus ports. Hence, the proposed circuit has a high-input impedance and can be easily cascaded to VM circuits. A routine analysis of Figure 2 gives the following three voltage transfer functions.

$$\frac{{\mathrm{V}}_{\mathrm{o}1}}{{\mathrm{V}}_{\mathrm{in}}}=\frac{1}{{\mathrm{s}}^2{\mathrm{C}}_1{\mathrm{C}}_2{\mathrm{R}}_2{\mathrm{R}}_3+{\mathrm{sC}}_1{\mathrm{R}}_1+1}$$

(1)

$$\frac{{\mathrm{V}}_{\mathrm{o}2}}{{\mathrm{V}}_{\mathrm{in}}}=\frac{-{\mathrm{sC}}_1{\mathrm{R}}_2}{{\mathrm{s}}^2{\mathrm{C}}_1{\mathrm{C}}_2{\mathrm{R}}_2{\mathrm{R}}_3+{\mathrm{sC}}_1{\mathrm{R}}_1+1}$$

(2)

$$\frac{{\mathrm{V}}_{\mathrm{o}3}}{{\mathrm{V}}_{\mathrm{in}}}=\frac{{\mathrm{s}}^2{\mathrm{C}}_1{\mathrm{C}}_2{\mathrm{R}}_1{\mathrm{R}}_2+1}{{\mathrm{s}}^2{\mathrm{C}}_1{\mathrm{C}}_2{\mathrm{R}}_2{\mathrm{R}}_3+{\mathrm{sC}}_1{\mathrm{R}}_1+1}$$

(3)

It can be seen from Equations (1) to (3) that V_o1 can obtain an NLP voltage response, V_o2 can obtain an IBP voltage response, and V_o3 can obtain an NBS voltage response. Hence, the proposed circuit can realize NLP, IBP, and NBS voltage responses simultaneously. The ω_o and Q of the filter can be obtained by the following equations:

$${\mathsf{\omega }}_{\mathrm{o}}=\sqrt{\frac{1}{{\mathrm{C}}_1{\mathrm{C}}_2{\mathrm{R}}_2{\mathrm{R}}_3}}$$

(4)

$$\mathrm{Q}=\frac{1}{{\mathrm{R}}_1}\sqrt{\frac{{\mathrm{C}}_2{\mathrm{R}}_2{\mathrm{R}}_3}{{\mathrm{C}}_1}}$$

(5)

Hence, the filter parameters of ω_o and Q offers orthogonal controllability.

3. Non-Ideal and Sensitivity Consideration

Practically CFA is characterized by the terminals equations V_X = βV_Y, I_Z = αI_X, and V_W = γV_Z [14], where β, α and γ are port transfer ratios of the Y, X, and Z terminals, respectively. Taking into account the non-idealities, the denominator of the transfer functions of Figure 2 becomes

$$\mathrm{D}\left(\mathrm{s}\right)={\mathrm{s}}^2{\mathrm{C}}_1{\mathrm{C}}_2{\mathrm{R}}_2{\mathrm{R}}_3+{\mathsf{\alpha }}_2{\mathsf{\alpha }}_3{\mathsf{\beta }}_3{\mathsf{\gamma }}_3{\mathrm{sC}}_1{\mathrm{R}}_1+{\mathsf{\alpha }}_1{\mathsf{\alpha }}_2{\mathsf{\alpha }}_3{\mathsf{\beta }}_2{\mathsf{\beta }}_3$$

(6)

From Equation (6), the non-ideal ω_o and Q in Equations (4) and (5) become

$${\mathsf{\omega }}_{\mathrm{o}}=\sqrt{\frac{{\mathsf{\alpha }}_1{\mathsf{\alpha }}_2{\mathsf{\alpha }}_3{\mathsf{\beta }}_2{\mathsf{\beta }}_3}{{\mathrm{C}}_1{\mathrm{C}}_2{\mathrm{R}}_2{\mathrm{R}}_3}}$$

(7)

$$\mathrm{Q}=\frac{1}{{\mathsf{\gamma }}_3{\mathrm{R}}_1}\sqrt{\frac{{\mathsf{\alpha }}_1{\mathsf{\beta }}_2{\mathrm{C}}_2{\mathrm{R}}_2{\mathrm{R}}_3}{{\mathsf{\alpha }}_2{\mathsf{\alpha }}_3{\mathsf{\beta }}_3{\mathrm{C}}_1}}$$

(8)

Sensitivity is an important performance of a biquad filter, and its formal definition can be expressed as follows:

$${\mathrm{S}}_{\mathrm{X}}^{\mathrm{F}}=\frac{\mathrm{X}}{\mathrm{F}}\frac{\partial \mathrm{F}}{\partial \mathrm{X}}$$

(9)

where F represents one of ω_o and Q. X represents any of the active parameter or passive component. Using this definition, the active and passive sensitivities with respect to ω_o and Q can be obtained as

$${\mathrm{S}}_{{\mathsf{\alpha }}_1}^{{\mathsf{\omega }}_0}={\mathrm{S}}_{{\mathsf{\alpha }}_2}^{{\mathsf{\omega }}_0}={\mathrm{S}}_{{\mathsf{\alpha }}_3}^{{\mathsf{\omega }}_0}={\mathrm{S}}_{{\mathsf{\beta }}_2}^{{\mathsf{\omega }}_0}={\mathrm{S}}_{{\mathsf{\beta }}_3}^{{\mathsf{\omega }}_0}=\frac{1}{2}$$

(10)

$${\mathrm{S}}_{{\mathrm{C}}_1}^{{\mathsf{\omega }}_0}={\mathrm{S}}_{{\mathrm{C}}_2}^{{\mathsf{\omega }}_0}={\mathrm{S}}_{{\mathrm{R}}_2}^{{\mathsf{\omega }}_0}={\mathrm{S}}_{{\mathrm{R}}_3}^{{\mathsf{\omega }}_0}=-\frac{1}{2}$$

(11)

$${\mathrm{S}}_{{\mathsf{\alpha }}_1}^{\mathrm{Q}}={\mathrm{S}}_{{\mathsf{\beta }}_2}^{\mathrm{Q}}={\mathrm{S}}_{{\mathrm{C}}_2}^{\mathrm{Q}}={\mathrm{S}}_{{\mathrm{R}}_2}^{\mathrm{Q}}={\mathrm{S}}_{{\mathrm{R}}_3}^{\mathrm{Q}}=\frac{1}{2}$$

(12)

$${\mathrm{S}}_{{\mathsf{\alpha }}_2}^{\mathrm{Q}}={\mathrm{S}}_{{\mathsf{\alpha }}_3}^{\mathrm{Q}}={\mathrm{S}}_{{\mathsf{\beta }}_3}^{\mathrm{Q}}={\mathrm{S}}_{{\mathrm{C}}_1}^{\mathrm{Q}}=-\frac{1}{2}$$

(13)

$${\mathrm{S}}_{{\mathsf{\gamma }}_3}^{\mathrm{Q}}={\mathrm{S}}_{{\mathrm{R}}_1}^{\mathrm{Q}}=-1$$

(14)

It is clearly observed from Equations (10) and (14) that the circuit has low passive and active sensitivity performances.

4. Simulation and Measurement Results

In order to confirm the theoretical study, the proposed circuit of Figure 2 was simulated using the AD844 macro-models of OrCAD PSpice version 17.2 and was experimented using commercial AD844AN of analog devices. The power supply voltage was given as ±6 V. The passive component values of the Figure 2 are given by R₁ = R₂ = R₃ = 4 kΩ and C₁ = C₂ = 1 nF for the center frequency of f_o = 39.79 kHz. Figure 4, Figure 5 and Figure 6 show the simulation and experimental gain-frequency and phase-frequency voltage responses for the NLP, IBP, and NBS filters of Figure 2, respectively. In the simulated NLP voltage response of Figure 4, the center frequency f_o is 38.9 kHz, which is −2.23% different from the theoretical value. In the simulated IBP voltage response of Figure 5, the center frequency f_o is 38.5 kHz, which is −3.24% different from the theoretical value. In the simulated NBS voltage response of Figure 6, the center frequency f_o is 38.9 kHz, which is −2.23% different from the theoretical value. Figure 7 shows the different Q-values of IBP voltage response and the tunable Q-values, Q = 0.71, 1, and 2.5 are obtained without affecting the f_o parameter. In Figure 7, R₂ = R₃ = 4 kΩ, C₁ = C₂ = 1 nF, and only vary the resistor R₁ as 5.6, 4 and 1.6 kΩ. It is found that the total power consumption of the simulation is 255 mW. Figure 8, Figure 9 and Figure 10 represent the experimental frequency responses for the NLP, IBP, and NBS voltage responses of Figure 2, respectively. In the measured NLP voltage response of Figure 8, the center frequency f_o is 41.364 kHz, which is 3.96% different from the theoretical value. In the measured IBP voltage response of Figure 9, the center frequency f_o is 40.729 kHz, which is 2.36% different from the theoretical value. In the measured NBS voltage response of Figure 10, the center frequency f_o is 41.036 kHz, which is 3.13% different from the theoretical value. The experimental gain-frequency voltage responses of the IBP filter with difference Q-values is shown in Figure 11. Figure 12 shows the experimental measurement result of the IBP transient response of the 40 kHz frequency and 2 V peak voltage of input voltage signal. It can be seen from the simulation and experimental results that they are consistent with the theoretical values.

The 1-dB compression (P1dB) point is a key metric to determine the linear region of the circuit’s operation. This point represents that the input power reduces 1 dB gain from the normal linear gain specification. In general, there is nonlinearity in the transfer functions of all electronic circuits, and nonlinear distortion occurs. Hence, the third-order intercept (TOI) point measurement is a good indicator of the depth of distortion created by intermodulation products. Figure 13 and Figure 14 show the measurement results of the P1dB and the TOI point, respectively. The measured input P1 dB point is 18.8 dBm and the measure TOI point is 29.04 dBm.

5. Conclusions

This paper presents a novel high-input impedance VM biquad filter with single input and triple outputs. The proposed circuit can realize NLP, IBP, and NBS voltage responses, simultaneously, by using three CFAs, two grounded capacitors and three resistors. The circuit has high input impedance, and therefore it can connect in cascade directly within VM biquad without additional voltage buffers. The circuit employs two grounded capacitors, which are easily implemented in the integrated circuit. The ω_o and Q can be tuned orthogonally. The sensitivities of active and passive performances are low. The simulation and experimental results validate the theoretical analysis.