Garcia-Bosque, M.; Díez-Señorans, G.; Pérez-Resa, A.; Sánchez-Azqueta, C.; Aldea, C.; Celma, S.
A 1 Gbps Chaos-Based Stream Cipher Implemented in 0.18 μm CMOS Technology. Electronics 2019, 8, 623.
https://doi.org/10.3390/electronics8060623
AMA Style
Garcia-Bosque M, Díez-Señorans G, Pérez-Resa A, Sánchez-Azqueta C, Aldea C, Celma S.
A 1 Gbps Chaos-Based Stream Cipher Implemented in 0.18 μm CMOS Technology. Electronics. 2019; 8(6):623.
https://doi.org/10.3390/electronics8060623
Chicago/Turabian Style
Garcia-Bosque, Miguel, Guillermo Díez-Señorans, Adrián Pérez-Resa, Carlos Sánchez-Azqueta, Concepción Aldea, and Santiago Celma.
2019. "A 1 Gbps Chaos-Based Stream Cipher Implemented in 0.18 μm CMOS Technology" Electronics 8, no. 6: 623.
https://doi.org/10.3390/electronics8060623
APA Style
Garcia-Bosque, M., Díez-Señorans, G., Pérez-Resa, A., Sánchez-Azqueta, C., Aldea, C., & Celma, S.
(2019). A 1 Gbps Chaos-Based Stream Cipher Implemented in 0.18 μm CMOS Technology. Electronics, 8(6), 623.
https://doi.org/10.3390/electronics8060623