Neuromorphic Device, Circuits, and Systems

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 15 April 2025 | Viewed by 3062

Special Issue Editors


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Guest Editor
Department of Electrical & Computer Engineering, Florida International University, Miami, FL 33199, USA
Interests: VLSI circuit design; neuromorphic computing hardware; photodetector design; integrated smart sensors for biomedical applications

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Guest Editor
Department of Electrical Engineering and Computer Science, University of Tennessee Knoxville, Knoxville, TN 37996, USA
Interests: neuromorphic computing hardware design; nano-enabled hardware security; memristor device modeling and simulation; nanoelectronic circuit design for emerging computing architectures

Special Issue Information

Dear Colleagues,

Neuromorphic computing has become an attractive candidate for emerging computing platforms. Using principles from biology, neuromorphic computing creates engineered circuits and systems that function like living organisms. Despite their VLSI origins, neuromorphic circuits that use VLSI semiconductors are advancing increasingly and moving further away from the von Neumann generation. Based on their biological counterparts, neuromorphic computing systems have also become increasingly advanced as technology has advanced. Artificial intelligence and learning can be demonstrated along with the evolution of emerging devices, circuits, and systems that more closely resemble their biological prototypes. As neuromorphic devices, circuits, and systems continue to develop, they mimic the brain's computational primitives more closely in terms of efficiency, functionality, and plasticity.

The purpose of this Special Issue is to discuss the state of the art in terms of devices, circuits, architecture, analysis, and optimization for neuromorphic computing systems. It also discusses the design and development of neuromorphic computing devices and hardware and neuromorphic learning algorithms using emerging circuits and devices.

Dr. Mst Shamim Ara Shawkat
Dr. Garrett S. Rose
Guest Editors

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Keywords

  • devices, circuits, architecture design, analysis, and optimization for neuromorphic computing systems
  • design and development of neuromorphic computing devices and hardware
  • neuromorphic learning algorithms using emerging devices and circuits
  • design of novel artificial neural networks and systems

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Published Papers (2 papers)

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Research

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16 pages, 3121 KiB  
Article
Enhancement of Synaptic Performance through Synergistic Indium Tungsten Oxide-Based Electric-Double-Layer and Electrochemical Doping Mechanisms
by Dong-Gyun Mah, Seong-Hwan Lim and Won-Ju Cho
Electronics 2024, 13(15), 2916; https://doi.org/10.3390/electronics13152916 - 24 Jul 2024
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Abstract
This study investigated the potential of indium tungsten oxide (IWO) channel-based inorganic electrolyte transistors as synaptic devices. We comparatively analyzed the electrical characteristics of indium gallium zinc oxide (IGZO) and IWO channels using phosphosilicate glass (PSG)-based electrolyte transistors, focusing on the effects of [...] Read more.
This study investigated the potential of indium tungsten oxide (IWO) channel-based inorganic electrolyte transistors as synaptic devices. We comparatively analyzed the electrical characteristics of indium gallium zinc oxide (IGZO) and IWO channels using phosphosilicate glass (PSG)-based electrolyte transistors, focusing on the effects of electric-double-layer (EDL) and electrochemical doping. The results showed the superior current retention characteristics of the IWO channel compared to the IGZO channel. To validate these findings, we compared the DC bias characteristics of SiO2-based field-effect transistors (FETs) with IGZO and IWO channels. Furthermore, by examining the transfer curve characteristics under various gate voltage (VG) sweep ranges for PSG transistors based on IGZO and IWO channels, we confirmed the reliability of the proposed mechanisms. Our results demonstrated the superior short-term plasticity of the IWO channel at VG = 1 V due to EDL operation, as confirmed by excitatory post-synaptic current measurements under pre-synaptic conditions. Additionally, we observed superior long-term plasticity at VG ≥ 2 V due to proton doping. Finally, the IWO channel-based FETs achieved a 92% recognition rate in pattern recognition simulations at VG = 4 V. IWO channel-based inorganic electrolyte transistors, therefore, have remarkable applicability in neuromorphic devices. Full article
(This article belongs to the Special Issue Neuromorphic Device, Circuits, and Systems)
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Review

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15 pages, 2218 KiB  
Review
A Survey on Neuromorphic Architectures for Running Artificial Intelligence Algorithms
by Seham Al Abdul Wahid, Arghavan Asad and Farah Mohammadi
Electronics 2024, 13(15), 2963; https://doi.org/10.3390/electronics13152963 - 26 Jul 2024
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Abstract
Neuromorphic computing, a brain-inspired non-Von Neumann computing system, addresses the challenges posed by the Moore’s law memory wall phenomenon. It has the capability to enhance performance while maintaining power efficiency. Neuromorphic chip architecture requirements vary depending on the application and optimising it for [...] Read more.
Neuromorphic computing, a brain-inspired non-Von Neumann computing system, addresses the challenges posed by the Moore’s law memory wall phenomenon. It has the capability to enhance performance while maintaining power efficiency. Neuromorphic chip architecture requirements vary depending on the application and optimising it for large-scale applications remains a challenge. Neuromorphic chips are programmed using spiking neural networks which provide them with important properties such as parallelism, asynchronism, and on-device learning. Widely used spiking neuron models include the Hodgkin–Huxley Model, Izhikevich model, integrate-and-fire model, and spike response model. Hardware implementation platforms of the chip follow three approaches: analogue, digital, or a combination of both. Each platform can be implemented using various memory topologies which interconnect with the learning mechanism. Current neuromorphic computing systems typically use the unsupervised learning spike timing-dependent plasticity algorithms. However, algorithms such as voltage-dependent synaptic plasticity have the potential to enhance performance. This review summarises the potential neuromorphic chip architecture specifications and highlights which applications they are suitable for. Full article
(This article belongs to the Special Issue Neuromorphic Device, Circuits, and Systems)
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