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Electronics
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Advanced Technologies in Nanoelectronics
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Advanced Technologies in Nanoelectronics

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Microelectronics".

Deadline for manuscript submissions: closed (31 October 2019) | Viewed by 20287

Special Issue Editors

Dr. Youngkyoo Kim

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Guest Editor
Organic Nanoelectronics Laboratory, KNU Institute for Nanophotonics Applications (KINPA), Department of Chemical Engineering, School of Applied Chemical Engineering, Kyungpook National University, Daegu 41566, Republic of Korea
Interests: organic nanoelectronic materials and devices; biomedical materials and devices; new materials and processing; nanofabrications and measurements
Special Issues, Collections and Topics in MDPI journals
Dr. Hwajeong Kim

E-Mail Website
Guest Editor
Organic Nanoelectronics Laboratory, Department of Chemical Engineering, School of Applied Chemical Engineering, Kyungpook National University, Daegu, Korea
Interests: electrochemical sensors/systems; biomedical materials/devices; organic materials/devices; nanoscale surfaces/analysis
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

Nanoelectronics is becoming one of the top-priority subjects in the coming fourth industrial revolution era, which is represented by artificial intelligence, autonomous cars, humanoid robots, intelligent drones, etc. The recent advances in semiconductors have disclosed that several nanometer-scaled devices could be fabricated for enhanced speeds and capacities in central processing units and memory devices. In addition, many more advanced technologies are being developed in the front lines of conventional silicon-based electronics as well as brand-new soft electronics including organic electronics and biomedical electronics. Particular attention is being paid to flexible electronics, of which components should be on a nanoscale but with high flexibility, while further keen interest is focused on transparent nanoelectronics.

Hence this Special Issue aims to publish cutting-edge works in the broad field of nanoelectronics based on a variety of functional materials, not limited to inorganic or organic semiconductors. The topics of this Special Issue may include nanoscale materials for electronics, nanoscale devices, applications of nanoelectronic devices for artificial skins and biomedical sensors, stability/durability of nanoelectronic devices, etc.

Dr. Youngkyoo Kim
Dr. Hwajeong Kim
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • nanoelectronics
  • nanoscale materials
  • nanoelectronic devices
  • flexible and transparent devices
  • device applications and stability

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Published Papers (4 papers)

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Research

11 pages, 3448 KiB  
Communication
Effect of Top Channel Thickness in Near Infrared Organic Phototransistors with Conjugated Polymer Gate-Sensing Layers
by Jisu Park, Hwajeong Kim, Taehoon Kim, Chulyeon Lee, Dong-Ik Song and Youngkyoo Kim
Electronics 2019, 8(12), 1493; https://doi.org/10.3390/electronics8121493 - 6 Dec 2019
Cited by 8 | Viewed by 2898
Abstract
Here, we report the thickness effect of top channel layers (CLs) on the performance of near infrared (NIR)-detecting organic phototransistors (OPTRs) with conjugated polymer gate-sensing layers (GSLs). Poly(3-hexylthiophene) (P3HT) was employed as a top CL, while poly[{2,5-bis-(2-octyldodecyl)-3,6-bis-(thien-2-yl)-pyrrolo[3,4-c]pyrrole-1,4-diyl}-co-{2,2′-(2,1,3-benzothiadiazole)-5,5′-diyl}] (PODTPPD-BT) was used as a GSL. [...] Read more.
Here, we report the thickness effect of top channel layers (CLs) on the performance of near infrared (NIR)-detecting organic phototransistors (OPTRs) with conjugated polymer gate-sensing layers (GSLs). Poly(3-hexylthiophene) (P3HT) was employed as a top CL, while poly[{2,5-bis-(2-octyldodecyl)-3,6-bis-(thien-2-yl)-pyrrolo[3,4-c]pyrrole-1,4-diyl}-co-{2,2′-(2,1,3-benzothiadiazole)-5,5′-diyl}] (PODTPPD-BT) was used as a GSL. The thickness of P3HT CLs was varied from 10 to 70 nm. Three different wavelengths of NIR light (λ = 780, 905, and 1000 nm) were introduced and their light intensity was fixed to 0.27 mW cm−2. Results showed that all fabricated devices exhibited typical p-channel transistor behaviors and the highest drain current in the dark was obtained at the P3HT thickness (t) of 50 nm. The NIR illumination test revealed that the NIR photoresponsivity (RC) of GSL-OPTRs could be achieved at t = 50 nm irrespective of the NIR wavelength. The maximum RC of the optimized devices (t = 50 nm) reached ca. 61% at λ = 780 nm and ca. 47% at λ = 1000 nm compared to the theoretical maximum photoresponsivity. Full article
(This article belongs to the Special Issue Advanced Technologies in Nanoelectronics)
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19 pages, 1578 KiB  
Article
Analysis of an Approximated Model for the Depletion Region Width of Planar Junctionless Transistors
by Arian Nowbahari, Avisek Roy, Muhammad Nadeem Akram and Luca Marchetti
Electronics 2019, 8(12), 1436; https://doi.org/10.3390/electronics8121436 - 1 Dec 2019
Cited by 3 | Viewed by 4918
Abstract
In this paper, we investigate the accuracy of the approximated analytical model currently utilized, by many researchers, to describe the depletion region width in planar junctionless transistors (PJLT). The proposed analysis was supported by numerical simulations performed in COMSOL Multiphysics software. By comparing [...] Read more.
In this paper, we investigate the accuracy of the approximated analytical model currently utilized, by many researchers, to describe the depletion region width in planar junctionless transistors (PJLT). The proposed analysis was supported by numerical simulations performed in COMSOL Multiphysics software. By comparing the numerical results and the approximated analytical model of the depletion region width, we calculated that the model introduces a maximum RMS error equal to 90 % of the donor concentration in the substrate. The maximum error is achieved when the gate voltage approaches the threshold voltage ( V t h ) or when it approaches the flat band voltage ( V F B ) of the transistor. From these results, we concluded that this model cannot be used to determine accurately the flat-band and the threshold voltage of the transistor, although it represents a straightforward method to estimate the depletion region width in PJLT. By using the approximated analytical model, we extracted an analytical formula, which describes the electron concentration at the ideal boundary of the depletion region. This formula approximates the numerical data extracted from COMSOL with a relative error lower than 1 % . The proposed formula is in our opinion, as useful as the formula of the approximated analytical model because it allows for estimating the position of the depletion region also when the drain and source terminals are not grounded. We concluded that the analytical formula proposed at the end of this work could be useful to determine the position of the depletion region boundary in numerical simulations and in graphical representations provided by COMSOL Multiphysics software. Full article
(This article belongs to the Special Issue Advanced Technologies in Nanoelectronics)
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13 pages, 2998 KiB  
Article
Enhanced Photoresponsivity of All-Inorganic (CsPbBr3) Perovskite Nanosheets Photodetector with Carbon Nanodots (CDs)
by Hassan Algadi, Chandreswar Mahata, Janghoon Woo, Minkyu Lee, Minsu Kim and Taeyoon Lee
Electronics 2019, 8(6), 678; https://doi.org/10.3390/electronics8060678 - 14 Jun 2019
Cited by 26 | Viewed by 6928
Abstract
A hybrid composite photodetector based on cesium lead bromine perovskite (CsPbBr3) nanosheets and carbon nanodots (CDs) was fabricated on a quartz substrate by a one-step method of spin-coating and hot-plate annealing. The responsivity of the CsPbBr3/CD hybrid composite photodetector [...] Read more.
A hybrid composite photodetector based on cesium lead bromine perovskite (CsPbBr3) nanosheets and carbon nanodots (CDs) was fabricated on a quartz substrate by a one-step method of spin-coating and hot-plate annealing. The responsivity of the CsPbBr3/CD hybrid composite photodetector was 608 mAW−1 (under a 520-nm laser diode source applied at 0.2 mWcm−2), almost three times higher than that of a CsPbBr3-based photodetector (221 mAW−1). The enhanced performance of the CsPbBr3/CD photodetector is attributable to the high band alignment of the CDs and CsPbBr3, which significantly improves the charge extraction at the CsPbBr3/CD interface. Moreover, the hybrid CsPbBr3/CD photodetector exhibited a fast response time with a rise and decay time of 1.55 and 1.77 ms, which was faster than that of a pure CsPbBr3 based photodetector, indicating that the CDs accelerate the extraction of electrons and holes trapped in the CsPbBr3 film. Full article
(This article belongs to the Special Issue Advanced Technologies in Nanoelectronics)
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12 pages, 1860 KiB  
Article
Electric Double Layer Field-Effect Transistors Using Two-Dimensional (2D) Layers of Copper Indium Selenide (CuIn7Se11)
by Prasanna D. Patil, Sujoy Ghosh, Milinda Wasala, Sidong Lei, Robert Vajtai, Pulickel M. Ajayan and Saikat Talapatra
Electronics 2019, 8(6), 645; https://doi.org/10.3390/electronics8060645 - 7 Jun 2019
Cited by 11 | Viewed by 4969
Abstract
Innovations in the design of field-effect transistor (FET) devices will be the key to future application development related to ultrathin and low-power device technologies. In order to boost the current semiconductor device industry, new device architectures based on novel materials and system need [...] Read more.
Innovations in the design of field-effect transistor (FET) devices will be the key to future application development related to ultrathin and low-power device technologies. In order to boost the current semiconductor device industry, new device architectures based on novel materials and system need to be envisioned. Here we report the fabrication of electric double layer field-effect transistors (EDL-FET) with two-dimensional (2D) layers of copper indium selenide (CuIn7Se11) as the channel material and an ionic liquid electrolyte (1-Butyl-3-methylimidazolium hexafluorophosphate (BMIM-PF6)) as the gate terminal. We found one order of magnitude improvement in the on-off ratio, a five- to six-times increase in the field-effect mobility, and two orders of magnitude in the improvement in the subthreshold swing for ionic liquid gated devices as compared to silicon dioxide (SiO2) back gates. We also show that the performance of EDL-FETs can be enhanced by operating them under dual (top and back) gate conditions. Our investigations suggest that the performance of CuIn7Se11 FETs can be significantly improved when BMIM-PF6 is used as a top gate material (in both single and dual gate geometry) instead of the conventional dielectric layer of the SiO2 gate. These investigations show the potential of 2D material-based EDL-FETs in developing active components of future electronics needed for low-power applications. Full article
(This article belongs to the Special Issue Advanced Technologies in Nanoelectronics)
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