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Editorial

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5 pages, 169 KiB

Open AccessEditorial

Editorial for the Special Issue on State-of-the-Art CMOS and MEMS Devices

by Zhiming Chen

Micromachines 2024, 15(3), 327; https://doi.org/10.3390/mi15030327 - 27 Feb 2024

Cited by 1 | Viewed by 1577

Abstract

Complementary Metal Oxide Semiconductor (CMOS) and Micro-Electro-Mechanical System (MEMS) devices play significant roles in emerging research fields such as artificial intelligence (AI) [...] Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

Research

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14 pages, 5637 KiB

Open AccessArticle

Electromagnetic Susceptibility Analysis of the Operational Amplifier to Conducted EMI Injected through the Power Supply Port

by Peng Huang, Bing Li, Mengyuan Wei, Xuchun Hao, Xi Chen, Xiaozong Huang, Wei Huang, Shuling Zhou, Xiaokang Wen, Shuguo Xie and Donglin Su

Micromachines 2024, 15(1), 121; https://doi.org/10.3390/mi15010121 - 11 Jan 2024

Viewed by 1455

Abstract

Operational amplifiers (op-amps) are widely used in circuit systems. The increasing complexity of the power supply network has led to the susceptibility of the power supply port to electromagnetic interference (EMI) in circuit systems. Therefore, it is necessary to investigate the electromagnetic susceptibility [...] Read more.

Operational amplifiers (op-amps) are widely used in circuit systems. The increasing complexity of the power supply network has led to the susceptibility of the power supply port to electromagnetic interference (EMI) in circuit systems. Therefore, it is necessary to investigate the electromagnetic susceptibility (EMS) of op-amps at the power supply port. In this paper, we assessed the effect of EMI on the operational performance of op-amps through the power supply port by a bulk current injection (BCI) method. Firstly, we conducted the continuous sine wave into the power supply port by a current injection probe and measured the change in the offset voltage under EMI. Secondly, we proposed a new method of conducted susceptibility and obtained the susceptibility threshold regularities of the op-amps at the power supply port under the interference of different waveform signals. Our study provided conclusive evidence that EMI reduced the reliability of the op-amp by affecting the offset voltage of op-amps and demonstrated that the sensitivity type of op-amps was peak-sensitive at the power supply port. This study contributed to a deep understanding of the EMS mechanism and guided the design of electromagnetic compatibility (EMC) of op-amps. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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18 pages, 8790 KiB

Open AccessArticle

Compact Physics Hot-Carrier Degradation Model Valid over a Wide Bias Range

by Stanislav Tyaginov, Erik Bury, Alexander Grill, Zhuoqing Yu, Alexander Makarov, An De Keersgieter, Mikhail Vexler, Michiel Vandemaele, Runsheng Wang, Alessio Spessot, Adrian Chasin and Ben Kaczer

Micromachines 2023, 14(11), 2018; https://doi.org/10.3390/mi14112018 - 30 Oct 2023

Cited by 1 | Viewed by 1381

Abstract

We develop a compact physics model for hot-carrier degradation (HCD) that is valid over a wide range of gate and drain voltages (

V_{gs}

and

V_{ds}

, respectively). Special attention is paid to the contribution of secondary carriers (generated by impact [...] Read more.

We develop a compact physics model for hot-carrier degradation (HCD) that is valid over a wide range of gate and drain voltages (

V_{gs}

and

V_{ds}

, respectively). Special attention is paid to the contribution of secondary carriers (generated by impact ionization) to HCD, which was shown to be significant under stress conditions with low

V_{gs}

and relatively high

V_{ds}

. Implementation of this contribution is based on refined modeling of carrier transport for both primary and secondary carriers. To validate the model, we employ foundry-quality n-channel transistors and a broad range of stress voltages

{V_{gs}, V_{ds}}

. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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10 pages, 4334 KiB

Open AccessArticle

An Ultra-Low-Power Analog Multiplier–Divider Compatible with Digital Code for RRAM-Based Computing-in-Memory Macros

by Yiming Yang, Shidong Lv, Xiaoran Li, Xinghua Wang, Qian Wang, Yiyang Yuan, Sen Liang and Feng Zhang

Micromachines 2023, 14(7), 1482; https://doi.org/10.3390/mi14071482 - 24 Jul 2023

Viewed by 1344

Abstract

This manuscript presents an ultra-low-power analog multiplier–divider compatible with digital code words, which is applicable to the integrated structure of resistive random-access memory (RRAM)-based computing-in-memory (CIM) macros. Current multiplication and division are accomplished by a current-mirror-based structure. Compared with digital dividers to achieve [...] Read more.

This manuscript presents an ultra-low-power analog multiplier–divider compatible with digital code words, which is applicable to the integrated structure of resistive random-access memory (RRAM)-based computing-in-memory (CIM) macros. Current multiplication and division are accomplished by a current-mirror-based structure. Compared with digital dividers to achieve higher precision and operation speed, analog dividers present the advantages of a reduced power consumption and a simple circuit structure in lower precision operations, thus improving the energy efficiency. Designed and fabricated in a 55 nm CMOS process, the proposed work is capable of achieving 8-bit precision for analog current multiplication and division operations. Measurement results show that the signal delay is 1 μs when performing 8-bit operation, with a bandwidth of 1.4 MHz. The power consumption is less than 6.15 μW with a 1.2 V supply voltage. The proposed multiplier–divider can increase the operation capacity by dividing the input current and digital code while reducing the power consumption and complexity required by division, which can be further utilized in real-time operation of edge computing devices. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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14 pages, 3899 KiB

Open AccessArticle

Beam Scanning and Capture of Micro Laser Communication Terminal Based on MEMS Micromirrors

by Xuan Wang, Junfeng Han, Chen Wang, Meilin Xie, Peng Liu, Yu Cao, Feng Jing, Fan Wang, Yunhao Su and Xiangsheng Meng

Micromachines 2023, 14(7), 1317; https://doi.org/10.3390/mi14071317 - 27 Jun 2023

Cited by 4 | Viewed by 1899

Abstract

With the development of space laser communication and the planned deployment of satellite Internet constellations, there is a growing demand for microminiature laser communication terminals. To meet the requirements of size, weight and power (SWaP), miniaturized terminals require smaller drive components to complete [...] Read more.

With the development of space laser communication and the planned deployment of satellite Internet constellations, there is a growing demand for microminiature laser communication terminals. To meet the requirements of size, weight and power (SWaP), miniaturized terminals require smaller drive components to complete on-orbit scanning and capture, which must be fast and efficient to enable satellite laser communication networks. These miniaturized laser communication terminals are highly susceptible to the impact of the initial pointing accuracy of the laser beam and microvibrations of the satellite platform. Therefore, this paper proposes a laser scanning-capture model based on a Micro-electromechanical Systems (MEMS) micromirror that can provide a fast, large-scale scanning analysis. A scanning overlap factor is introduced to improve the capture probability under the influence of microvibrations. Finally, experimental analysis was carried out to verify the effectiveness of the proposed model, which can establish a theoretical basis for future ultra-long-distance microspace laser communication. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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11 pages, 4591 KiB

Open AccessArticle

Design of a Novel Compact Bandpass Filter Based on Low-Cost Through-Silicon-Via Technology

by Hai Dong, Yingtao Ding, Han Wang, Xingling Pan, Mingrui Zhou and Ziyue Zhang

Micromachines 2023, 14(6), 1251; https://doi.org/10.3390/mi14061251 - 14 Jun 2023

Cited by 1 | Viewed by 1843

Abstract

Three-dimensional (3D) integration based on through-silicon-via (TSV) technology provides a solution to the miniaturization of electronic systems. In this paper, novel integrated passive devices (IPDs) including capacitor, inductor, and bandpass filter are designed by employing TSV structures. For lower manufacturing costs, polyimide (PI) [...] Read more.

Three-dimensional (3D) integration based on through-silicon-via (TSV) technology provides a solution to the miniaturization of electronic systems. In this paper, novel integrated passive devices (IPDs) including capacitor, inductor, and bandpass filter are designed by employing TSV structures. For lower manufacturing costs, polyimide (PI) liners are used in the TSVs. The influences of structural parameters of TSVs on the electrical performance of the TSV-based capacitor and inductor are individually evaluated. Moreover, with the topologies of capacitor and inductor elements, a compact third-order Butterworth bandpass filter with a central frequency of 2.4 GHz is developed, and the footprint is only 0.814 mm × 0.444 mm. The simulated 3-dB bandwidth of the filter is 410 MHz, and the fraction bandwidth (FBW) is 17%. Besides, the in-band insertion loss is less than 2.63 dB, and the return loss in the passband is better than 11.4 dB, showing good RF performance. Furthermore, as the filter is fully formed by identical TSVs, it not only features a simple architecture and low cost, but also provides a promising idea for facilitating the system integration and layout camouflaging of radio frequency (RF) devices. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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10 pages, 4536 KiB

Open AccessArticle

A D-Band Direct-Conversion IQ Receiver with 28 dB CG and 7.3 dB NF in 130 nm SiGe Process

by Fei He, Yuhan Ding, Zhongchen Xu, Menghu Ni, Yibo Tian, Zhenyi Zhang, Zhixiang Shi, Kailei Wang, Qian Xie and Zheng Wang

Micromachines 2023, 14(1), 87; https://doi.org/10.3390/mi14010087 - 29 Dec 2022

Viewed by 2269

Abstract

In this paper, a D-band direct conversion IQ receiver with on-chip multiplier chain is presented. The D-band LNA with gain-boosting and stagger-tunning technique is implemented to provide high gain and large bandwidth. X9 multiplier chain including Marchand balun and quadrature (90°) hybrid is [...] Read more.

In this paper, a D-band direct conversion IQ receiver with on-chip multiplier chain is presented. The D-band LNA with gain-boosting and stagger-tunning technique is implemented to provide high gain and large bandwidth. X9 multiplier chain including Marchand balun and quadrature (90°) hybrid is employed to provide four path LO signal to drive IQ mixer. This receiver is implemented in a 130nm SiGe process and consumes a core area of 1.04 mm². From the experimental results, the proposed receiver exhibits a 20 GHz bandwidth from 150 GHz to 170 GHz, with CG of 28 dB and NF of 7.3 dB at 158 GHz. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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13 pages, 3177 KiB

Open AccessArticle

Analysis and Design of a Non-Magnetic Bulk CMOS Passive Circulator Using 25% Duty-Cycle Clock

by Jian Gao, Xinghua Wang, Fang Han, Jiayue Wan and Wei Gu

Micromachines 2023, 14(1), 33; https://doi.org/10.3390/mi14010033 - 23 Dec 2022

Cited by 1 | Viewed by 1679

Abstract

A circulator, which is a non-reciprocal device, is widely used in full-duplex systems, future communication and sensing networks, and quantum computing, and it is difficult to implement a passive topology on a chip. Based on switch-based spatio-temporal conductivity modulation, in this study, we [...] Read more.

A circulator, which is a non-reciprocal device, is widely used in full-duplex systems, future communication and sensing networks, and quantum computing, and it is difficult to implement a passive topology on a chip. Based on switch-based spatio-temporal conductivity modulation, in this study, we design and implement a non-magnetic on-chip passive circulator operating at the Ku band in a 90-nm bulk CMOS technology using a 25% duty-cycle I/Q clock signal. With the virtue of the four-phase non-overlapping clock signal, the proposed circulator achieves a 3.9 dB transmitter (TX)-to-antenna (ANT) and a 4.0 dB ANT-to-receiver (RX) insertion loss with a 1-dB bandwidth of 2.7 GHz (21.4%). The TX-to-RX isolation is better than 17.2 dB, and the TX-to-ANT IIP3 and ANT-to-RX IIP3 are 19.7 dBm and 20.0 dBm, respectively, while occupying a die area of 1.55 mm × 1.15 mm. Although low-cost bulk CMOS technology is used, competitive isolation, linearity performance, and isolation bandwidth are achieved in the proposed design. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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12 pages, 2692 KiB

Open AccessArticle

An Inductorless Gain-Controllable Wideband LNA Based on CCCIIs

by Qiuzhen Wan, Jiong Liu and Simiao Chen

Micromachines 2022, 13(11), 1832; https://doi.org/10.3390/mi13111832 - 26 Oct 2022

Viewed by 1432

Abstract

In this paper, an inductorless and gain-controllable 0.5~2.5 GHz wideband low noise amplifier (LNA) based on second generation current controlled current conveyors (CCCIIs) is presented. The proposed wideband LNA utilizes CCCIIs as building blocks to implement the amplifier stage and impedance matching stage. [...] Read more.

In this paper, an inductorless and gain-controllable 0.5~2.5 GHz wideband low noise amplifier (LNA) based on second generation current controlled current conveyors (CCCIIs) is presented. The proposed wideband LNA utilizes CCCIIs as building blocks to implement the amplifier stage and impedance matching stage. By varying the DC biasing current of the CCCII, the voltage gain of the proposed LNA is controllable in the range of 1~18 dB. In the frequency range of 0.5~2.5 GHz, the post-layout simulation results show that the proposed LNA has a typical voltage gain S21 of 12.6 dB with a gain ripple of ±1.5 dB, an input and output return loss (S11 and S22) of, respectively, −21.4 dB to −16.6 dB and −18.6 dB to −10.6 dB, and a high reverse isolation S12 of −65.2 dB to −39.5 dB. A noise figure of 4.05~4.35 dB is obtained across the whole band, and the input third-order intercept point (IIP3) is −2.5 dBm at 1.5 GHz. Using a 0.18 μm RF CMOS technology, the LNA occupies an active chip area of only 0.096 mm² with a power consumption of 12.0 mW. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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10 pages, 2425 KiB

Open AccessArticle

Experimental Investigation of Relationship between Humidity Conditions and Degradation of Key Specifications of 0.1–1.2 GHz PA in 0.18 μm CMOS

by Shaohua Zhou, Cheng Yang and Jian Wang

Micromachines 2022, 13(8), 1162; https://doi.org/10.3390/mi13081162 - 22 Jul 2022

Cited by 2 | Viewed by 1410

Abstract

The specification of power amplifiers (PA) is closely related to humidity variation, and few reports on the humidity properties of PA are available in the literature. Therefore, an experimental study of PA specifications was conducted under different humidity conditions to elucidate the relationship [...] Read more.

The specification of power amplifiers (PA) is closely related to humidity variation, and few reports on the humidity properties of PA are available in the literature. Therefore, an experimental study of PA specifications was conducted under different humidity conditions to elucidate the relationship between the degradation of PA specifications and humidity conditions. This paper studies and provides results of the degradation of a PA subjected to different humidity levels. The experimental results show that the S₂₁ and output power decrease with the increase in humidity. The main cause of this degradation is the decrease in oxide capacitance and increase in threshold voltage with increasing humidity, resulting in a reduction of transconductance and an increase in on-resistance. The results of this study can guide designers in designing compensation circuits to achieve some degree of compensation for the degradation of PA specifications. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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Review

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40 pages, 12300 KiB

Open AccessReview

A State-of-the-Art Review on CMOS Radio Frequency Power Amplifiers for Wireless Communication Systems

by Sofiyah Sal Hamid, Selvakumar Mariappan, Jagadheswaran Rajendran, Arvind Singh Rawat, Nuha A. Rhaffor, Narendra Kumar, Arokia Nathan and Binboga S. Yarman

Micromachines 2023, 14(8), 1551; https://doi.org/10.3390/mi14081551 - 1 Aug 2023

Cited by 3 | Viewed by 3640

Abstract

Wireless communication systems have undergone significant development in recent years, particularly with the transition from fourth generation (4G) to fifth generation (5G). As the number of wireless devices and mobile data usage increase, there is a growing need for enhancements and upgrades to [...] Read more.

Wireless communication systems have undergone significant development in recent years, particularly with the transition from fourth generation (4G) to fifth generation (5G). As the number of wireless devices and mobile data usage increase, there is a growing need for enhancements and upgrades to the current wireless communication systems. CMOS transceivers are increasingly being explored to meet the requirements of the latest wireless communication protocols and applications while achieving the goal of system-on-chip (SoC). The radio frequency power amplifier (RFPA) in a CMOS transmitter plays a crucial role in amplifying RF signals and transmitting them from the antenna. This state-of-the-art review paper presents a concise discussion of the performance metrics that are important for designing a CMOS PA, followed by an overview of the trending research on CMOS PA techniques that focuses on efficiency, linearity, and bandwidth enhancement. Full article

(This article belongs to the Special Issue State-of-the-Art CMOS and MEMS Devices)

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